Sanyo LCD32XH3 Diagram
SERVICE MANUAL LCD Television
N4AV
FILE NO.
Model No. LCD-32XH3
(Argentina)
Give complete “SERVICE REF. NO.” for parts order or
servicing. It is shown on the rating label at the cabinet
back of the unit.
This T.V. receiver will not work properly in foreign countries where the television transmission
system and power source differ from the design
specifications. Refer to the specification table.
Service Ref. No. LCD-32XH3-00
Product Code:113004416
Original Ver sion
Chassis Series: UH1-L
Contents
Safety Notice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Chassis Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . 4
IC Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . 5-11
IC7200 Port Functions . . . . . . . . . . . . . . . . . . . . . 12-14
CPU (IC8000) Port Functions . . . . . . . . . . . . . . . 15-16
On-screen Service Menu System . . . . . . . . . . . . . 17-24
Service Adjustments . . . . . . . . . . . . . . . . . . . . . . . . . 25
Mechanical Disassembly . . . . . . . . . . . . . . . . . . . 26-31
Cabinet Parts List . . . . . . . . . . . . . . . . . . . . . . . . . 32-33
Chassis Electrical Parts List . . . . . . . . . . . . . . . . 34-52
POWER
VIDEO MODE
DISPLAY
MUTE
RECALL
AUDIO MODE
SLEEP
ECO
CHANGE
MAIN/SUB
PIP
IMAGE
BACK
CH
CH
SURROUND
ZOOM
BASS
SOUND
Safety Notice
-2-
Safety Precautions
The following precautions must be observed.
1: Comply with all caution and safety-related notes provided on the cabinet back, cabinet bottom, inside the
cabinet or on the chassis.
2: When replacing a chassis in the cabinet, always be certain that all the protective devices are installed
properly, such as, control knobs, adjustment covers or shields, barriers, etc..
DO NOT OPERATE THIS TELEVISION WITHOUT THE PROTECTIVE SHIELD IN POSITION AND PROPERLY
SECURED.
3: Before replacing the cabinet cover, thoroughly inspect the inside of the cabinet to see that no stray parts or
tools have been left inside.
Before returning any television to the customer, the service personnel must be sure that it is completely safe to
operate without danger of electrical shock.
Product Safety Notice
Product safety should be considered when a component replacement is made in any area of a receiver.
Components indicated by mark in the parts list and the schematic diagram designate components in which
safety can be of special significance. It is particularly recommended that only par ts designated on the par ts list
in this manual be used for component replacement designated by mark . No deviations from resistance
wattage or voltage ratings may be made for replacement items designated by mark .
Specifications
-3-
Power Source AC 100 - 240 Volts, 50/60Hz
Receiving System PAL-N/N, PAL-M/M, NTSC-M/M
Channel Coverage ANTENNA mode
VHF: CH02 - CH13
UHF: CH14 - CH69
CATV mode
VHF band: CH01-CH13
MID band: CH14-CH22
SUPER band: CH23-CH36
HYPER band: CH37-CH64
ULTRA band: CH65-CH94 and CH100-CH125
Low MID band: CH95-CH99
Aerial Input Impedance 75 Ω
LCD Panel
Screen Size (Measured Diagonally): 32 inches
Picture Resolution: WXGA 1366 (Horiz.) x 768 (Vert.) pixels
Brightness: 500 cd/m
2
Audio Output (RMS) 5W+5W
Speakers 6 cm x 12 cm x 2 pcs.
Input and Output Terminals
AV1 Input Video: Composite video Input (RCA Jack) x 1
S-Video Input (Separated Y/C) DIN 4-pin Jack x 1
Audio: L/R Stereo Input (RCA Jack) x 1 set
AV2 Input Video: Component Y (combined with composite video input), C
B,CR Input (RCA Jack) x 1 set
Audio: L/R Stereo Input (RCA Jack) x 1 set
HDMI Input HDMI Terminal 19 pin x 1
Computer Input Video Input: D-SUB 15 pin x 1
Audio Input: Mini stereo jack x 1
Output Terminals
Video Monitor Output: Phono jack x 1
Audio Monitor Output: L/R Stereo Output (Phone Jack) x 1 set
Headphone Jack: Mini stereo jack x 1
Dimensions 952 (W) X 558 (H) X 228 (D) mm (Included Swivel Stand)
Weight approx. 19.5kg (Included Swivel Stand)
Environmental Considerations
Operating Temperature 0˚C ~ 40˚C (32˚F ~ 104˚F)
Operating Humidity 20 ~ 80%
Storage Temperature -10˚C ~ 50˚C (14˚F ~ 122˚F)
Storage Humidity 20 ~ 80%
Specifications subject to change without notice.
-4-
Chassis Block Diagram
SP
SP
ASSY,PWB, LED
ASSY,PWB, KEY
D1902 LED (POWER)
RC
U1901
SW1950~
SW1956
L
R
(TIMER)
D1901 LED
RECEIVER
K19K
IC8002
EEPROM
IC8011
EEPROM
IC101
K19A
K8002
5
6
5
6
AUDIO AMP.
K8000
KEY IN
POWER
KEY IN
R
24/25
RC-IN
SDAE
SCLE
SDA
SCL
L
15/16
9
78
76
18
95
IC8000
75
30
29
74
73
JACK
HEADPHONE
PH-L/R
13
CPU
K1330
27/28
12
45
4
89
38
37
43
36
35
46~49
55~58
RESET
TV-SYNC
1
3
FAN CONTROL
P-FAIL-3
P-FAIL-2
P-FAIL-1
T-SCL
T-SDA
69~71
MCU BUS
72~75
POWER ON
IC1709
54~61
IC7200
LCD TV Controller
K7205
with
Dual LVDS Transmitter
(WXGA)
LCD PANEL
160~171
30
B IN
28
R IN
33
25/23/20
18/19
IC7201
SDRAM
81~153
8/9
207/208/2/3/5/6/
188~191
1~4
SDA
SCL
57
29
58
28
IC2203
59
DIGITAL
60
VIDEO
DECODER
7
43~47,
50~52
8
17
COMPONENT C
COMPONENT Y IN
R/G/B
COMPONENT C
HORIZ. SYNC. / VERT. SYNC
IC7209
5/8
STEREO D/A CONVERTER
HDMI L/R
ASSY, PWB, MAIN
IC003
SYNC. SEPARATION
(PIN-45)
TO IC8000
TV-SYNC
8
2
A201
TUNER
17
7
6
5/9
4/10
IC150
AUDIO
CONTROL/3D SURROUND
71
72
TV CVBS
AUDIO-R
T-SCL
T-SDA
R
26
32
R
59
70
AUDIO-L
(K1002)
L
7
1
L
61
46
VIDEO MONITOR OUT
AUDIO MONITOR OUT-L
SCL
51
42
SDA
43
IC1200
61
AUDIO MONITOR OUT-R
MONITOR OUT
IC8600
AV SW
AV1 VIDEO IN
B
G
BLK
21
20
22
PROCESSOR
CLOSED CAPTION
6
AV1 AUDIO IN-L
7
8
9
Y IN (AV1)
Y
AV1 AUDIO IN-R
AV1 IN
R
19
15
12
S IN (AV1)
AV1 IN
S-VIDEO
CVBS
10
C IN (AV1)
C
(K1001)
64
Y
C
62
AV2 AUDIO IN-L
AV2 TERMINAL (K1003)
HDMI L/R
60
15
17
AV2 AUDIO IN-R
PC L/R
29/31
14
AV2 VIDEO IN
22/24
B IN
COMPONENT Y IN
COMPONENT C
COMPONENT CR IN
PC L/R
(K7204)
PC AUDIO INPUT
PC (VGA)
INPUT
(K7200)
DVI
INPUT
-5-
IC Block Diagrams (On the ASSY, PWB, MAIN)
IC101 < AUDIO AMP. > LA4919N-E
2
1
3
4
6
5
7
8
10
9
12
13
14
17
18
19
20
21
22
23
26
HP IN1
Headphone Block
27
Ripple filter
Ripple filter
Voltage
Regulator
Vcc
28
VG=6dB
VG=6dB
H/P Standby SW
15
16
A
B
AMP. Standby
SW
Output
amplifier
Output
amplifier
Nonlinear
amplifier
24
25
Muting circuit
used at power
on
Intput
amplifier
H. L. S
Switching regulator Block
Switching
Drive
ABC
D
*H. L. S
Higher Level
Signal Selector
Headphone stage
Input amplifier stage
Switching regulator stage
Power TR stage
VCC
C
D
Output
amplifier
Output
amplifier
Nonlinear
amplifier
OUT1+
OUT1
-
Output amplifier
stage
11
REF amplifier
Input amplifier
HP IN2
HP OUT2
HP OUT1
HP D.C
HP Standby
AMP Standby
D.C
DDL
ON TIME
IN2
PRE GND
PRE VCC
IN-VREF
IN1
POWER GND
POWER GND
SW GND
SWB
SWE
SW OUT
OUT2
+
OUT2
-
NC
14
AFC
VCC
13
AFC CTL
12
VCO OUT
11
VCO IN
10
HD OUT
9
DET OUT
8
32fH
VCO
LOCK
DET
COUNT
DOWN
SYNC
SEP
V. SEP
NC
1
VIDEO IN
2
F.B CLAMP
3
SYNC OUT
4
VD OUT
5
GND
EXC
6
7
IC003 < Sync. Separation> LA7217M-T
IC150 < Audio Control/ 3D Surround>NJW1167V
6
8
1
7
20
10
25
22
AGC
BIAS
VOL 1
19
18
14
13
16
15
17
30
21
23
24
12
11
INa
AGC1
TONE Ha
TONE La
OUT a
CVA
CVB
CTH
CTL
CSR
SCL
SDA
V+
GND
VREF
OUT b
SR-FIL
TONE Hb
TONE Lb
5
2
3
4
INb
29
28
27
SS-FIL
26
9
PORT1
OUTw
32
VOL 1
eala
&
SIMULATED
STEREO
TONE
TONE
LPF
VOL 2
VOL 2
VOL 2
AGC2
31
LF1
LF2
LF3
Trimmer
ADR
CVW
PORT0
AUX0
AUX1
IIC BUS
INTERFACE
-6-
IC Block Diagrams (On the ASSY, PWB, MAIN)
IC1651 < 1 ch Power Controller by the PWM Switching System > FA7700V-TE1
IC2203 < Digital Video Decoder > TVP5147PFP
8
1
7
74
72
37
73
71
23
40
VI_1_A
2
29
36
9
Analog
Front End
33
35
Clamping
AGC
2 x 11-Bit
ADC
80
18
16
17
VI_1_C
VI_1_B
Copy
Protection
Detector
VBI
Data
Processor
M
U
X
Timing Processor
with Sync. Detector
Host
Interface
28
Output
Formatter
Composite and S-Video processor
Y/C
Separation
5-line
Adaptive
Comb
Luma
Processing
Chroma
Processing
Sampling
Clock
VI_2_A
VI_2_C
VI_2_B
VI_3_A
VI_3_C
VI_3_B
VI_4_A
CVBS/Y
CVBS/
C/Pb
CVBS/
Y
CVBS/
C/Pr
CVBS/Y
Y
C
GPIO
75
34
XTAL1
XTAL2
PWDN
RESETB
DATACLK
AVID
FID
VS/VBLK
HS/CS
GLCO
SCL
SDA
Y (9~0)
C (9~0)
54
43 ~
50 ~
47 ,
66 ,
57 ~
63 ~
60 ,
70
69 ~
RT
REF
IN-
FB
1
2
3
4
VREF
VREF
2.2V
Power Good Signal
+
BIAS
ERROR.
AMP.
OSC
UVLO
1.5V
+
+
+
PWM
S.C. DET
ON/OFF
5.5V
1.5V
+
OFF
0.3V ON/OFF
+
S.C.P
+
2.2V
8
7
6
5
CS
VCC
OUT
GND
-7-
IC Block Diagrams (On the ASSY, PWB, MAIN)
IC1200 < AV Switch> LA79500E
VIDEO BLOCK
71
TV1
TV2
CV1
CV2
CV3
CV4
Y1
Y2
Y3
Y4
YCOMB
Y5
Y6
CLAMP
75
CLAMP
78
CLAMP
6
CLAMP
14
CLAMP
34
CLAMP
80
CLAMP
8
CLAMP
16
CLAMP
36
CLAMP
65
CLAMP
21
CLAMP
28
CLAMP
MUTE
MUTE
MUTE
MUTE
0 or 6dB AMP.
0 or 6dB AMP.
0 or 6dB AMP.
0 or 6dB AMP.
64
56
46
62
VOUT1
VOUT2
VOUT3
Y/VOUT1
C1
C2
C3
C4
CCOMB
PR5
PR6
PB5
PB6
Y/VOUT2
54
0 or 6dB AMP.
MUTE
+
2
BIAS
10
BIAS
18
BIAS
38
BIAS
68
BIAS
25
CLAMP
32
CLAMP
23
CLAMP
30
CLAMP
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
+
0 or 6dB AMP.
0 or 6dB AMP.
0 or 6dB AMP.
0 or 6dB AMP.
0 or 6dB AMP.
0 or 6dB AMP.
60
52
57
58
49
50
COUT1
COUT2
PROUT1
PBOUT1
PROUT2
PBOUT2
IC Block Diagrams (On the ASSY, PWB, MAIN)
-8-
IC1200 < AV Switch> LA79500E
AUDIO BLOCK
TV1L
70
BIAS
74
TV2L
V1L
V2L
V3L
V4L
CP5L
CP6L
BIAS
BIAS
79
7
BIAS
BIAS
15
35
BIAS
22
BIAS
29
BIAS
MUTE
MUTE
MUTE
0 or 6dB AMP.
0 or 6dB AMP.
0 or 6dB AMP.
61
53
47
LOUT1
LOUT2
LOUT3
TV1R
TV2R
V1R
V2R
V3R
V4R
CP5R
CP6R
72
BIAS
76
BIAS
BIAS
1
9
BIAS
BIAS
17
37
BIAS
24
BIAS
31
BIAS
MUTE
MUTE
MUTE
0 or 6dB AMP.
0 or 6dB AMP.
0 or 6dB AMP.
59
51
45
ROUT1
ROUT2
ROUT3
IC Block Diagrams (On the ASSY, PWB, MAIN)
-9-
IC7209 < Stereo D/A Converter > CS4334-KSZ
6
1
7
AOUTL
2
8
3
4
AOUTR
Interpolator
Host
Interface
5
VA
∆∑
Modulation
Interpolator
Serial Input
Interface
De-emphasis
MCLK
∆∑
Modulation
DAC
Analog
Low-Pass
Filter
Analog
Low-Pass
Filter
LRCK
DEM/SCLK
SDATA
AGND
Voltage Reference
DAC
IC Block Diagrams (On the ASSY, PWB, POWER)
-10-
IC602 MR4010-7101
IC601 < Transition-mode PFC Controller > L6562D
INV
+
UNTERNAL
SUPPLY 7V
6
8
1
7
5
2
3
4
Vcc
GND
COMP
MULT
CS
GD
ZCD
VOLTAGE
REGULATOR
MULTIPLIER AND
THD OPTIMIZER
OVERVOLTAGE
DETECTION
+
25V
+
R2
R1
V
REF2
UVLO
2.1V
1.6V
ZERO CURRENT
DETECTOR
+
DISABLE
40K
5µF
R
S
Q
DRIVER
STARTER
Start
stop
15V
Vcc
(Zero Current Detector)
VIN
1
7
5
2
3
4
VUL
GND
VCC
Collector
Emitter/OCL
F/B
Z/C
+
R
S
Q
Q1
9
Start-up
Circuit
+
+
Vcc(start-up off)
/Vcc(start-up on)
Start-up circuit
UVLO comparator
Latch circuit
reset comparator
UVLO
comparator
+
VOVP
Vcc(start)
/Vcc(stop)
OVP
comparator
Thermal Shutdown
Circuit
Zero Current
Detection Circuit
+
Turn-on
Dead Timer
Standby
Circuit
R
S
Q
Soft Drive
Circuit
+
On width
Timer
IF/B
Vref
(Zero Current
Detection
Terminal)
(Feed Back
Terminal)
+
OCP threshold compatator
VTH (OCL)
+
VTH (Burst Limit)
Burst mode OCP
threshold compatator
Re-start
Timer
IC Block Diagrams (On the ASSY, PWB, POWER)
-11-
IC603 < High Voltage Resonant Controller > L6598D
1
7
5
4
Vs
OPOUT
9
BBOTSTRAP
DRIVER
+
6
8
10
11
14
15
16
12
OP AMP
Rfmin
VREF
Ifmin
VREF
Ifstart
2
Rfstart
VCO
3
Cf
CONTROL
LOGIC
+
+
Css
Iss
UV
DETECTION
DRIVING
LOGIC
DEAD
TIME
LEVEL
SHIFTER
HGV
DRIVER
LVG DRIVER
Vthe2
HVG
Vthe1
OUT
Vboot
H.V.
LOAD
EN1
EN2
GND
LVG
C
BOOT
Vs
Pin No. Pin Name Pin Type Function
67 HWRESET Schmitt Trigger Input w/5V-tolerant Hardware Reset, active high
75-72 DBUS[3:0] I/O w/5V-tolerant MCU 4-bit DDR Direct bus; 4mA driving strength
69 ALE I w/5V-tolerant MCU Bus ALE, active high
70 RDZ I w/5V-tolerant MCU Bus RDZ, active high
71 WRZ I w/5V-tolerant MCU Bus WRZ, active high
68
INT
Output MCU Bus Interrupt; 4mA driving strength
MCU Interface
Pin No. Pin Name Pin Type Function
38 RMID Mid-Scale V oltage Bypass
39 REFP Internal ADC Top De-coupling Pin
40 REFM Internal ADC Bottom De-coupling Pin
11 REXT Analog External resister 390 ohm to AVDD_DVI
36 HSYNC0 Schmitt Trigger Input w/5V-tolerant Analog HSYNC Input from Channel 0
37
VSYNC0
Schmitt Trigger Input w/5V-tolerant Analog VSYNC Input from Channel 0
27 BIN0M Analog Input Reference Ground for Analog Blue Input from Channel 0
28 BIN0P Analog Input Analog Blue Input from Channel 0
29 GIN0M Analog Input Reference Ground for Analog Green Input from Channel 0
30 GIN0P Analog Input Analog Green Input from Channel 0
31 SOGIN0 Analog Input Sync On Green Input from Channel 0
32 RIN0M Analog Input Reference Ground for Analog Red Input from Channel 0
33 RIN0P Analog Input Analog Red Input from Channel 0
18 HSYNC1 Schmitt Trigger Input w/5V-tolerant Analog HSYNC Input from Channel 1
19 VSYNC1 Schmitt Trigger Input w/5V-tolerant Analog VSYNC Input from Channel 1
20 BIN1P Analog Input Analog Blue Input from Channel 1
21 BIN1M Analog Input Reference Ground for Analog Blue Input from Channel 1
22 SOGIN1 Analog Input Sync On Green Input from Channel 1
23 GIN1P Analog Input Analog Green Input from Channel 1
24 GIN1M Analog Input Reference Ground for Analog Green Input from Channel 1
25 RIN1P Analog Input Analog Red Input from Channel 1
26 RIN1M Analog Input Reference Ground for Analog Red Input from Channel 1
Analog Interface
Pin No. Pin Name Pin Type Function
207 DVI_R+ Input DVI Input Channel Red +
208 DVI_R- Input DVI Input Channel Red -
2DVI_G+ Input DVI Input Channel Green +
3DVI_G- Input DVI Input Channel Green 5DVI_B+ Input DVI Input Channel Blue +
6DVI_B- Input DVI Input Channel Blue 8DVI_CK+ Input DVI Input Clock +
9DVI_CK- Input DVI Input Clock -
DVI Interface
Pin No. Pin Name Pin Type Function
53 VI_CK Input w/ 5V-tolerant Digital Video Input Clock
48-41,61-54 VI_DATA[15:0] Input w/ 5V-tolerant Digital Video Input Data[15:0]
Video Interface
IC7200 (LCD TV Controller with Dual LVDS Transmitter)
Port Functions
-12-
-13-
IC7200 (LCD TV Controller with Dual LVDS Transmitter)
Port Functions
Pin No. Pin Name Pin Type Function
188 AUMCK Output Audio Master Clock Output
189 AUSD Output Audio Serial Data Output; 4mA driving strength
190 AUSCK Output Audio Serial Clock Output; 4mA driving strength
191 AUWS Output Word Select Output;4mA driving strength
192 AUMUTE Output Audio Output Mute Control
193
SPDIFO
Output S/PDIF Audio Output; 4mA driving strength
196 AIMCK Input Audio Master Clock Input
197 AISD Input Audio Serial Data Input
198 AISCK Input Audio Serial Clock Input
199 AIWS Input Word Select Input
Digital Audio Interface
Pin No. Pin Name Pin Type Function
171 LVA0M Output A-Link Negative LVDS Differential Data Output
170 LVA0P Output A-Link Positive LVDS Differential Data Output
169 LVA1M Output A-Link Negative LVDS Differential Data Output
168 LVA1P Output A-Link Positive LVDS Differential Data Output
167 LVA2M Output A-Link Negative LVDS Differential Data Output0
166
LVA2P
Output A-Link Positive LVDS Differential Data Output
161 LVA3M Output A-Link Negative LVDS Differential Data Output
160 LVA3P Output A-Link Positive LVDS Differential Data Output
165 LVACKM Output A-Link Negative LVDS Differential Data Output
164 LVACKP Output A-Link Positive LVDS Differential Data Output
187 LVB0M Output B-Link Negative LVDS Differential Data Output
186 LVB0P Output B-Link Positive LVDS Differential Data Output
181 LVB1M Output B-Link Negative LVDS Differential Data Output
180 LVB1P Output B-Link Positive LVDS Differential Data Output
179 LVB2M Output B-Link Negative LVDS Differential Data Output
178 LVB2P Output B-Link Positive LVDS Differential Data Output
175 LVB3M Output B-Link Negative LVDS Differential Data Output
174 LVB3P Output B-Link Positive LVDS Differential Data Output
177 LVBCKM Output B-Link Negative LVDS Differential Data Output
176 LVBCKP Output B-Link Positive LVDS Differential Data Output
LVDS Interface
Pin No. Pin Name Pin Type Function
200 PWM0 Output GPO with PWM Function; 4mA driving strength
201 PWM1 Output GPO with PWM Function; 4mA driving strength
78 GPO[1] I/O GPO / FIELD Input; 4mA driving strength
77 GPO[2] I/O GPO / Digital VSYNC Input;4mA driving strength
76 GPO[3] I/O GPO / DE Input; 4mA driving strength
52 GPO[4] I/O GPO / Secondary Video Clock Input; 4mA driving strength
51 GPO[5] I/O GPO / Digital HSYNC Input; 4mA driving strength
GPO Interface
-14-
Pin No. Pin Name Pin Type Function
104 MVREF Input Reference Voltage for DDR SDRAM Interface
105 MCLKE Output DRAM Memory Clock Enable
106 MCLKZ Output DRAM Memory Clock Complementary / Input (for differential clocks)
107 MCLK Output DRAM Memory Clock
112 RASZ Output Row Address Strobe, active low
115
CASZ
Output Column Address Strobe, active low
116 WEZ Output Write Enable, active low
101, 133 DQM[1:0] Output Data Mask Byte Enable
81, 100, 134, 153 DQS[3:0] Output Data Strobe
110, 111 BADR[1:0] Output Memory Bank Address
130-127, 124-117 MADR[11:0] Output Memory Address
82-85, 88-99, MDATA[31:0] I/O Memory Data
135-138, 141-152
DRAM Interface
Misc. Interface
Power Pins
Pin No. Pin Name Pin Type Function
203 XIN Cr ystal Oscillator Input Cr ystal Oscillator Input
202 XOUT Crystal Oscillator Output Crystal Oscillator Output
14 DDCD_DA I/O w/ 5V-tolerant HDCP Ser ial Bus Data / DDC Data of DVI port; 4mA driving strength
15 DDCD_CK Input w/ 5V-tolerant HDCP Serial Bus Clock / DDC Clock of DVI Port
158 BYPASS For External Bypass Capacitor
62 VCTRL Output Regulator Control
Pin No. Pin Name Pin Type Function
4, 10 ADD_DVI 3.3V Power DVI Power
17, 34 ADD_ADV 3.3V Power ADC Power
12 ADD_PLL 3.3V Power PLL Power
109 ADD_PLL2 3.3V Power PLL Power
49 ADD_APLL 1.8V Power Audio PLL Power
204 ADD_MPLL 3.3V Power PLL Power
86, 102, 113, VDDM 3.3V Power (SDR SDRAM) DRAM Interface Power
125, 139, 154 2.5V Power (DDR DDRAM)
66, 162, 182 VDDP 3.3V Power Digital Output Power
63, 79, 131, 156 VDDC 1.8V Power Digital Core Power
173, 185, 195
1, 7, 13, 16, 35, GND Ground Ground
50, 64, 65, 80,
87, 103, 108, 114,
126, 132, 140, 155,
157, 159, 163, 172,
183, 184, 194, 205,
206
IC7200 (LCD TV Controller with Dual LVDS Transmitter)
Port Functions
-15-
CPU (IC8000) Port Functions
Pin No. Pin Name Function Description
1P96/ANEX1/SOUT4
2P95/ANEX0/CLK4
3P9
4/DA1/TB4IN
4P9
3/DA0/TB3IN FANCTR FAN CONTROL
5P9
2/TB2IN/SOUT3
6
P9
1/TB1IN/SIN3
7P9
0/TB0IN/CLK3 BLKON
8 BYTE
This pin selects width of an external databus.This input is ”L” to selected 16-bit width.
9 CNVss CNV
SS This pin input is ”L” to select MCU operation in Single-chip.
10 P87/XCIN P-EN
11 P86/XCOUT RST_MST MST RESET PIN
12 RESET MCU_RST Active “L”
13 X
OUT Clock output
14 Vss GND
15 XIN Clock input
16 Vcc V
CC 5V Standby
17 P85/NMI
18 P84/INT2 MCUIR Remote control input pin
19 P8
3/INT
1 ARST1 Main Decode (Tvp5147) Reset pin
20 P82/INT0 CPU74
21 P81/TA4IN/U RL-MUTE
22 P8
0/TA4
OUT/U PWR-0N1 Power On/Off
23 P77/TA3IN
24 P76/TA3OUT LINE-OFF Power line-off Detect Pin
25 P7
5/TA2
IN/W
26 P74/TA2OUT/W
27 P73/CTS2/RTS2/TA1IN/V PLUG_DVI
28 P7
2/CLK
2/TA1OUT/V DPU_IN
29 P71/RxD2/TA0IN/TB5IN SCLE IIC-SCL(EEPROM)
30 P70/TxD2/SDA/TA0OUT SDAE IIC-SDA(EEPROM)
31 P67/TxD1 TXD TXD UART communication for Mcu programming Mode
32 P66/RxD1 RXD RXD UART communication for Mcu programming Mode
33 P65/CLK1 SCLK SCLK Input communication for Mcu programming Mode
34 P64/CTS1/RTS1/CLKS1 BUSY BUSY Output communication for Mcu programming Mode
35 P63/TxD0 TSDA
36 P62/RxD0 TSCL
37 P61/CLK0 P-FAIL 1
Power fail Detect1 (for 2.5V, 3.3V, 5V).It could active power protect when the volt under 2.5V.
38 P60/CTS0/RTS0 P-FAIL 2 Power fail Detect2 (only for 3.3V)
39 P57/RDY/CLKOUT
40 P56/ALE
41 P55/HOLD
42 P54/HLDA
43 P53/BCLK PWR-0N Power On/Off
44 P52/RD
45 P51/WRH/BHE TV-SYNC
46 P50/WRL/WR 5VSTB 5V Standby
47 P47/CS3 WRZ MCU Bus WRZ output (Active=High)
48 P4
6/CS2 RDZ MCU Bus RDZ output (Active=High)
System Control (CPU: IC8000)
M30624
CPU (IC8000) Port Functions
-16-
Pin No. Pin Name Function Description
49 P45/CS1 ALE MCU Bus ALE output (Active=High)
50 P44/CS0
51 P4
3
/A19 DRC_ON
52 P42/A18
53 P41/A17
54
P40/A
16
55 P37/A
15 BUD3 MCU 4bit DDR Direct bus
56 P36/A14 BUD2 MCU 4bit DDR Direct bus
57 P35/A
13 BUD1 MCU 4bit DDR Direct bus
58 P34/A
12 BUD0 MCU 4bit DDR Direct bus
59 P33/A11
60 P32/A
10
61 P31/A
9 DVD_SW
62 Vcc2 V
CC2 5V_Standby
63 P30/A8(/-/D7)AV1_S
64 Vss V
SS GND
65 P27/A7(/D7/D6)
66 P26/A6(/D6/D5)
67 P2
5/A5(/D5/D4) AMP_MUTE1
68 P24/A4(/D4/D3)
69 P23/A3(/D3/D2)
70 P2
2A
2(/D2/D1)
71 P21/A1(/D1/D0)
72 P20/A0(/D0/-)
73 P1
7/D
15/INT5 SCL IIC-BUS SCL
74 P16/D14/INT4 SDA IIC-BUS SDA
75 P15/D13/INT3 POWER_SW Power Switch Input
76 P1
4/D
12 LED1 Stand-by and Power LED Output
77 P13/D11 FAN Lock FAN Lock
78 P12/D10 OFF TIMER_LED OFF TIMER LED output
79 P1
1/D
9 LED2
80 P10/D8
81 P07/D7
82 P06/D6
83 P05/D5
84 P0
4
/D4
85 P03/D3
86 P02/D2
87 P01/D1
88 P00/D0
89 P10
7/AN7/KI3 FAIL3 Power Failure
90 P106/AN6/KI2 M-AFT Tuner AFT input pin
91 P105/AN5/KI1
92 P10
4/AN4/KI0 TSENSE Temp.Sensor1 connected to Thermistor
93 P103/AN3
94 P102/AN2
95 P10
1/AN1 KEY-IN Key Board Input
96 AVss AVSS GND
97 P100/AN0
98 V
REF Vcc
99 AVcc AVcc 5V_Standby
100 P9
7/ADTRG/SIN4
CH
CH
SERVICE 0.14 00
INDEX 1 CTI DELAY-TVPAL-N
IC TVP15147
ADDR 2D
DATA 00 00000000
-17-
On-screen Service Menu System
VIDEO MODE
POWER
RECALL
DISPLAY
MUTE
AUDIO MODE
General
This set has an On-screen Service Menu System included in the CPU that allows remote operation for most of the
service adjustments.
■ How to select the service item and adjust data:
On-screen Service Menu System
Quick operation is needed to enter Service Mode.
■ How to enter the Service Menu
1.
Press and hold the MENU button on top controls.
2. Keep pressing the MENU button and press the MUTE button on the remote control, and the service mode menu will
be displayed.
[ Service Mode Menu ]
VIDEO MODE
VOLUME
+
MENU
MENU
To select service item
1) Select “INDEX” line and press + or -button.
To adjust data:
1) Select “DAT A” line by pressing or button.
■ To exit service mode
To exit ser vice mode, tur n the TV off by pressing the POWER ON/OFF button on the top controls
or remote control.
Note: The all adjusted data in service mode will be memorized into EEPROM automatically.
Data V alue
Target IC
Sub Address of IC
Item No.
Item Name
CH
CH
SERVICE 2.06 00
INDEX 2 CTI DELAY-VideoPAL-N
IC TVP15147
ADDR 2D
DATA 00 00000000
SERVICE 2.06 00
INDEX 2 CTI DELAY-VideoPAL-N
IC TVP15147
ADDR 2D
DATA 00 00000000
2) Press + or -button to adjust data.
-18-
On-screen Service Menu System
■ Service Adjustment Data Table
Item Item Name Initial Target IC Description
No. Data
1 CTI DELAY-TVPAL-N 00 TVP5147 TV(PAL-N) DELAY CTI
2 CTI DELAY-VideoPAL-N 00 TVP5147 VIDEO(PAL-N) DELAY CTI
3 CTI DELAY-S-PAL-N 00 TVP5147 S-VIDEO(PAL-N) DELAY CTI
4 CTI DELAY-TVN 00 TVP5147 TV (NTSC) DELAY CTI
5 CTI DELAY-VideoN 00 TVP5147 VIDEO (NTSC)DELAY CTI
6 CTI DELAY-S-N 00 TVP5147 S-VIDEO (NTSC) DELAY CTI
7 CTI DELAY-TVAL-M 00 TVP5147 TV (PAL-M) DELAY CTI
8 CTI DELAY-VideoPAL-M 00 TVP5147 VIDEO(PAL-M) DELAY CTI
9 CTI DELAY-S-PAL-M 00 TVP5147 S-VIDEO(PAL-M) DELAY CTI
10 00 TVP5147
11 00 TVP5147
12 00 TVP5147
13 SET DELAY-TVPAL-N 00 TVP5147 TV(PAL-N) DELAY SET
14 SET DELAY-VideoPAL-N 00 TVP5147 VIDEO(PAL-N) DELAY SET
15 SET DELAY-S-PAL-N 00 TVP5147 S-VIDEO(PAL-N) DELAY SET
16 SET DELAY-TVN 00 TVP5147 TV (NTSC) DELAY SET
17 SET DELAY-VideoN 00 TVP5147 VIDEO(NTSC) DELAY SET
18 SET DELAY-S-N 00 TVP5147 S-VIDEO(NTSC) DELAY SET
19 SET DELAY-TVPAL-M 00 TVP5147 TV(PAL-M) DELAY SET
20 SET DELAY-VideoPAL-M 00 TVP5147 VIDEO(PAL-M) DELAY SET
21 SET DELAY-S-PAL-M 00 TVP5147 S-Video(PAL-M) DELAY SET
22 00 TVP5147
23 00 TVP5147
24 00 TVP5147
25 PEAK GAIN-TV 00 TVP5147 RF INPUT
26 PEAK GAIN-OTHER 01 TVP5147 EXCEPT RF INPUT
27 TRAP-TV 04 TVP5147 RF INPUT
28 TRAP-OTHER 00 TVP5147 EXCEPT RF INPUT
29 CTI GAIN-TV 00 TVP5147 RF INPUT
30 CTI GAIN-OTHER 00 TVP5147 EXCEPT RF INPUT
31 CTI SLICE LEVEL-TV 00 TVP5147 RF INPUT
32 CTI SLICE LEVEL-OTHER 00 TVP5147 EXCEPT RF INPUT
33 BRIGHTNESS-TV 80 TVP5147 RF INPUT
34 BRIGHTNESS-AV 80 TVP5147 EXCEPT RF INPUT
35 CONTRAST-TV 79 TVP5147 RF INPUT
36 CONTRAST-AV 79 TVP5147 EXCEPT RF INPUT
37 COLOUR-TV 80 TVP5147 RF INPUT
38 COLOUR-AV 80 TVP5147 EXCEPT RF INPUT
39 HUE-TV 00 TVP5147 RF INPUT (NTSC)
40 HUE-AV 00 TVP5147 EXCEPT RF INPUT (NTSC)
41 HUE-OTHER 00 TVP5147 OTHER
42 C-BPF-TVPAL-N 08 TVP5147 RF INPUT
43 C-BPF-OTHERP-N 0E TVP5147 EXCEPT RF INPUT
44 C-BPF-TVN 02 TVP5147 RF INPUT
45 C-BPF-OTHER-N 02 TVP5147 EXCEPT RF INPUT
46 C-BPF-TVPAL-M 08 TVP5147 RF INPUT
47 C-BPF-OTHER-M 0E TVP5147 EXCEPT RF INPUT
48 02 TVP5147
49 02 TVP5147
50 COL-KILLER GAIN-TV 04 TVP5147 RF INPUT
51 COL-KILLER GAIN-OTHER 04 TVP5147 EXCEPT RF INPUT
52 575i SUB-CONT 36 MST5151A DVD INPUT, Input Video Format: 575i
53 575i SUB-BRIGHT 40 MST5151A
54 575i SUB-COLOR 28 MST5151A
55 575i SUB-TINT 15 MST5151A
56 575i SUB-SHARP 00 MST5151A
57 575p SUB-CONT 00 MST5151A DVD INPUT, Input Video Format:575p
58 575p SUB-BRIGHT 00 MST5151A
59 575p SUB-COLOR 00 MST5151A
60 575p SUB-TINT 00 MST5151A
61 575p SUB-SHARP 00 MST5151A
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