SANYO LC86P7148 Datasheet

Ordering number : ENN*6692

CMOS IC

LC86P7148

8-Bit Single Chip Microcontroller

with One-Time Programmable PROM

Preliminary
Overview

The LC86P7148 is a CMOS 8-bit single chip microcontroller with one-time PROM for the LC867100 series. This
microcontroller has the function and the pin description of the LC867100 series mask ROM version, and 48K-byte PROM.
QFP package are available for shipping as well as LC867100 series. It is suitable to set up first release, prototyping,
developing and testing of set.

Features

(1) Option switching by PROM data

The option function of the LC867100 series can be specified by the PROM data.

LC86P7148 can be checked the functions of the trial pieces using the mass production board.
(2) Internal one-time PROM capacity : 49152 bytes
(3) Internal RAM capacity : 1152 bytes

Used PROM or RAM capacity are equal ROM or RAM capacity of mask ROM version which applies LC86P7148.

Mask ROM version PROM capacity RAM capacity

LC867148 49152 bytes 1152 bytes
LC867140 40960 bytes 1152 bytes
LC867132 32768 bytes 768 bytes
LC867128 28672 bytes 768 bytes
LC867124 24576 bytes 768 bytes
LC867120 20480 bytes 640 bytes
LC867116 16384 bytes 640 bytes
LC867112 12288 bytes 512 bytes
LC867108 8192 bytes 512 bytes

Programming service

We offers various services at nominal charges. These include the ROM writing, the ROM reading, the package stamping
and the screening. Contact our representative for further information.

Ver.1.00
D2994

91400 RM (IM) HK No.6692-1/21

LC86P7148

(4) Operating supply voltage : 4.5V to 6.0V
(5) Instruction cycle time : 1µs to 366µs
(6) Operating temperature : -30°C to +70°C
(7) The pin compatible with the LC867100 series mask ROM devices
(8) Applicable mask ROM version : LC867148/LC867140/LC867132/LC8671 28/LC867124/LC867120
/LC867116/LC867112/LC867108
(9) Factory shipment : QFP80E

Notice for use

LC86P7148 is provided for the first release and small shipping of the LC867100 series.
At using, take notice of the followings.

(1) A point of difference LC86P7148 and LC867100 series

Item LC86P7148 LC867148/40/32/28/24/20/16/12/08

Operation after reset
releasing

Operating supply
voltage range (VDD)
Total output current

[∑IOAL(2)]
[∑IOAL(3)]

Power dessipation

LC86P7148 uses 256 bytes that is addressed on 0FF00H to FFFFH in the program memory as the option configuration data
area. T his option configuration can execute all options which LC867100 series have. Next tables show the options that
correspond and not correspond to LC86P7148.

• A kind of the option corresponding of the LC86P7148
A kind of option Pins, Circuits Contents of the option

Input/output form of
input/output ports

Pull-up MOS Tr. of
input port

*1) Specified in a bit.
*2) Specified in nibble unit. Pull-up MOS Tr. is not provided in N-channel open drain output port.

The option is specified until 3ms after going
to a ‘H’ level to the reset terminal by
degrees. The program is executed from 00H
of the program counter.

4.5V to 6.0V 2.5V to 6.0V

Refer to ‘electrical characteristics’ on the semiconductor news.

Port 0
(specified in a bit)

Port 1
(specified in a bit)

*1
Port 7
(specified in a bit) *1
Each of P74 and P75 has no
option

1. Input : No Pull-up MOS Tr .
Output : N-channel open drain *1

2. Input : Pull-up MOS Tr.
Output : CMOS *2

1. Input : Programmable pull-up MOS Tr.
Output : N-channel open drain

2. Input : Programmable pull-up MOS Tr.

Output : CMOS

1. No Pull-up MOS Tr.

2. Pull-up MOS Tr.

The program is executed from 00H of the
program counter immediately after going to
a ‘H’ level to the reset terminal.

No.6692-2/21

LC86P7148

(2) Option

The option data is created by the option specified program “SU86K.EXE”. The created option data is linked to the
program area by linkage loader “L86K.EXE” .

(3) ROM space

LC86P7148 and LC8671 00 series use 256 bytes that is addressed on 0FF00H to 0FFFFH in the program memory as the
option specified data area. These program memory capacity are 49152 bytes that is addressed on 0000H to 0BFFFH.

0FFFFH

0FF00H

0EFFFH
0DFFFH
0CFFFH
0BFFFH
0AFFFH

9FFFH
8FFFH
7FFFH
6FFFH
5FFFH
4FFFH
3FFFH
2FFFH
1FFFH
0FFFH

0000H

Option data

area 256 bytes

Program area

48K bytes

LC867148 LC867140

Option

Data Area

Program area

40K bytes

Option

Data Area

Program area

32K bytes

LC867132

Option

Data Area

Program area

28K bytes

LC867128

Option

Data Area

Program area

24K bytes

LC867124

0FFFFH

0FF00H
0EFFFH
0DFFFH
0CFFFH
0BFFFH
0AFFFH

9FFFH
8FFFH
7FFFH
6FFFH
5FFFH
4FFFH
3FFFH
2FFFH
1FFFH
0FFFH

0000H

Option data

area 256 bytes

Program area

20K bytes

LC867120 LC867116

Option

Data Area

Program area

16K bytes

Option

Data Area

Program area

12K bytes

LC867112

Option

Data Area

Program area

8K bytes

LC867108

(4) Ordering information

1. When ordering the identical mask ROM and PROM devices simultaneously.
Provide an EPROM containing the target memory contents together with the separate order forms for each of the mask
ROM and PROM versions.

2. When ordering a PROM device.
Provide an EPROM containing the target memory contents together with an order form.

No.6692-3/21

LC86P7148

How to use

(1) Specification of option

The LC86P7148 must be programmed after specifying option data. The option is specified by “SU86K.EXE”. The
specified option file and the file created by our macro assembler “M86K.EXE” are linked by our linkage loader
“L86K.EXE” which creates .HEX file, then the option code is put in the option specified area (0FF00H to 0FFFFH) of
its .HEX file.

(2) How to program for the EPROM

The LC86P7148 can be programmed by EPROM programmer with attachment ; W86EP7148Q

• Recommended EPROM programmer

Productor EPROM programmer
Advantest R4945, R4944, R4943

Andou AF-9704
AVAL PKW-1100, PKW-3000

Minato electronics MODEL1890A

• “27512 (Vpp=12.5V) Intel high speed programming” mode available. The address must be set to “0 to 0FFFFH” and a
jumper (DASEC) must b e set to ‘OFF’ at progr amming.

(3) How to use the data security function

“Data security” is the disabled function to read the data of the EPROM.
The following is the process in order to execute the data security.

1. Set ‘ON’ the jumper of attachment.

2. Program again. Then EPROM programmer displays the error. The error means normally activity of the data

security. It is not a trouble of the EPROM programmer or the LSI.

Notes

• Data security is not executed when the data of all address have ‘FFH’ at the sequence 2 above.

• The programming by a sequential operation “BLANK=>PROGRAM=>VERIFY” cannot be executed data security at the
sequence 2 above.

• Set to ‘OFF’ the jumper after executing the data security.

Data security

Not data security

W86EP7148Q

No.6692-4/21

LC86P7148

Pin Assignment

COM0/PL0

V1/PL4

V2/PL5

V3/PL6

S31/PD7

S30/PD6

S29/PD5

S28/PD4

S27/PD3

S26/PD2

S25/PD1

S24/PD0

S23/PC7

S22/PC6

S21/PC5

S20/PC4

S19/PC3

S18/PC2

S17/PC1

S16/PC0

S13/PB5

S12/PB4

VSS3

VDD3

COM1/PL1
COM2/PL2
COM3/PL3

VSS2

VDD2

P00
P01
P02
P03
P04
P05
P06
P07

P10/SO0

P11/SI0/SB0

P12/SCK0

64

63

62

61

60
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80

1 2 3 4 5 6 7 8 9

59

58

57

56

55

10

54

11

53

12

52

13

51

14

50

15

49

16

48

17

47

18

46

19

45

20

44

21

43

22

42

23

41

24

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25

S11/PB3
S10/PB2
S9/PB1
S8/PB0
S7/PA7
S6/PA6
S5/PA5
S4/PA4
S3/PA3
S2/PA2
S1/PA1
S0/PA0
P73/INT3/T0IN
P72/INT2/T0IN
P71/INT1
P93/DA3/AN11

CF1

P13/SO1

P15/SCK1

P14/SI1/SB1

RES

P16/BUZ

XT1/P74

P70/INT0

P17/PWM0

CF2

VSS1

XT2/P75

VDD1

P80/AN0

P81/AN1

P82/AN2

P83/AN3

P84/AN4

P85/AN5

P86/AN6

P87/AN7

P90/DA0/AN8

P91/DA1/AN9

P92/DA2/AN10

Package Dimension

(unit : mm)

3174

SANYO : QIP-80E

Notes •The QFP packages should be heat-soaked for 12 hours at 1 25°C immediately prior to mounting (This baking is called

pre-baking).

•After pre-baking a controlled environment must be maintained until soldering. The environment must be held at a
temperature of 30°C or less and a humidity level of 70% or less. Please solder within 24 hours.

No.6692-5/21

System Bl ock Diagram

y

SIO0

SIO1

Timer 0

Timer 1

Real Time Service

RAM

128 b

LCD

Controller

S0 – S7 (PA)

S8 – S13 (PB)
S16 – S23 (PC)
S24 – S31 (PD)

COM0 – COM3(PL)

tes

Interrupt Control

Stand-by C ontr ol

X’tal

CF

RC

Clock

Generator

Bus Interface Base Timer

Port 1

Port 7

Port 8

Port 9

ADC

INT0 - 3

Nose Filter

DAC

LC86P7148

IR

PROM

Control

PROM(48KB)

PC

ACC

B Register

C Register

ALU

PSW

RAR

RAM

Stack Pointer

Port 0

Watchdog T i mer

PLA

A15-A0
D7-D0
TA
CE
OE
DASEC

No.6692-6/21

LC86P7148

l

Pin Description

Pin name I/O Function description Option PROM mode
VSS1 *1 - Power pin (–) -
VSS2 *1 - Power pin (–) -
VSS3 *1 - Power pin (–) -
VDD1 *1 - Power pin (+) -
VDD2 *1 - Power pin (+) -
VDD3 *1 - Power pin (+) -
PORT0

P00 - P07

I/O • 8-bit input/output port

Input/output in nibble units

• Input for port 0 interrupt

• Input for HOLD release

• Pull-up resistor :
Provided/Not provided
(specified in nibble units)

• Output form (P00 – P07) :
CMOS/N-channel open drain

(specified in a bit)
PORT1
P10 - P17

I/O • 8-bit input/output port

Input/output can be specified in bit unit

• Other pin functions

• Output form :

CMOS/N-channel open drain

(specified in a bit)

Data line
D0 to D7

P10 SIO0 data output
P11 SIO0 data input/bus input/output
P12 SIO0 clock input/output
P13 SIO1 data output
P14 SIO1 data input/bus input/output
P15 SIO1 clock input/output
P16 Buzzer output
P17 Timer1 output (PWM output)

PORT7

P70

P71 - P73

P74

- P75

• 6-bit input port

• Other pin functions

I/O

P70 : INT0 input/HOLD release input/
N-channel Tr. output for watchdog

I

timer
P71 : INT1 input/HOLD release input
P72 : INT2 input/timer 0 event input
P73 : INT3 input with noise filter/timer 0
event input

• Interrupt received form, vector address

I

rising falling rising

&

high
level

falling
INT0 enable enable disable enable enable 03H
INT1 enable enable disable enable enable 0BH
INT2 enable enable enable disable disable 13H
INT3 enable enable enable disable disable 1BH

P74

: XT1 terminal for crystal oscillation

Pull-up resistor :
Provided/Not provided
(specified in a bit)
(P70, P71, P72 , P73)

P74

, P75 don’t have the

*

pull-up resistor option.

low

vector

level

Power for
programming

PROM contro
signals

DASEC(*2)

(*3)

OE

(*4)

CE

P75 : XT2 terminal for crystal oscillation
Port8
P80 – P87

I • 8-bit input port

• Other function

-

AD input port (8 port pins)
PORT9
P90 - P93

I/O • 4-bit input/output port

• Other function

-

DA output port (4 port pins)

AD input port (4 port pins)

No.6692-7/21