Sanyo LC86P5032 Specifications

Ordering number: EN5631
LC86P5032
CMOS LSI
LC86P5032
8-Bit Single-Chip Microcontroller
Overview
The LC86P5032 microcontroller, a new addition to the LC865000 series, is a 8-bit single chip CMOS microcontroller with one-time PROM. This microcontroller has the same function and pin assignment as for the LC865000 series mask ROM version, and a 32K-byte PROM. The same DIP/QFP packages as for the LC865000 series are available for shipment. It is suitable for setting up the first release, for prototyping and developing and testing applications.
Features
(1) Option switching using PROM data
The optional functions of the LC865000 series can be specified using PROM data. The functions of the trial products can be evaluated using a
mass production board. (2) Internal one-time PROM capacity : 32768 bytes (3) Internal RAM capacity : 512 bytes
Mask ROM version PROM capacity RAM capacity
LC865032 32512 bytes 512 bytes LC865028 28672 bytes 512 bytes LC865024 24576 bytes 512 bytes LC865020 20480 bytes 384 bytes LC865016 16384 bytes 384 bytes LC865012 12288 bytes 384 bytes LC865008 8192 bytes 384 bytes
unit : mm
3071-DIP64S
[LC86P5032]
57.2
0.95 0.48 1.78 1.01
unit : mm
3159-QFP64E
[LC86P5032]
17.2
14.0
0.8
0.35
33
1
16
15.6
17.2
1.6
14.0
1.0
0.8
1.0
1.0
48
49
64
3364
19.5
321
5.0max
4.00.51min
3.2
SANYO : DIP52S
1.6
1.0
0.15
32
17
0.1
3.0max
2.7
0.8
SANYO : QFP64E
16.8
0.25
(4) Operating supply voltage : 4.5 to 6.0 V (5) Instruction cycle time : 0.98 to 400 µs (6) Operating temperature range : –30°C to +70°C (7) Pins and package compatible with the mask ROM version (8) Applicable mask version : LC865032/LC865028/LC865024/LC865020/LC865016/LC865012, LC865008 (9) Factory shipment : DIP-64S
QFP-64E
Programming service We offer various services at nominal charges. These include ROM writing, ROM reading, and package stamping and screening.
Contact our local representatives for further information.
SANYO Electric Co., Ltd. Semiconductor LSI Div. Microcomputer Development Dep.
O3097HA (II)
No. 5631-1/22
LC86P5032
Usage Notes
When using, please take note of the following.
(1) Differences between the LC86P5032 and the LC865000 series
Item LC86P5032 LC865032/28/24/20/16/12/08 Port status at reset Please refer to "Port status at reset" on the next page. Operation after releasing reset The option is specified by degrees within 3 ms
after applying a 'H' level to the reset pin. The program located at 00H is executed.
Operating voltage range 4.5 to 6.0 V 2.7 to 6.0 V (V
)
DD
Total output current [ ∑I
(1) ]
OAH
[ ∑I
(1) ]
OAH
Current drain Refer to 'Electrical Characteristics' on the semiconductor news. [ I
(1)]
DDOP
[ I
(2)]
DDOP
[ I
(3)]
DDOP
[ I
(4)]
DDOP
LC86P5032 Options
The program located at 00H is executed immediately after applying a 'H' level to the reset pin.
Option Pins, Circuits Option Settings
Configuration of input/output ports Port 0 1. Input : No pull-up MOS transistor
(Can be specified for Output : N-channel open drain each bit.) 2. Input : Pull-up MOS transistor
Output : CMOS
Ports 1, 2 1. Input : No programmable pull-up MOS transistor (Can be specified for Output : N-channel open drain each bit.) 2. Input : Programmable pull-up MOS transistor
Output : CMOS
Ports 3, 4, 5 1. Input : No programmable pull-up MOS transistor (Can be specified for Output : N-channel open drain each bit.) 2. Input : Programmable pull-up MOS transistor
Output : CMOS
Port 7 pull-up MOS transistor Port 7 1. Pull-up MOS transistor not provided
(Can be specified for 2. Pull-up MOS transistor provided each bit.) *P74 has no pull-up resistor option.
The port operation related to the option is different at reset. Please refer to the next table.
No. 5631-2/22
LC86P5032
Port configuration at reset
Pin Option settings LC86P5032 LC865032/28/24/20/16/12/08 P0 Input : No pull-up MOS transistor (Same as for the mask version) Input mode without pull-up MOS
Output : N-channel open drain transistor (Output is OFF) Input : Pull-up MOS transistor Input mode Input mode with pull-up MOS
Output : CMOS • The Pull-up MOS transistor is not transistor (Output is OFF)
present during reset or several hundred
microseconds after releasing reset. After that, the pull-up MOS transistor is present. (Output is OFF)
P1,
Input : Programmable pull-up MOS transistor
P2 Output : N-channel open drain transistor (Output is OFF)
Input : Programmable pull-up MOS transistor Output : CMOS transistor (Output is OFF)
P3, Input : Non-Programmable pull-up (Same as for the mask version) Input mode without pull-up MOS P4, MOS transistor transistor (Output is OFF) P5 Output : N-channel open drain
Input : Programmable pull-up MOS (Same as for the mask version) Input mode without pull-up MOS transistor transistor (Output is OFF) Output : CMOS
P7 Pull-up MOS transistor not provided (Same as for the mask version)
Pull-up MOS transistor provided Input mode Input mode with pull-up MOS
(Same as for the mask version) Input mode without pull-up MOS
(Same as for the mask version) Input mode without pull-up MOS
Input mode without pull-up MOS transistor
• The pull-up MOS transistor is not transistor
present during reset or several hundred
microseconds after releasing reset. After that, the pull-up MOS transistor is present.
(2) Option
The LC86P5032 uses 256 bytes addressed 7F00H to 7FFFH in program memory as option data area. This area does not affect the execution of the program but means that the LC865032 program memory is 32512 bytes addressed 0000H to 7EFFH. The option data is written using the option specifying program "SU865000. EXE". The option data is linked to the program area by linkage loader "L865000. EXE".
(3) ROM space
7FFFH 7F00H
Option data
area 256 bytes
Option
Data Area
Option
Data Area
Option
Data Area
Option
Data Area
Option
Data Area
Option
Data Area
7EFFH
6FFFH 5FFFH
4FFFH 3FFFH
32K 28K 24K 20K 16K 12K 8K
0FFFH
LC865032 LC865028 LC865024 LC865020 LC865016 LC865012 LC865008
No. 5631-3/22
LC86P5032
(4) Ordering information
1.When ordering identical mask ROM and PROM devices simultaneously. Provide an EPROM containing the target memory contents together with separate order forms for each of the mask ROM and PROM versions.
2.When ordering a PROM device. Provide an EPROM containing the target memory contents together with an order form.
How to Use
(1) Specification of options
Programming data for the LC86P5032s EPROM is required. The debugged evaluation file (EVA file) must be converted to an INTEL-HEX formatted file (HEX file) with file converter program EVA2HEX.EXE. The HEX file is used as the programming data for the LC86P5032.
(2) How to program the EPROM
The LC86P5032 can be programmed by an EPROM programmer with attachments W86EP5032D and W86EP5032Q.
Recommended EPROM programmer
Supplier EPROM programmer
Advantest R4945, R4944, R4943
Andou AF-9704
AVAL PKW-1100, PKW-3000
Minato Electronics MODEL 1890A
"27512 (Vp-p = 12.5 V) Intel high-speed programming" mode available. The address must be set to "0000H to 7FFFH"
and the jumper (DASEC) must be set 'OFF' at programming.
(3) How to use the data security function
"Data security" is a function to prevent EPROM data from being read. Instructions on using the data security function:
1. Set the jumper of attachment 'ON'.
2. Attempt to program the EPROM. The EPROM programmer will display an error. The error indication is a result of normal activity of the data security feature. This is not a problem with the EPROM programmer chip.
Notes
The data security function is not carried out when the data of all addresses contain 'FF' at step 2 above.
Data security cannot be executed when the sequential operation "BLANK=>PROGRAM=>VERIFY" is used at step 2 above.
Set the jumper 'OFF' after execution of data security.
Pin 1 mark
OFF
O
OFF
Pin 1
ON
O
F
F
O
N
Data security OFF Data security OFF
Pin 1
N
OFF
ON
W86EP5032D W86EP5032Q
No. 5631-4/22
Pin Assignment
LC86P5032
P10/SO0
P11/SI0/SB0
P12/SCK0
P13/SO1
P14/SI1/SB1
P15/SCK1
P16/BUZ
P17/PWM
TEST1
RES
XT1/P74
XT2
V
VSS
SS
CF1 CF2
V
DD
VDD P80/AN0 P81/AN1 P82/AN2 P83/AN3 P84/AN4 P85/AN5 P86/AN6 P87/AN7
P70/INT0
P71/INT1 P72/INT2/T0IN P73/INT3/T0IN
P30 P31 P32 P33
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
1 2 3 4 5 6 7 8 9
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
P07 P06 P05 P04 P03 P02 P01 P00 P27 P26 P25 P24 P23 P22 P21 P20
VDDV
PP
VDDVPP
V
SS
VSS P51 P50 P47 P46 P45 P44 P43 P42 P41 P40 P37 P36 P35 P34
Top view
SANYO : DIP64S
No. 5631-5/22
0
Pin Assignment
LC86P5032
TEST1
RES
XT1/P74
XT2
V
SS
VSS
CF1 CF2 V
DD
VDD
P80/AN0 P81/AN1
P82/AN2 P83/AN3 P84/AN4
P85/AN5 P86/AN6 P87/AN7
64
48
49 50 51
52 53
54 55 56
57 58 59
60 61 62
63
P16/BUZ
P15/SCK1
P17/PWM
47
46
123
P70/INT0
P71/INT1
P72/INT2/T0IN
P13/SO1
P11/SI0/SB
P12/SCK0
P14/SI1/SB1
43
P31
41
42
789
P32
44
45
456
P30
P73/INT3/T0IN
P10/SO0
P06
P07
40
39
P34
P35
P33
P05
P04
37
38
101112
P36
P03
36
131415
P40
P37
P02
35
P41
P01
34
P42
31 30
29 28
27 26
25 24 23
22 21 20
19 18 17
P00
33
P43
32
16
P27 P26 P25
P24 P23 P22
P21 P20 VDDV
PP
VDDVPP VSS
V
SS
P51 P50
P47 P46
P45 P44
Top view
SANYO : QFP64E
No. 5631-6/22
System Block Diagram
LC86P5032
Base timer
SIO 0
SIO 1
Timer 0
Interrupt control
Standby control
CF
RC
X tal
Colck
generator
Bus interface
Port 1
Port 7
Port 8
IR PLA
PROM control
PROM(32KB)
PC
ACC
B register
C register
ALU
A16 to A0 D7 to D0 TA CE OE DASEC
DD VPP
V
Timer 1
ADC
INT0 to INT3
Noise rejection filter
Real-time
service
XRAM
128 bytes
Port 2
Port 3
Port 4
Port 5
PSW
RAR
RAM
Stack
pointer
Port 0
Watchdog timer
No. 5631-7/22
Loading...
+ 15 hidden pages