Sanyo LC7861KE Specifications

Ordering number : EN*4818

93098HA (OT) / N1594TH (OT) No. 4818-1/18

LC7861KE

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

Digital Signal Processor for

Compact Disc Players

CMOS LSI

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.

Overview

The LC7861KE is a CMOS LSI that implements the signal processing and servo control required by compact disk players, laser disks, CD-V, CD-I and related products. The LC7861KE provides several types of signal processing to reduce the cost of CD player units, including demodulation of the optical pickup EFM signal, deinterleaving and error detection and correction. It also processes a rich set of servo system commands sent from the control microprocessor. It can directly interface to the dedicated serial inputs provided by the Sanyo LC78815 and LC78816 D/A converters.

Functions

• Input signal processing: The LC7861KE takes an HF signal as input, digitizes (slices) that signal at a precise level, converts that signal to an EFM signal, and generates a PLL clock with an average frequency of

4.3218 MHz by comparing the phases of that signal and a VCO output.

• Precise reference clock and necessary internal timing generation using an external 16.9344 MHz crystal oscillator

• Disk motor speed control using a frame phase difference signal generated from the playback clock and the reference clock

• Frame synchronization signal detection, protection and interpolation to assure stable data readout

• EFM signal demodulation and conversion to 8-bit symbol data

• Subcode data separation from the EFM demodulated signal and output of that data to an external microprocessor

• Subcode Q signal output to a microprocessor over the serial interface after performing a CRC error check

• Demodulated EFM signal buffering in internal RAM to handle up to ±4 frames of disk rotational jitter

• Demodulated EFM signal reordering in the prescribed order for data unscrambling and de-interleaving

• Error detection, correction, and flag processing (dual error correction scheme: C1 plus dual C2 correction)

• The LC7861KE sets the C2 flags based on the C1 flag and a C2 check, and then performs signal interpolation or previous value hold depending on the C2 flag. The interpolation circuit uses a quadruple interpolation scheme. The circuit holds the previous value for up to four consecutive C2 flags.

• Support for command input from a control microprocessor: commands include track jump, focus start, disk motor start/stop, muting on/off and track count (8-bit serial input)

• Built-in digital output circuits

• Arbitrary track counting to support high-speed data access

• Zero cross muting

• Support for double speed dubbing

• Complete support for CD-ROM products. The LC7861KE directly interfaces with the Sanyo LC89510 and can also handle CD-ROM XA applications.

• Output signals for use by external D/A converters to improve the output data continuity by oversampling and digital filtering

Features

• Compact and space-saving 64-pin QIP package

• Silicon-gate CMOS design (low power dissipation)

• Single 5 V power supply (suitable for portable sets)

• DEMO pin for improved operability in adjustment

Preliminary

Equivalent Circuit Block Diagram

Pin Assignment

No. 4818-2/18

LC7861KE

SANYO: QFP64E

[LC7861KE]

Package Dimensions

unit: mm

Specifications

Absolute Maximum Ratings at Ta = 25°C, VSS= 0 V

Allowable Operating Ranges at Ta = 25°C, V

= 0 V

Electrical Characteristics at Ta = 25°C, V

= 0 V, VDD= 5 V

No. 4818-3/18

LC7861KE

Parameter Symbol Conditions Ratings Unit

Maximum supply voltage V

max VSS– 0.3 to +7.0 V

Input voltage V

VSS– 0.3 to VDD+ 0.3 V

Output voltage V

OUT

VSS– 0.3 to VDD+ 0.3 V Allowable power dissipation Pd max 300 mW Operating temperature Topr –30 to +75 °C Storage temperature Tstg –40 to +125 °C

Parameter Symbol Conditions

Ratings

Unit

min typ max

Supply voltage V

4.5 5.5 V

(1) TEST1 to 5, AI, FZD, HFL, DEMO, DFOFF, M/L, RES 0.7 V

Input high level voltage

(2) SBCK, RWC, COIN, CQCK, CS 2.2 V

(3) EFMIN 0.6 V

(4) TES 0.8 V

(1) TEST1 to 5, AI, FZD, HFL, DEMO, DFOFF, M/L, RES V

0.3 V

Input low level voltage

(2) SBCK, RWC, COIN, CQCK, CS V

0.8 V

(3) EFMIN V

0.4 V

(4) TES V

0.2 V

Data setup time t

set up

COIN, RWC: Figure 1 400 ns

Data hold time t

hold

RWC: Figure 1 400 ns

High level clock pulse width t

WøH

SBCK, CQCK: Figures 1, 2 and 3 400 ns

Low level clock pulse width t

WøL

SBCK, CQCK: Figures 1, 2 and 3 400 ns

Data read access time t

RAC

Figures 2 and 3 0 400 ns

Command output time t

RWC

RWC: Figure 1 1000 ns

Sub-Q read enable time t

SQE

Figure 2, no RWC signal 11.2 ms

Subcode read cycle t

Figure 3 136 µs

Subcode read enable t

Figure 3 400 ns

Crystal oscillator frequency fX’tal X

, X

OUT

16.9344 MHz

Operating frequency range

fop (1) AI 2.0 20 MHz fop (2) EFMIN: V

≥ 1 Vp-p 10 MHz

Parameter Symbol Conditions

Ratings

Unit

min typ max

Supply current I

17 30 mA

(1)

AI, EFMIN, FZD, TES, SBCK, COIN, CQCK, RES,

5µA

Input high level current

HFL, RWC, M/L: V

= V

IIH(2) TEST1 to 5, DEMO, TESTA, CS: VIN= VDD= 5.5 V 25 75 µA

Input low level current I

AI, EFMIN, FZD, TES, SBCK, COIN, CQCK, RES,

–5µA

HFL, RWC, M/L: V

= V

AO, PDO, EFMO, EFMO, CLV+, CLV–, FOCS, FSEQ,

(1) PCK, TOFF, TGL, THLD, JP+, JP–, EMPH, EFLG, VDD– 1V

FSX, V/P: I

= –1 mA

Output high level voltage

(2) DOUT: IOH= –12 mA VDD– 0.5 V

LASER, SQOUT, 16M, 4.2M, CONT, SMP, SMP1,

(3)

SMP2, LRCLK, WRQ, C2F, DFOUT, DACLK, SFSY,

VDD– 1V

LRSY, SBSY, CK2, PW, ROMOUT, C2FCLK: I

= –0.5 mA

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Wave Form

Figure 1 Command Input

Figure 2 Subcode Q Output

Figure 3 Subcode Output

No. 4818-4/18

LC7861KE

Parameter Symbol Conditions

Ratings

min typ max

Unit

AO, PDO, EFMO, EFMO, CLV

, CLV–, FOCS, FSEQ,

(1) PCK, TOFF, TGL, THLD, JP+, JP–, EMPH, EFLG, 1 V

FSX, V/P: I

= 1 mA

(2) DOUT: IOL= 12 mA 0.5 V

Output low level voltage LASER, SQOUT, 16M, 4.2M, CONT, SMP, SMP1,

(3)

SMP2, LRCLK, WRQ, DFOUT, DACLK, SFSY, CK2,

0.4 V

PW, ROMOUT, C2FCLK, CF2, LRSY, SBSY: I

= 2 mA

(4) FST: IOL= 5 mA 0.75 V

Output off leakage current

OFF

(1) PDO, FST: VOH= V

5µA

OFF

(2) PDO, FST: VOL= V

–5µA

Pin Functions

No. 4818-5/18

LC7861KE

No. Name I/O Description

1 TEST1 I LSI test pin. Normally left open. 2AO O 3AI I 4 PDO O 5V

— GND 6 EFMO O 7 EFMO O 8 EFMIN I 9 TEST2 I LSI test pin. Normally left open.

10 CLV

Disk motor control output.

11 CLV

–

O 12 V/P O Outputs a high level during CLV rough servo and a low level during phase control. 13 FOCS O 14 FST O 15 FZD I 16 HFL I 17 TES I 18 PCK O 19 FSEQ O 20 TOFF O 21 TGL O 22 THLD O 23 TEST3 I LSI test pin. Normally left open. 24 V

— +5 V

25 JP

O 26 JP

–

O 27 DEMO I Sound output function for end product adjustment manufacturing steps. 28 TEST4 I LSI test pin. Normally left open. 29 EMPH O De-emphasis is required when high. 30 DFOFF I Digital filter on/off switch. Filtering is turned off on a high level input. 31 SMP2 O 32 SMP1 O 33 LRCLK O 34 SMP O 35 DFOUT O 36 DACLK O 37 DFIN O LSI test pin. Normally left open. 38 LRSY O 39 CK2 O 40 ROMOUT O CD-ROM application output signals 41 C2FCLK O 42 C2F O 43 DOUT O Digital output 44 SBSY O Subcode block synchronization signal 45 EFLG O C1, C2, single and double error correction monitor pin 46 PW O 47 SFSY O 48 SBCK I 49 FSX O 7.35 kHz synchronization signal output 50 WRQ O 51 RWC I 52 SQOUT O

Inputs for the LA9210 internal VCO output. (8.6436 MHz) Set up PDO so that the frequency increases when the EFM signal and the phase output are positive.

Supply an HF signal with a 1 to 2 Vp-p level to EFMIN. EFMO and EFMO output EFM signals with opposite phases that passed through an amplitude limiter circuit. These are used for slice level control.

FOCS outputs a high level when the focus servo is off. The lens is lowered by FST, and when FOCS is high the lens is raised gradually. FOCS is reset when an FZD input occurs. These are used for focus pull-in.

PCK is the 4.3218 monitor pin. It outputs a high level when the synchronization (positive FS) detected from the EFM signal matches the counter synchronization (interpolation FS). (The output is latched for a single frame.)

The LC7861KE outputs a kick pulse from JP

and JP–in response to a track jump command. A track jump of the

specified number of tracks (1, 4, 16, 32, 64, and 128) is performed.

Outputs for an external D/A converter. These include a latch signal, an L/R switching signal, and a sample and hold signal.

SFSY is the subcode frame synchronization signal. The P, Q, R, S, T, U, V and W subcodes can be read out by applying 8 clock cycles to SBCK.

WRQ goes high when the subcode Q data passes the CRC check. An external controller can read out data from SQOUT by monitoring this pin and applying a CQCK signal. Set M/L to low when data is required LSB first.

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Pin Applications

1. HF signal input circuit; Pin 8: EFMIN, pin 7: EFMO, pin 6: EFMO An EFM signal (NRZ) with an optimal slice level can be acquired by inputting the HF signal to EFMIN.

2. PLL clock generation circuit; Pin 4: PDO, Pin 3: AI, Pin 2: AO

A VCO can be constructed by combining the LC7861KE with the Sanyo LA9210M. The PDO pin swings in the positive direction when the VCO phase lags.

No. 4818-6/18

LC7861KE

No. Name I/O Description

53 COIN I

54 CQCK I 55 RES I This pin must be set low briefly after power is first applied. 56 M/L I 57 LASER O Output pin controllable by serial data sent from the microprocessor. 58 16M O 16.9344 MHz output pin 59 4.2M O 4.2336 MHz output pin 60 CONT O Output pin controllable by serial data sent from the microprocessor. 61 TEST5 I LSI test pin. Normally left open. 62 CS I Chip select pin. The LC7861KE becomes active when this pin is low. (A pull-down resistor is built-in.) 63 X

Connections for a 16.9344 MHz crystal oscillator

64 X

OUT

The control microprocessor can send commands to the LC7861KE by setting RWC high and then sending command data synchronized with CQCK. It is also possible to read out the TOC memory data by sending CQCK from the SQOUT pin by command switching.

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