Sanyo LC75757W Specifications

Ordering number : EN5951

CMOS IC

LC75757E, 75757W

1/3 Duty VFD Driver with Key Input Function

Overview

The LC75757E and LC75757W are 1/3 duty VFD drivers that can be used for electronic tuning frequency display and other applications under the control of a microcontroller. These products can directly drive VFDs with up to 123 segments. It also includes a key scan circuit and can support input from up to 25 keys and can thus reduce the number of lines to the front panel in application systems.

Features

•Key input from up to 25 keys

(Key scans are only performed when keys are pressed.)

•123 segment outputs.

•Noise reduction circuits are built into the output drivers.

•Serial data I/O supports CCB format communication with the system controller.

•Dimmer and sleep mode can be controlled by serial data input.

•High generality since display data is displayed without the intervention of a decoder.

•All segments can be turned off with the BLK pin.

Package Dimensions

unit: mm

3151-QFP64E

[LC75757E]

SANYO: QFP64E (QIP64E)

unit: mm

3190-SQFP64

[LC75757W]

SANYO: SQFP64

•CCB is a trademark of SANYO ELECTRIC CO., LTD.

•CCB is SANYO’s original bus format and all the bus addresses are controlled by SANYO.

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

N2598RM (OT) No. 5951-1/18

LC75757E, LC75757W

Specifications

Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V

	Parameter	Symbol			Conditions	Ratings	Unit
	Maximum Supply voltage	VDD max	VDD			–0.3 to +6.5	V
		VFL max	VFL			–0.3 to +21.0	V
		VIN1
	Input voltage		DI, CL, CE,	BLK		–0.3 to +6.5	V
		VIN2	OSCI, KI1 to KI5			–0.3 to VDD +0.3	V
		VOUT1	S1 to S41, G1 to G3			–0.3 to VFL +0.3	V
	Output voltage	VOUT2	OSCO, KS1 to KS5			–0.3 to VDD +0.3	V
		VOUT3	DO			–0.3 to +6.5	V
		IOUT1	S1 to S41			6	mA
	Output current	IOUT2	G1 to G3			60	mA
		IOUT3	KS1 to KS5			1	mA
	Allowable power dissipation	Pd max	Ta = 85°C (LC75757E)			400	mW
			Ta = 85°C (LC75757W)			300	mW
	Operating temperature	Topr				–40 to +85	°C
	Storage temperature	Tstg				–50 to +150	°C

Allowable Operating Ranges at Ta = –40 to +85°C, VDD = 4.5 to 5.5 V, VSS = 0 V

Parameter

Symbol

Conditions

Ratings

Unit

min

typ

max

Supply voltage

VDD

VDD

4.5

5.0

5.5

V

VFL

VFL

8

12

18

V

VIH1

DI, CL, CE,

BLK

0.8 VDD

5.5

V

High-level input voltage

VIH2

OSCI

0.8 VDD

VDD

V

VIH3

KI1 to KI5

0.6 VDD

VDD

V

Low-level input voltage

VIL

DI, CL, CE,

BLK,

OSCI, KI1 to KI5

0

0.2 VDD

V

Guaranteed oscillator frequency range

fOSC

OSCI, OSCO

0.9

2.4

3.7

MHz

Recommended external resistor value

ROSC

OSCI, OSCO

2.2

12

47

kΩ

Recommended external capacitor value

COSC

OSCI, OSCO

15

33

100

pF

Clock low-level pulse width

tøL

CL : See figure 1.

160

ns

Clock high-level pulse width

tøH

CL : See figure 1.

160

ns

Data setup time

tds

DI, CL : See figure 1.

160

ns

Data hold time

tdh

DI, CL : See figure 1.

160

ns

CE wait time

tcp

CE, CL : See figure 1.

160

ns

CE setup time

tcs

CE, CL : See figure 1.

160

ns

CE hold time

tch

CE, CL : See figure 1.

160

ns

DO output delay time

tdc

DO: RPU = 4.7 kΩ , CL = 10 pF*: See figure 1.

1.5

µs

DO rise time

tdr

DO: RPU = 4.7 kΩ , CL = 10 pF*: See figure 1.

1.5

µs

BLK switching time

tc

BLK, CE : See figure 4.

10

µs

Note: Since DO is an open-drain output, these values will vary with the pull-up resistance RPU and the load capacitance CL.

No. 5951-2/18

LC75757E, LC75757W

Electrical Characteristics in the Allowable Operating Ranges

	Parameter	Symbol				Conditions		Ratings		Unit
							min	typ	max
		IIH1
	High-level input current		DI, CL, CE,	BLK:		VIN = 5.5 V			5	µA
		IIH2	OSCI: VIN = VDD						5	µA
	Low-level input current	IIL
			DI, CL, CE,	BLK,	OSCI: VIN = 0 V		–5			µA
	Input floating voltage	VIF	KI1 to KI5						0.05 VDD	V
	Pull-down resistance	RPD	KI1 to KI5: VDD = 5.0 V				50	100	250	kΩ
	Output off leakage current	IOFFH	DO: VO = 5.5 V						5	µA
		VOH1	S1 to S41: IO = –2 mA				VFL – 0.6			V
	High-level output voltage	VOH2	G1 to G3: IO = –50 mA				VFL – 1.3			V
		VOH3	OSCO: IO = –0.5 mA				VDD – 2.0			V
		VOH4	KS1 to KS5: IO = –500 µA				VDD – 1.2	VDD – 0.5	VDD – 0.2	V
		VOL1	S1 to S41, G1 to G3: IO = 50 µA						0.5	V
	Low-level output voltage	VOL2	OSCO: IO = 0.5 mA						2.0	V
		VOL3	KS1 to KS5: IO = 25 µA				0.2	0.5	1.5	V
		VOL4	DO: IO = 1 mA					0.1	0.5	V
	Oscillator frequency	fOSC	ROSC = 12 kΩ , COSC = 33 pF					2.4		MHz
	Hysteresis voltage	VH
			DI, CL, CE,	BLK,	KI1 to KI5			0.1 VDD		V
	Current drain	IDD1	Sleep mode						5	µA
		IDD2	Outputs open: fOSC = 2.4 MHz						10	mA

• When stopped with CL at the low level

• When stopped with CL at the high level

Figure 1

No. 5951-3/18

LC75757E, LC75757W

Pin Assignment

Top view

No. 5951-4/18

LC75757E, LC75757W

Block Diagram

Pin Descriptions

	Pin No.		Pin			Function	I/O	Handling when unused
	4		VFL		Driver block power supply. Applications must provide a voltage in the range 8.0 to 18.0 V.		—	—
	59		VDD		Logic block power supply. Applications must provide a voltage in the range 4.5 to 5.5 V.		—	—
	56		VSS		Power supply ground. This pin must be connected to the system ground.		—	—
	58	OSCI			Oscillator circuit connections. An oscillator circuit is formed by connecting a resistor and a		I	GND
	57	OSCO			capacitor externally to these pins.		O	OPEN
					Reset signal input used to initialize the IC internal state. During a reset,
					the display is turned off forcibly regardless of the internal display data.
	60	BLK					I	GND
					Also note that the internal key data is all reset to 0 and key scan operations are disabled.
					However, serial data input is possible in this state.
	63		CL		Serial data interface. These pins must be connected to the system microcontroller.
	64		DI		Note that since DO is an open-drain output, a pull-up resistor is required.		I	GND
					CL: Synchronization clock	DI: Transfer data
	62		CE
					CE: Chip enable	DO: Output data
	61		DO				O	OPEN
	1 to 3	G1 to G3			Digit outputs. The frame frequency fO is (fOSC/6144) Hz.		O	OPEN
	45 to 5	S1 to S41			Segment outputs that display the display data transferred over the serial interface.		O	OPEN
					Key scan outputs. Normally, when a key matrix is formed, diodes are inserted in the key
	46 to 50	KS1 to KS5			scan timing lines to prevent shorts. However, since this IC uses unbalanced CMOS outputs		O	OPEN
					in the output transistor circuit, the IC will not be damaged if these outputs are shorted.
	51 to 55	KI1 to KI5			Key scan inputs. Pull-down resistors are built into the IC internal pin circuits.		I	GND

No. 5951-5/18

LC75757E, LC75757W

Serial Data Input

• When stopped with CL at the low level

Note: don’t care

DD: Direction data

• When stopped with CL at the high level

Note: don’t care

DD: Direction data

Figure 2

No. 5951-6/18