Sanyo LC75741W Specifications

CMOS LSI

Ordering number : EN*4965

52595TH (OT) No. 4965-1/10

Preliminary

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

1/2 Duty VFD Driver for Frequency Displays

LC75741E, 75741W

Overview

The LC75741E and LC75741W are 1/2 duty VFD drivers
for use in electronic tuning frequency displays controlled
by a microcontroller. These products can directly drive
VFD displays with up to 106 segments.

Functions and Features

• 106 segment outputs

• Noise reduction circuit built into the output drivers.

• Display and dimmer data communication with the
controller using the CCB* format.

• High generality, since display data is displayed directly
without decoder intervention

• All segments can be turned off with the BLK pins.

• Package: QFP64E (LC75741E)

SQFP64 (LC75741W)

Note: * CCB is Sanyo’s original bus format with

address management for all Sanyo products.

Package Dimensions

unit: mm

3159-QFP64E

unit: mm

3190-SQFP64

SANYO: SQFP64

[LC75741W]

[LC75741E]

SANYO: QIP64E

Specifications

Absolute Maximum Ratings at Ta = 25°C, VSS= 0 V

Allowable Operating Ranges at Ta = –40 to +85°C, VDD= 4.5 to 5.5 V, VSS= 0 V

Electrical Characteristics in the Allowable Operating Ranges

No. 4965-2/10

LC75741E, 75741W

Parameter Symbol Conditions Ratings Unit

Maximum supply voltage

V

DD

max V

DD

–0.3 to +6.5 V

V

FL

max V

FL

–0.3 to +21.0 V

Input voltage

V

IN

1 DI, CL, CE, BLK –0.3 to +6.5 V

V

IN

2 OSCI –0.3 to VDD+ 0.3 V

Output voltage

V

OUT

1 S1 to S53, G1, G2 –0.3 to VFL+ 0.3 V

V

OUT

2 OSCO –0.3 to VDD+ 0.3 V

Output current

I

OUT

1 S1 to S53 5 mA

I

OUT

2 G1, G2 60 mA

Allowable power dissipation Pd max Ta = 85°C

400 (LC75741E) mW

300 (LC75741W) mW
Operating temperature Topr –40 to +85 °C
Storage temperature Tstg –50 to +150 °C

Parameter Symbol Conditions min typ max Unit

Supply voltage

V

DD

V

DD

4.5 5.0 5.5 V

V

FL

V

FL

8 12 18 V

Input high level voltage

V

IH

1 DI, CL, CE, BLK 0.8 V

DD

5.5 V

V

IH

2 OSCI 0.7 V

DD

V

DD

V

Input low level voltage

V

IL

1 DI, CL, CE, BLK 0 0.2 V

DD

V

V

IL

2 OSCI 0 0.3 V

DD

V

Guaranteed oscillator range f

OSC

OSCI, OSCO 0.4 1.6 3.0 MHz

Recommended external

R

OSC

OSCI, OSCO 20 kΩ

resistance
Recommended external

C

OSC

OSCI, OSCO 47 pF

capacitance
Low level clock pulse width t

øL

CL: Figure 1 0.5 µs

High level clock pulse width t

øH

CL: Figure 1 0.5 µs

Data setup time t

ds

DI, CL: Figure 1 0.5 µs

Data hold time t

dh

DI, CL: Figure 1 0.5 µs

CE wait time t

cp

CE, CL: Figure 1 0.5 µs

CE setup time t

cs

CE, CL: Figure 1 0.5 µs

CE hold time t

ch

CE, CL: Figure 1 0.5 µs

BLK switching time t

c

BLK, CE: Figure 3 10 µs

Parameter Symbol Conditions min typ max Unit

Input high level current I

IH

DI, CL, CE, BLK, OSCI: VI = 5.5 V 5 µA

Input low level current I

IL

DI, CL, CE, BLK, OSCI: VI = 0 V –5 µA

V

OH

1 S1 to S53: IO= 2 mA VFL– 0.6 V

Output high level voltage

V

OH

2 G1, G2: IO= 25 mA VFL– 0.6 V

V

OH

3 G1, G2: IO= 50 mA VFL– 1.3 V

V

OH

4 OSCO: IO= 0.5 mA VDD– 2.0 V

Output low level voltage

V

OL

1 S1 to S53, G1, G2: IO= –5 µA, Ta = 25°C 0.25 0.5 V

V

OL

2 OSCO: IO= –0.5 mA 2.0 V

Oscillator frequency f

OSC

R

OSC

= 20 kΩ, C

OSC

= 47 pF 1.6 MHz

Hysteresis voltage V

H

DI, CL, CE, BLK 0.1 V

DD

V

Current drain I

DD

Output open: f

OSC

= 1.6 MHz 10 mA

1. When CL is stopped at the low level

2. When CL is stopped at the high level

Figure 1

Pin Assignment

No. 4965-3/10

LC75741E, 75741W