Sanyo LC75411WS Specifications

Ordering number : ENN6928
62901RM (OT) No. 6928-1/34
Overview
The LC75411ES and 75411WS are electronic volume controllers that enable control of volume, balance, fader, bass/treble, loudness, input switching, and input gain using only a small number of external components.
• Volume: 0 dB to –79.5 dB in 0.5-dB steps, and –(161
positions) Balance function with separate L/R control
• Fader: rear output or front output can be attenuated across 16 positions (in 1-dB steps from 0 dB to –2 dB, 2-dB steps from –2 dB to 20 dB, 10-dB steps from –20 dB to –30 dB, and –45 dB, –60 dB, –)
• Bass/treble: Both bass and treble can be controlled in
1-dB steps from 0 dB to ±6 dB, and in 2-dB steps from ±8 dB to ±12 dB.
• Input gain: 0 dB to +18.75 dB (1.25-dB steps)
amplification is possible for the input signal.
• Input switching: four input signals can be selected for
Left and for Right
• Loudness: A tap is output from the –32 dB position of a
2 dB step volume control resistor ladder. A loudness function can be implemented by connecting an external RC circuit.
Features
• On-chip buffer amplifier cuts down number of external components
• Low switching noise generated by on-chip switch through use of silicon gate CMOS process, for low switching noise when there is no signal
• Low switching noise when there is a signal due to use of on-chip zero-cross switching circuit
• On-chip 1/2 VDD reference voltage circuit
• Controls performed with serial input (CCB)
LC75411ES, 75411WS
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Electronic Volume Controller
for Car Audio Systems
CMOS IC
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus addresses are controlled by SANYO.
No. 6928-2/33
LC75411ES, 75411WS
Package Dimensions
unit: mm
3148-QIP44MA
unit: mm
3163A-SQFP48
2.8max
0.8
11.6
0.35
10.0
13.2
1.0
1
11
12
22
23
33
34
44
1.0
1.6
0.8
2.5
0.2
0.1
10.0
13.2
1.0
1.0
1.6
0.8
SANYO: QIP44MA
[LC75411ES]
0.5
7.0
9.0
0.15
0.180.75 0.5
0.75
0.75
0.5
0.75
0.5
0.1
1 12
13
24
25
36
37
48
7.0
9.0
1.7max
SANYO: SQFP48
[LC75411WS]
Pin Assignment
[LC75411ES]
5 4 3 2 1
44
43
42
41
40
39
38
37
36
35
34
24 2526 27 28 29 30 33 32 31 23
16
15
14
13
12
11 10 9 8 7 6
22
21
20
19
18
17
LSELO
L4 L3 L2 L1
LC75411ES
VDD
Vref
R1
R4
R3
R2
RSELO
RVRIN
RCT
RCOM
RVROUT
RTIN
RF1C1
RF1C2
RF1C3
RF3C1
RTOUT
RFIN
RFOUT
RROUT
TIM
TEST
CE
DI
CL
VSS
LROUT
LFOUT
LFIN
LTOUT
LF3C1
LF1C3
LF1C2
LF1C1
LTIN
LVROUT
LCOM
LVRIN
LCT
No. 6928-3/33
LC75411ES, 75411WS
Equivalent Circuit Block Diagram
[LC75411ES]
DI
CE
CL
0.033µF
10µF
10µF
PA
L4
LFIN
Microcontroller
RFIN
RFOUT
RROUT
TIM
TEST VDD
CE
DI
CL
LROUT
LFOUT
22
24
23
LOGIC CIRCUIT
ZEROCROSS DET
ZEROCROSS DET
CCB
INTERFACE
21
20
19
18
17
16
15
14
13
12
PA
VSS
10µF
PA
10µF
PA
25 26 27 28 29
11 10 9 8 7 6
35
36
37
38
39
40
41
42
43
44
L3
L2
L1
LVref
VDD
Vref
RVref
R1
R2
R3
1µF × 4
R4
[TREBLE]
[TREBLE] [BASS fo=100Hz]
0.1µF
0.1µF
2700pF
10µF
LF3C1
LTOUT
LF1C2
LF1C3
LF1C1
LTIN
10µF
CONTROL
CIRCUIT
NO SIGNAL
TIMER
Multiplexer
Multiplexer
[BASS fo=100Hz]
0.1µF
2700pF
10µF
RF3C1
RTOUT
RF1C2
RF1C3
RF1C1
RTIN
22µF
30 31 32 33 34
LVROUT
LVref
LCOM
LSELO
LVRIN
LCT
10µF
220pF
1µF
0.1µF
68k
4.7k
LVref
RVref LVref
5 4 3 2 1
RVROUT
RVref
RCOM
RSELO
RVRIN
RCT
10µF
10µF
220pF
1µF
0.1µF
68k
4.7k
RVref
0.1µF
No. 6928-4/33
LC75411ES, 75411WS
Sample Application Circuit
[LC75411ES]
0.033µF
5 4 3 2 1
44
43
42
41
40
39
38
37
36
35
34
24 2526 27 28 29 30 33 32 31 23
16
15
14
13
12
11 10 9 8 7 6
22
21
20
19
18
17
4.7k
4.7k
68k
68k
220pF
220pF
2700pF
2700pF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
10µF
10µF
10µF
Micro-
controller
10µF
10µF
1µF
1µF
10µF
10µF
1µF
1µF
LSELO
L4 L3 L2 L1
VDD
LC75411ES
VDD
Vref
R1
R4
R3
R2
RSELO
RVRIN
RCT
RCOM
RVROUT
RTIN
RF1C1
RF1C2
RF1C3
RF3C1
RTOUT
RFIN
RFOUT
RROUT
TIM
TEST
CE
DI
PA
CL
DVSS
LROUT
LFOUT
LFIN
LTOUT
LF3C1
LF1C3
LF1C2
LF1C1
LTIN
LVROUT
LCOM
LVRIN
LCT
1µF
22µF
1µF
1µF 1µF 1µF 1µF
10µF
PA
10µF
PA
10µF
PA
No. 6928-5/33
LC75411ES, 75411WS
Pin Assignment
[LC75411WS]
LC75411WS
48
47
46
45
44
43
42
41
40
39
38
L4 L3 L2 L1
NC
VDD
Vref
NC
R3
R2
R1
5 4 3 2 1 11 10 9 8 7 6
RSELO
RVRIN
RCT
RCOM
RVROUT
RTIN
RF1C1
RF1C2
RF1C3
RF3C1
RTOUT
17
16
15
14
13
23
22
21
20
19
18
RFIN
RFOUT
RROUT
TIM
TEST
CE
DI
CL
VSS
LROUT
LFOUT
26 2728 29 30 31 32 35 34 33 25
NC
LTOUT
LF3C1
LF1C3
LF1C2
LF1C1
LTIN
LVROUT
LCOM
LVRIN
LCT
12
24
36
37
NC
LFIN
LSELO
R4
No. 6928-6/33
LC75411ES, 75411WS
Equivalent Circuit Block Diagram
[LC75411WS]
DI
CE
CL
0.033µF
10µF
10µF
PA
L4 LFIN
Microcontroller
RFIN
RFOUT
RROUT
TIM
TEST VDD
CE
DI
CL
LROUT
LFOUT
23
26
24
LOGIC CIRCUIT
ZEROCROSS DET
Multiplexer ZEROCROSS DET
CCB
INTERFACE
22
21
20
19
18
17
16
15
14
13
PA
VSS
10µF
PA
10µF
PA
27 28 29 30 31
11 10 9 8 7 6
37
38
39
40
42
43
45
46
47
48
L3
L2
NC
L1
LVref
VDD
Vref
RVref
R1
R2
R3
1µF × 4
NC
R4
[TREBLE]
[TREBLE] [BASS fo=100Hz]
0.1µF
0.1µF
2700pF
10µF
LF3C1
NC
LTOUT
LF1C2
LF1C3
LF1C1
LTIN
10µF
CONTROL
CIRCUIT
NO SIGNAL
TIMER
Multiplexer
[BASS fo=100Hz]
0.1µF
0.1µF
2700pF
10µF
RF3C1
NC RTOUT
RF1C2
RF1C3
RF1C1
RTIN
22µF
32 33 34 35 36
LVROUT
LVref
LCOM
LSELO
LVRIN
LCT
10µF
220pF
1µF
0.1µF
68k
4.7k
LVref
RVref LVref
5 4 3 2 1
RVROUT
RVref
RCOM
RSELO
RVRIN
RCT
10µF
10µF
220pF
1µF
0.1µF
68k
4.7k
RVref
12
44
25
41
No. 6928-7/33
LC75411ES, 75411WS
Sample Application Circuit
[LC75411WS]
5 4 3 2 1
47
48
46
45
44
43
42
41
40
39
38
37
26 2728 29 30 31 32 35 36 34 33 25
17
16
15
14
13
12 11
10 9 8 7 6
24
23
22
21
20
19
18
4.7k
4.7k
68k
68k
220pF
220pF
2700pF
2700pF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
10µF
10µF
10µF
Micro-
controller
10µF
10µF
1µF
1µF
10µF
10µF
1µF
1µF
L3 L2 L1
VDD
LC75411WS
VDD
Vref
R3
NC
R2
R1
RSELO
RVRIN
NC
RCT
RCOM
RVROUT
RTIN
RF1C1
RF1C2
RF1C3
RF3C1
RTOUT
RFIN
RFOUT
RROUT
TIM
TEST
CE
DI
PA
CL
LFIN
VSS
LROUT
LFOUT
NC
LTOUT
LF3C1
LF1C3
LF1C2
LF1C1
LTIN
LVROUT
LCOM
LVRIN
LCT
LSELO
1µF
22µF
1µF 1µF 1µF
10µF
PA
10µF
PA
10µF
PA
L4
1µF
R4
1µF
NC
No. 6928-8/33
LC75411ES, 75411WS
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage V
DD
max V
DD
11 V
Maximum input voltage V
IN
max All input pins VSS– 0.3 to VDD+ 0.3 V
Allowable power dissipation Pd max Ta 85°C, when mounted on board
LC75411ES 600
mW
LC75411WS 550 Operating temperature Topr –40 to +85 °C Storage temperature Tstg –50 to +125 °C
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS= 0 V
Parameter Symbol Conditions
Ratings
Unit
min typ max
Supply voltage V
DDVDD
6.0 10.5 V
Input high-level voltage V
IH
CL, DI, CE, TEST 4.0 10.5 V
Input low-level voltage V
IL
CL, DI, CE, TEST V
SS
1.0 V
Input amplitude voltage V
IN
V
SS
V
DD
Vp-p Input pulse width TøW CL 1 µs Setup time Tsetup CL, DI, CE 1 µs Hold time Thold CL, DI, CE 1 µs Operating frequency fopg CL 500 kHz
Allowable Operating Ranges at Ta = 25°C, VSS= 0 V
Parameter Symbol Pin Name Conditions
Ratings
Unit
min typ max
[Input block]
Input resistance Rin L1 to L4, R1 to R4 25 50 100 k Minimum input gain Ginmin L1 to L4, R1 to R4 –1 0 +1 dB Maximum input gain Ginmax +16.5 +18.75 +21 dB Step setting error ATerr ±0.5 dB L/R balance BAL ±0.5 dB
[Volume Block]
Input resistance Rvr LVRIN, RVRIN, loudness off 113 226 452 k Step setting error ATerr ±0.5 dB L/R balance BAL ±0.5 dB
[Tone block]
Step setting error ATerr ±1.0 dB Bass control range Gbass max. boost/cut ±9 ±12 ±15 dB Treble control range Gtre max. boost/cut ±9 ±12 ±15 dB L/R balance BAL ±0.5 dB
Electrical Characteristics at Ta = 25°C, VDD= 9 V, VSS= 0 V
Continued on next page.
No. 6928-9/33
LC75411ES, 75411WS
Parameter Symbol Pin Name Conditions
Ratings
Unit
min typ max
[Fader Block]
Input resistance Rfed LFIN, RFIN 25 50 100 k
0dB to –2dB ±0.5 dB
Step setting error ATerr
–2dB to –20dB ±1 dB –20dB to –30dB ±2 dB –30dB to –60dB ±3 dB
L/R balance BAL ±0.5 dB
[General]
Total harmonic distortion
THD (1) V
IN
= –10dBV, f = 1 kHz 0.004 0.01 %
THD (2) V
IN
= –10dBV, f = 10 kHz 0.006 0.01 %
Input crosstalk CT V
IN
= 1Vrms, f = 1 kHz 80 88 dB
L/R crosstalk CT V
IN
= 1Vrms, f = 1 kHz 80 88 dB
Maximum attenuated output
Vomin (1) V
IN
= 1Vrms, f = 1 kHz 80 88 dB
Vomin (2)
V
IN
= 1Vrms, f = 1 kHz
90 95 dB
INMUTE, fader –
Output noise voltage
V
N
(1) Flat overall, IHF-A filter 5 10 µV
V
N
(2) Flat overall, 20 to 20 kHzBPF 7 15 µV
Current drain I
DD
33 40 mA
Input high-level current I
IH
CL, DI, CE, VIN= 9 V 10 µA
Input low-level current I
IL
CL, DI, CE, VIN= 0 V –10 µA
Maximum input voltage V
CL
THD = 1%, RL= 10 k
2.5 2.9 Vrms
flat overall, f
IN
= 1 kHz
Continued from preceding page.
Control Timing and Data Format
To control the LC75411ES and LC75411WS input specified serial data to the CE, CL, and DI pins. The data configuration consists of a total of 52 bits broken down into 8 address bits and 44 data bits.
CE DI
D43 D42 D41 D40 D39 D38 D5 D4 D3 D2 D0 D1 A3 A2 A1 A0 B3 B2 B1 B0
CL
1µs min
1µs min
1µs min T
DEST
1µs min
1µs min
1µs min
CE
DI
CL
Address code (B0 to A3)
The LC75411ES and 75411WS use 8-bit address code and can be used in common with ICs that support SANYO’s CCB serial bus.
Address Code
(LSB) (81HEX)
Control code allocation
Input Switching Control
No. 6928-10/33
LC75411ES, 75411WS
B0 B1 B2 B3 A0 A1 A2 A3
1 0 0 0 0 0 0 1
D0 D1 D2 Setting Setting
0 0 0 L1 (R1) 1 0 0 L2 (R2) 0 1 0 L3 (R3) 1 1 0 L4 (R4)
0 1 1
For IC testing: Normally not used
1 1 1
D3 Bit for IC testing: Normally set to 0
Input Gain Control
D4 D5 D6 D7 Operation
0 0 0 0 0dB 1 0 0 0 +1.25dB 0 1 0 0 +2.50dB 1 1 0 0 +3.75dB 0 0 1 0 +5.00dB 1 0 1 0 +6.25dB 0 1 1 0 +7.50dB 1 1 1 0 +8.75dB 0 0 0 1 +10.0dB 1 0 0 1 +11.25dB 0 1 0 1 +12.5dB 1 1 0 1 +13.75dB 0 0 1 1 +15.0dB 1 0 1 1 +16.25dB 0 1 1 1 +17.5dB 1 1 1 1 +18.75dB
No. 6928-11/33
LC75411ES, 75411WS
Volume Control (0 to –20.5dB)
D8 D9 D10 D11 D12 D13 D14 D15 Operation
0 0 0 0 0 0 0 0 0dB 0 0 0 0 0 0 0 1 –0.5dB 1 0 0 0 0 0 0 0 –1dB 1 0 0 0 0 0 0 1 –1.5dB 0 1 0 0 0 0 0 0 –2dB 0 1 0 0 0 0 0 1 –2.5dB 1 1 0 0 0 0 0 0 –3dB 1 1 0 0 0 0 0 1 –3.5dB
0 0 1 0 0 0 0 0 –4dB 0 0 1 0 0 0 0 1 –4.5dB 1 0 1 0 0 0 0 0 –5dB 1 0 1 0 0 0 0 1 –5.5dB 0 1 1 0 0 0 0 0 –6dB 0 1 1 0 0 0 0 1 –6.5dB 1 1 1 0 0 0 0 0 –7dB 1 1 1 0 0 0 0 1 –7.5dB 0 0 0 1 0 0 0 0 –8dB 0 0 0 1 0 0 0 1 –8.5dB 1 0 0 1 0 0 0 0 –9dB 1 0 0 1 0 0 0 1 –9.5dB 0 1 0 1 0 0 0 0 –10dB 0 1 0 1 0 0 0 1 –10.5dB 1 1 0 1 0 0 0 0 –11dB 1 1 0 1 0 0 0 1 –11.5dB 0 0 1 1 0 0 0 0 –12dB 0 0 1 1 0 0 0 1 –12.5dB 1 0 1 1 0 0 0 0 –13dB 1 0 1 1 0 0 0 1 –13.5dB 0 1 1 1 0 0 0 0 –14dB 0 1 1 1 0 0 0 1 –14.5dB 1 1 1 1 0 0 0 0 –15dB 1 1 1 1 0 0 0 1 –15.5dB 0 0 0 0 1 0 0 0 –16dB 0 0 0 0 1 0 0 1 –16.5dB 1 0 0 0 1 0 0 0 –17dB 1 0 0 0 1 0 0 1 –17.5dB 0 1 0 0 1 0 0 0 –18dB 0 1 0 0 1 0 0 1 –18.5dB 1 1 0 0 1 0 0 0 –19dB 1 1 0 0 1 0 0 1 –19.5dB 0 0 1 0 1 0 0 0 –20dB 0 0 1 0 1 0 0 1 –20.5dB
No. 6928-12/33
LC75411ES, 75411WS
Volume Control (–21 to –40.5dB)
D8 D9 D10 D11 D12 D13 D14 D15 Operation
1 0 1 0 1 0 0 0 –21dB 1 0 1 0 1 0 0 1 –21.5dB 0 1 1 0 1 0 0 0 –22dB 0 1 1 0 1 0 0 1 –22.5dB 1 1 1 0 1 0 0 0 –23dB 1 1 1 0 1 0 0 1 –23.5dB 0 0 0 1 1 0 0 0 –24dB 0 0 0 1 1 0 0 1 –24.5dB
1 0 0 1 1 0 0 0 –25dB 1 0 0 1 1 0 0 1 –25.5dB 0 1 0 1 1 0 0 0 –26dB 0 1 0 1 1 0 0 1 –26.5dB 1 1 0 1 1 0 0 0 –27dB 1 1 0 1 1 0 0 1 –27.5dB 0 0 1 1 1 0 0 0 –28dB 0 0 1 1 1 0 0 1 –28.5dB 1 0 1 1 1 0 0 0 –29dB 1 0 1 1 1 0 0 1 –29.5dB 0 1 1 1 1 0 0 0 –30dB 0 1 1 1 1 0 0 1 –30.5dB 1 1 1 1 1 0 0 0 –31dB 1 1 1 1 1 0 0 1 –31.5dB 0 0 0 0 0 1 0 0 –32dB 0 0 0 0 0 1 0 1 –32.5dB 1 0 0 0 0 1 0 0 –33dB 1 0 0 0 0 1 0 1 –33.5dB 0 1 0 0 0 1 0 0 –34dB 0 1 0 0 0 1 0 1 –34.5dB 1 1 0 0 0 1 0 0 –35dB 1 1 0 0 0 1 0 1 –35.5dB 0 0 1 0 0 1 0 0 –36dB 0 0 1 0 0 1 0 1 –36.5dB 1 0 1 0 0 1 0 0 –37dB 1 0 1 0 0 1 0 1 –37.5dB 0 1 1 0 0 1 0 0 –38dB 0 1 1 0 0 1 0 1 –38.5dB 1 1 1 0 0 1 0 0 –39dB 1 1 1 0 0 1 0 1 –39.5dB 0 0 0 1 0 1 0 0 –40dB 0 0 0 1 0 1 0 1 –40.5dB
No. 6928-13/33
LC75411ES, 75411WS
Volume Control (–41 to –59.5dB)
D8 D9 D10 D11 D12 D13 D14 D15 Operation
1 0 0 1 0 1 0 0 –41dB 1 0 0 1 0 1 0 1 –41.5dB 0 1 0 1 0 1 0 0 –42dB 0 1 0 1 0 1 0 1 –42.5dB 1 1 0 1 0 1 0 0 –43dB 1 1 0 1 0 1 0 1 –43.5dB 0 0 1 1 0 1 0 0 –44dB 0 0 1 1 0 1 0 1 –44.5dB
1 0 1 1 0 1 0 0 –45dB 1 0 1 1 0 1 0 1 –45.5dB 0 1 1 1 0 1 0 0 –46dB 0 1 1 1 0 1 0 1 –46.5dB 1 1 1 1 0 1 0 0 –47dB 1 1 1 1 0 1 0 1 –47.5dB 0 0 0 0 1 1 0 0 –48dB 0 0 0 0 1 1 0 1 –48.5dB 1 0 0 0 1 1 0 0 –49dB 1 0 0 0 1 1 0 1 –49.5dB 0 1 0 0 1 1 0 0 –50dB 0 1 0 0 1 1 0 1 –50.5dB 1 1 0 0 1 1 0 0 –51dB 1 1 0 0 1 1 0 1 –51.5dB 0 0 1 0 1 1 0 0 –52dB 0 0 1 0 1 1 0 1 –52.5dB 1 0 1 0 1 1 0 0 –53dB 1 0 1 0 1 1 0 1 –53.5dB 0 1 1 0 1 1 0 0 –54dB 0 1 1 0 1 1 0 1 –54.5dB 1 1 1 0 1 1 0 0 –55dB 1 1 1 0 1 1 0 1 –55.5dB 0 0 0 1 1 1 0 0 –56dB 0 0 0 1 1 1 0 1 –56.5dB 1 0 0 1 1 1 0 0 –57dB 1 0 0 1 1 1 0 1 –57.5dB 0 1 0 1 1 1 0 0 –58dB 0 1 0 1 1 1 0 1 –58.5dB 1 1 0 1 1 1 0 0 –59dB 1 1 0 1 1 1 0 1 –59.5dB
No. 6928-14/33
LC75411ES, 75411WS
Volume Control (–60 to –)
D8 D9 D10 D11 D12 D13 D14 D15 Operation
0 0 1 1 1 1 0 0 –60dB 0 0 1 1 1 1 0 1 –60.5dB 1 0 1 1 1 1 0 0 –61dB 1 0 1 1 1 1 0 1 –61.5dB 0 1 1 1 1 1 0 0 –62dB 0 1 1 1 1 1 0 1 –62.5dB 1 1 1 1 1 1 0 0 –63dB 1 1 1 1 1 1 0 1 –63.5dB
0 0 0 0 0 0 1 0 –64dB 0 0 0 0 0 0 1 1 –64.5dB 1 0 0 0 0 0 1 0 –65dB 1 0 0 0 0 0 1 1 –65.5dB 0 1 0 0 0 0 1 0 –66dB 0 1 0 0 0 0 1 1 –66.5dB 1 1 0 0 0 0 1 0 –67dB 1 1 0 0 0 0 1 1 –67.5dB 0 0 1 0 0 0 1 0 –68dB 0 0 1 0 0 0 1 1 –68.5dB 1 0 1 0 0 0 1 0 –69dB 1 0 1 0 0 0 1 1 –69.5dB 0 1 1 0 0 0 1 0 –70dB 0 1 1 0 0 0 1 1 –70.5dB 1 1 1 0 0 0 1 0 –71dB 1 1 1 0 0 0 1 1 –71.5dB 0 0 0 1 0 0 1 0 –72dB 0 0 0 1 0 0 1 1 –72.5dB 1 0 0 1 0 0 1 0 –73dB 1 0 0 1 0 0 1 1 –73.5dB 0 1 0 1 0 0 1 0 –74dB 0 1 0 1 0 0 1 1 –74.5dB 1 1 0 1 0 0 1 0 –75dB 1 1 0 1 0 0 1 1 –75.5dB 0 0 1 1 0 0 1 0 –76dB 0 0 1 1 0 0 1 1 –76.5dB 1 0 1 1 0 0 1 0 –77dB 1 0 1 1 0 0 1 1 –77.5dB 0 1 1 1 0 0 1 0 –78dB 0 1 1 1 0 0 1 1 –78.5dB 1 1 1 1 0 0 1 0 –79dB 1 1 1 1 0 0 1 1 –79.5dB 0 1 1 1 1 1 1 0
No. 6928-15/33
LC75411ES, 75411WS
Tone Control
D16 D17 D18 D19 D40 Bass D24 D25 D26 D27 D42 Treble
0 1 1 0 0 +12dB 1 0 1 0 0 +10dB 0 0 1 0 0 +8dB 1 1 0 0 0 +6dB 1 1 0 0 1 +5dB 0 1 0 0 0 +4dB 0 1 0 0 1 +3dB
1 0 0 0 0 +2dB 1 0 0 0 1 +1dB 0 0 0 0 0 0dB 1 0 0 1 1 –1dB 1 0 0 1 0 –2dB 0 1 0 1 1 –3dB 0 1 0 1 0 –4dB 1 1 0 1 1 –5dB 1 1 0 1 0 –6dB 0 0 1 1 0 –8dB 1 0 1 1 0 –10dB 0 1 1 1 0 –12dB
D20 D21 D22 D23 D41 Setting
0 0 0 0 0 Set to 0
Fader Volume Control
D28 D29 D30 D31 Operation
0 0 0 0 0dB 1 0 0 0 –1dB 0 1 0 0 –2dB 1 1 0 0 –4dB 0 0 1 0 –6dB 1 0 1 0 –8dB 0 1 1 0 –10dB 1 1 1 0 –12dB 0 0 0 1 –14dB 1 0 0 1 –16dB 0 1 0 1 –18dB 1 1 0 1 –20dB 0 0 1 1 –30dB 1 0 1 1 –45dB 0 1 1 1 –60dB 1 1 1 1
Channel Selection Control
D32 D33 Operation
0 0 Initial setting mode: Rapid charging 1 0 RCH 0 1 LCH 1 1 L/R simultaneously
No. 6928-16/33
LC75411ES, 75411WS
Fader Rear/Front Control
D34 Setting
0 Rear 1 Front
Loudness Control
D35 Setting
0 OFF 1 ON
Test Mode Control
D43 Setting
0 For IC testing. Always set to 0.
Zero-Cross Control
D36 D37 Setting
0 0 Data write through zero-cross detection 1 1 Zero-cross detection stopped (data write at falling edge of CE)
Zero-Cross Signal Detection Block Control
D38 D39 Setting
0 0 Selector 1 0 Volume 0 1 Tone 1 1 Fader
No. 6928-17/33
LC75411ES, 75411WS
Pin Functions
Pin Name
Pin No.
Function Equivalent circuit
LC75411ES LC75411WS
• Single-end input pin
L1 L2 L3 L4 R1 R2 R3 R4
38 37 36 35 41 42 43 44
40 39 38 37 45 46 47 48
VDD
LVref RVref
• Input selector output pins
LSEL0
RSEL0
34
1
36
1
VDD
• 2-dB step volume input pins
• Perform input at low-impedance.
LVRIN RVRIN
33
2
35
2
VDD
LVref RVref
• Loudness pins. Connect high-pass compensation RC between LCT (RCT) and LVRIN (RVRIN), and connect low-pass compensation RC between LCT (RCT) and GND.
LCT
RCT
32
3
34
3
VDD
• 2-dB stop volume output pins.
• Connect these pins to GND through coupling capacitors to reduce switching noise.
LCOM
RCOM
31
4
33
4
VDD
• 0.5-dB step volume output pin
LVROUT
RVROUT
30
5
32
5
VDD
• Equalizer input pin
LTIN RTIN
29
6
31
6
VDD
Lvref RVref
Continued on next page.
No. 6928-18/33
LC75411ES, 75411WS
Pin Name
Pin No.
Function Equivalent circuit
LC75411ES LC75411WS
• Equalizer F1 band filter configuration capacitor connection pins.
Connect capacitor between LF1C1 (RF1C1) and LF1C2 (RF1C2) LF1C2 (RF1C2) and LF1C3 (RF1C3)
LF1C1 LF1C2
LF1C3 RF1C1 RF1C2 RF1C3
28 27 26
7 8 9
30 29 28
7 8 9
Vref
VDD
VDD
FnC1
TIN
VDD
VDD
FnC3
VDD
FnC2
• Equalizer F3 band circuit filter configuration capacitor connection pins.
Connect high-pass compensation capacitor between LF3C1 (RF3C1) and VSS.
LF3C1
RF3C1
25 10
27 10
C1
VDD
• Equalizer output pins
LTOUT RTOUT
24 11
26 11
VDD
• Fader block input pins
• Drive at low impedance.
LFIN RFIN
23 12
24 13
VDD
• Fader output pins. Attenuation is possible separately for the front end and rear end. The attenuation amount is the same for L and R.
LFOUT LROUT RFOUT
RROUT
22 21 13 14
23 22 14 15
VDD
• Connect a capacitor of a few tens of µF between Vref and VSS as a 0.55 VDD voltage generator, current ripple countermeasure.
Vref 40 43
VDD
LVref RVref
Continued from preceding page.
Continued on next page.
No. 6928-19/33
LC75411ES, 75411WS
Pin Name
Pin No.
Function Equivalent circuit
LC75411ES LC75411WS
• Power supply pinVDD 39 42
• Ground pinVSS 20 21
• Dedicated IC test pin
• Normally this pin is used connected to GND.
TEST 16 17
VDD
• Timer pin when there is no signal in the zero-cross circuit.
Forcibly set data when there is no zero-cross signal, from the time the data is set until the timer ends.
TIM 15 16
VDD
• Input pin for serial data and clock used for control
CL
DI
19 18
20 19
VDD
• Chip enable pin. Data is written to the internal latch and the analog switches are operated when the level changes from High to Low.
Data transfer is enabled when the level is High.
CE 17 18
• No Connect pin. Leave this pin open or connect it to V
SS
.
NC
12 25 41 44
Continued from preceding page.
Internal Equivalent Circuit Block Diagram
Selector Block Equivalent Circuit Block Diagram
No. 6928-20/33
LC75411ES, 75411WS
Total resistance: 50 k Same for right channel Unit (Resistance: )
1.25dB
2.50dB
3.75dB
5.00dB
6.25dB
7.50dB
8.75dB
LSELO
0dB
50k
50k
50k
50k
LVref
LVref
6.702k
5.804k
5.026k
4.352k
3.769k
3.264k
2.826k
2.447k
2.119k
1.835k
1.589k
1.376k
1.192k
1.032k
0.894k
5.774k
LVref
10.0dB
11.25dB
12.5dB
13.75dB
15.0dB
16.25dB
17.5dB
18.75dB
L4
L3
LVref
LVref
LVref
INMUTE SW
L2
L1
2-dB Volume Block Equivalent Circuit Block Diagram
No. 6928-21/33
LC75411ES, 75411WS
Total resistance of 195 k over tap
Total resistance of
30.847 k under tap
Same for right channel Unit (Resistance: )
To left channel
0.5–dB block
LVref
41.139k
32.678k
25.957k
20.618k
16.378k
–2dB –4dB –6dB
–8dB –10dB –12dB –14dB
0dB
–16dB –18dB –20dB –22dB –24dB –26dB –28dB –30dB –32dB –34dB –36dB –38dB –40dB –42dB –44dB –46dB –48dB –50dB –52dB –54dB –56dB –58dB –60dB –62dB –64dB –66dB –68dB –70dB –72dB –74dB –76dB –78dB –dB
13.009k
10.334k
8.208k
6.520k
5.179k
4.114k
3.268k
2.596k
2.062k
1.638k
1.301k
6.344k
5.040k
LCT
5.750k
4.003k
3.180k
2.526k
2.006k
1.594k
1.266k
1.006k
0.799k
0.634k
0.504k
0.400k
0.318k
0.253k
0.201k
0.159k
0.127k
0.101k
0.080k
0.063k
0.050k
0.040k
0.154k
LVRIN
Initial setting switch
0.5-dB Volume Block Equivalent Circuit Block Diagram
No. 6928-22/33
LC75411ES, 75411WS
Initial setting switch
From left channel 2-dB block
Initial setting switch
2.797k
Unit: Total resistance: 50 k
Same for right channel
2.640k
LVROUT
Vref
–1dB
dB
LCOM
0dB
–0.5dB
–1.5dB
2.493k
42.070k
Tone Block Equivalent Circuit Diagram
No. 6928-23/33
LC75411ES, 75411WS
LTOUT
Unit: Total resistance: 38.861 k Same for right channel
SW3
SW4
12dB
10dB
8dB
6dB
5dB
LF3C1
4dB 3dB
2dB
1dB
0dB
SW1
SW2 SW3
SW4
12.840k
3.373k
4.246k
5.346k
3.172k
3.558k
3.993k
4.480k
5.027k
5.640k
50k
LTIN
12dB
10dB
8dB
6dB
5dB
LF1C1
LVref
4dB 3dB
2dB
1dB
0dB
SW1
SW2
3.373k
4.246k
5.346k
3.172k
3.558k
3.993k
4.480k
5.027k
5.640k
0.027k
LF1C2 LF1C3
6.50k
During boost, SW 1 and SW 3 are ON, during cut SW 2 and SW 4 are ON, and when 0 dB, 0 dB SW and SW 2 and SW 3 are ON.
2
1
0
R3R2C1C2
f
π
=
0.1µF
38861×65001002
1
R3R2f02
1
ππ
×
==C
1.223
R3R2
1
R3
R3R2
Q ×=
2
Tone Circuit Constant Calculation Example
Bass Band Circuit The equivalent circuit and the formula for calculating the external RC with a mean frequency of 100 Hz are shown below.
• Bass band equivalent circuit block diagram
1. We obtain C from mean frequency f0 = 100 Hz, as follows.
2. We obtain Q as follows.
No. 6928-24/33
LC75411ES, 75411WS
• Calculation example Specification Mean frequency: f0 = 100 Hz Gain during maximum boost: G = 12 dB Let us use R1 = 0, R2 = 38.861 k, R3 = 6.5 k(assuming R1 = 0 during maximum boost) , and C1 = C2 = C.
R1 R2
R3
C2C1
Treble Band Circuit
The shelving characteristics for the treble band can be obtained. The equivalent circuit and the calculation formula during boost are shown below.
No. 6928-25/33
LC75411ES, 75411WS
• Calculation example Specification Setting frequency: f = 26000 Hz Gain during maximum boost: G = 12 dB Let us use R1 = 12.840 kand R2 = 38.861 k The above constants are inserted in the following formula.
R1 R2
C
GLOG
R2
RC
=×
+
+
20 1
11
10
22
(/ )
ω
C
f
R2
R1
G
=
1
2
10 1
20
22
π
()
/
2700(pF)
12840
1981.3
38861
260002
1
2
2
×
=
π
Fader Volume Block Equivalent Circuit Block Diagram
No. 6928-26/33
LC75411ES, 75411WS
LFIN
5.437k
When FADER = "1", S2 and S3 are ON. When FADER = "0", S1 and S4 are ON.
Unit: Total resistance: 50 k
4.846k
8.169k
4.094k
LFOUT
LVref
–1dB
–2dB
0dB
S1
S2
S3
S4
6.489k
5.154k
–6dB
–8dB
–4dB
3.252k
2.583k
2.052k
3.419k
–12dB
–14dB
–10dB
1.630k
1.295k
–18dB
–20dB
–16dB
1.300k
0.231k
–45dB
–60dB
dB
–30dB
0.050k
LROUT
When – data is sent to the main volume 0.5dBSTEP, S1 and S2 become open, and S3 and S4 simultaneously become ON.
Usage Cautions
(1) Data transmission at power ON
• The status of internal analog switches is unstable at power ON. Therefore, perform muting or some other countermeasure until the data has been set.
• At power ON, initial setting data must be sent once in order to stabilize the bias of each block in a short time.
(2) Description of zero-cross switching circuit operation
The LC75411ES and 75411WS have a function to switch zero-cross comparator signal detection locations, enabling the selection of the optimum detection location for blocks whose data is to be updated. Basically, the switching noise can be minimized by inputting the signal immediately following the block whose data is to be updated to the zero­cross comparator, so it is necessary to switch the detection location every time.
LC75411ES, 75411WS Zero-Cross Detection Circuit
No. 6928-27/33
LC75411ES, 75411WS
Volume Tone
Switch
Fader
Zero-cross
comparator
Selector
(3) Zero-cross switching control method
The zero-cross switching control method consists of setting the zero-cross control bits to the zero-cross detection mode (D36, D37 = 0), and specifying the detection blocks (D38, D39) before transmitting the data. These control bits are latched immediately following data transfer, that is to say beforehand in sync with the falling edge of CE, so when updating data of volumes, etc., it is possible to perform mode setting and zero-cross switching with one data transfer. An example of control when updating the data of the volume block is shown below.
(4) Zero-cross timer setting
If the input signal becomes lower than the zero-cross comparator detection sensitivity, or if only low-frequency signals are input, zero-cross detection continues to be impossible, and data is not latched during this time. The zero-cross timer can set a time for forcible latch during such a status when zero-cross detection is not possible.
(5) Cautions related to serial data transfer
1. To ensure that the high-frequency digital signals transferred to the CL, DI, and CE pins do not spill over to the analog signal block, either guard these signal lines with a ground pattern, or perform transmission using shielded wires.
2. The data format of the LC75411ES and 75411WS uses 8-bit addresses and 44-bit data. When sending data using multiples of 8 (when sending 48 bits), use the method described in Figure 1.
Method for Receiving Data Using Multiple of 8 of LC75411ES and 75411WS
Figure 1
For example, to set 25 ms, using T = 0.69CR and C = 0.033 µF, we obtain
Normally, a value between 10 ms and 50 ms is set.
Zero-cross detection
mode setting
Volume block
setting
No. 6928-28/33
LC75411ES, 75411WS
D36 D37 D38 D39
0 0 1 0
R=
25 ×10
0.69 × 0.033 × 10
–3
1.1 M
–6
Input switching controlDummy data
D43D42D41D40D39D38D37D36D3D2D1D0XXXX
Test mode control
X : don’t care
No. 6928-29/33
LC75411ES, 75411WS
Gain Step Characteristics Gain Step Characteristics
Output level — dB
Output level — dB
Step setting — dB Step setting — dB
LC75411ES V
DD
=9V
V
IN
=–30dBV Input L1 Output LFOUT f=1kHz
LC75411WS V
DD
=9V
V
IN
=–30dBV Input L1 Output LFOUT f=1kHz
Attenuation — dB
Attenuation — dB
Step setting — dB Step setting — dB
LC75411ES V
DD
=9V
V
IN
=0 f=1kHz Input L1 Output LFOUT
LC75411WS V
DD
=9V
V
IN
=0 f=1kHz Input L1 Output LFOUT
Input gain block
Main volume block
Graphic equalizer block
Fader block
Input gain block
Main volume block
Graphic equalizer block
Fader block
Input gain block
Main volume block
Graphic equalizer block
Fader block
Input gain block
Main volume block
Graphic equalizer block
Fader block
Main Volume Control Step Characteristics Main Volume Control Step Characteristics
No. 6928-30/33
LC75411ES, 75411WS
Fader Volume Control Step Characteristics Fader Volume Control Step Characteristics
Fader Volume Attenuation — dB
Fader Volume Attenuation — dB
THD — Frequency Characteristics THD — Frequency Characteristics
Total harmonic distortion — %
Total harmonic distortion — %
Step setting — dB Step setting — dB
Frequency, f — dB Frequency, f — dB
LC75411ES V
DD
=9V
V
IN
=0dBV Input L1 Output LFOUT f=1kHz
LC75411WS V
DD
=9V
V
IN
=0dBV Input L1 Output LFOUT f=1kHz
LC75411ES V
DD
=9V Input L1 Output LFOUT 80kHz LPF
LC75411WS V
DD
=9V Input L1 Output LFOUT 80kHz LPF
Input gain block
Main volume block
Graphic equalizer block
Fader block
Input gain block
Main volume block
Graphic equalizer block
Fader block
Input gain block
Main volume block
Graphic equalizer block
Fader block
Input gain block
Main volume block
Graphic equalizer block
Fader block
THD
METER
THD
METER
No. 6928-31/33
LC75411ES, 75411WS
THD — Input Level Characteristics THD — Input Level Characteristics
Total harmonic distortion, THD — %
Total harmonic distortion, THD — %
Input level, VIN — dBV Input level, VIN — dBV
THD — Supply Voltage Characteristics THD — Supply Voltage Characteristics
Total harmonic distortion, THD — %
Total harmonic distortion, THD — %
Supply voltage — VSupply voltage — V
LC75411ES V
DD
=9V 80kHz LPF Input L1, Output LFOUT With MV=0dB
LC75411ES 80kHz LPF Input L1 Output LFOUT
LC75411WS 80kHz LPF Input L1 Output LFOUT
LC75411WS V
DD
=9V 80kHz LPF Input L1, Output LFOUT With MV=0dB
Input gain block
Main volume block
Graphic equalizer block
Fader block
Input gain block
Main volume block
Graphic equalizer block
Fader block
THD
METER
Input gain block
Main volume block
Graphic equalizer block
Fader block
Input gain block
Main volume block
Graphic equalizer block
Fader block
THD
METER
Input gain block
Main volume block
Graphic equalizer block
Fader block
Input gain block
Main volume block
Graphic equalizer block
Fader block
THD
METER
Input gain block
Main volume block
Graphic equalizer block
Fader block
Input gain block
Main volume block
Graphic equalizer block
Fader block
THD
METER
No. 6928-32/33
LC75411ES, 75411WS
Bass Control Characteristics
Level — dB
Frequency, f — Hz
LC75411ES V
DD
=9V
V
IN
=–20dBV Input L1 Output LFOUT
LC75411ES V
DD
=9V
V
IN
=–20dBV Input L1 Output LFOUT
VDD=9V, VIN=0 MV=0 to –54dB
V
DD
=9V, VIN=0, Input=L1, Output=LFOUT
Loudness On, MV=0 to –54dB
VDD=9V, VIN=0, Input=L1, Output=LFOUT Loudness On, MV=0 to –54dB
V
DD
=9V, VIN=0
MV=0 to –54dB
LC75411WS V
DD
=9V
V
IN
=–20dBV Input L1 Output LFOUT
Bass Control Characteristics
Level — dB
Frequency, f — Hz
Treble Control Characteristics
Level — dB
Frequency, f — Hz
Treble Control Characteristics
Level — dB
Frequency, f — Hz
Output Level Control Characteristics
Level — dB
Frequency, f — Hz
Output Level Control Characteristics
Loudness Control Characteristics Loudness Control Characteristics
Level — dB
Level — dB
Level — dB
Frequency, f — Hz
Frequency, f — Hz Frequency, f — Hz
LC75411WS V
DD
=9V
V
IN
=–20dBV Input L1 Output LFOUT
PS No. 6928-33/33
LC75411ES, 75411WS
This catalog provides information as of June, 2001. Specifications and information herein are subject to change without notice.
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
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