Sanyo LC74982W Specifications
Ordering number : ENN*7023
91801TN (OT) No. 7023-1/14
Overview
The LC74982W is an LCD display scan converter IC that
converts NTSC and PAL TV signals to XGA resolution.
The video signal-processing circuits required to implement
an LCD TV set can be easily formed by combining this IC
with a digital decoder, a microcontroller, and an LCD
panel. Since this IC does not require an external frame
memory for resolution conversion, it can contribute to
minimizing total costs. As additional functionality, it also
provides inputs for personal computer video (up to XGA)
and digital TV (480p/480i). Since LC74982W operation is
based on expansion (resolution increasing) processing,
depending on the input resolution, it can also support use
of, for example, 800 × 600 and 800 × 480 dot resolution
LCD panels. Thus the LC74982W can be used in a wide
range of applications.
Features
•
NTSC and PAL input support: 24-bit or 16-bit digital
YCbCr signal input
• PC input support: Personal computer 24-bit digital RGB
signal input at resolutions up to XGA
• DTV (480i / 480p) input: 24-bit
or 16-bit
digital YCbCr
input
• Two-phase progressive scan RGB 18-bit (24 bit) and 36bit (48 bit) signal output
•
Simulated increased color-depth processing at 6-bit mode.
Values in parentheses apply in 8-bit mode.
•
YCbCr to RGB conversion
• Interlaced to progressive scan conversion
• Resolution conversion (enlargement)
• Variable display size and display position (independently
settable in the horizontal and vertical directions)
• Image quality adjustments: brightness, contrast, color,
sharpness, color phase, black balance, and white balance
• Built-in γ correction (LUT technique. Each 8-bit R, G,
and B signal is independently programmable.)
• Built-in OSD function (8 colors, 253 characters)
•I2C bus interface
• Constant frame-rate processing (identical frame periods
in the input and output signals) adopted so that no
external memory is required.
Specifications
• Supply voltage: 3.3 V (input pins are 5 V tolerant)
• Maximum operating frequency: 65.0 MHz
• Package: SQFP208
Applications
• LCD TVs, monitors, and projectors
• PDP displays
• Car television and car video monitors
Package Dimensions
unit: mm
3210-SQFP208
Preliminary
LC74982W
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
LCD TV Scan Converter IC
CMOS IC
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
28.0
30.6
0.15
0.2
3.8max
0.5
30.6
(0.5)
(1.25)
28.0
1
52
156 105
53
208
104
157
(3.2)
0.35
SANYO: SQFP208
[LC74982W]
No. 7023-2/14
LC74982W
I/O Specifications
Input Signal Overview
Signal type Pin No. Pin Description Notes
6 to 13 YIN7 to 0
Y/Y/R
54 to 61 RIN7 to 0
Video signals
16 to 23 UIN7 to 0
C/Cb/G
64 to 71 GIN7 to 0
26 to 33 VIN7 to 0
–/Cr/B
74 to 81 BIN7 to 0
90 HITV NTSC/PAL horizontal sync signal
91 VITV NTSC/PAL vertical sync signal
Sync signals
92 HIDTV DTV horizontal sync signal
93 VIDTV DTV vertical sync signal
94 HIPC PC horizontal sync signal
95 VIPC PC vertical sync signal
96 BLKIH Horizontal enable
Data enable signals
97 BLKIV Vertical enable
36 CLKITV NTSC/PAL clock
Pixel clocks
39 CLKIDTV DTV clock
42 CLKIPC PC clock
167 XTAL Display clock
• NTSC, PAL, and DTV (480i and 480p) inputs
YCbCr signals conform to the CCIR 601 standard.
The YC C signal is a multiplexed CbCr signal
(4:2:2).
• PC input (up to XGA)
• Three independent systems for both horizontal
and vertical sync signals
• Any input polarity may be used. Internal
automatic-discrimination.
• Input with the same logic. The polarity can be
inverted internally.
• A composite video signal can be input to BLKIH.
(BLKIV must be tied high in this case.)
• Three independent input systems
• Fixed frequency crystal oscillator (65 MHz maximum)
Output Signal Overview
Signal type Pin No. Pin Description Notes
106 to 111 ROEVEN5 to 0 Even pixels, red
114 to 119 GOEVEN5 to 0 Even pixels, green
Video signals 122 to 127 BOEVEN5 to 0 Even pixels, blue
in 6-bit output mode 130 to 135 ROODD5 to 0 Odd pixels, red
138 to 143 GOODD5 to 0 Odd pixels, green
146 to 151 BOODD5 to 0 Odd pixels, blue
106 to 111,
ROEVEN7 to 0 Even pixels, red
114, 115
116 to 119,
GOEVEN7 to 0 Even pixels, green
122 to 125
Video signals 126, 127,
BOEVEN7 to 0 Even pixels, blue
in 8-bit output mode 130 to 135
138 to 143,
ROODD7 to 0 Odd pixels, red
146, 147
182 to 189 GOODD7 to 0 Odd pixels, green
192 to 199 BOODD7 to 0 Odd pixels, blue
Sync signals
162 HOUT Horizontal sync signal
163 VOUT Vertical sync signal
Data enable signals
102 BLKHOUT Horizontal enable
103 BLKVOUT Vertical enable
154 DCLK1 Single-phase clock
Pixel clocks
155 DCLK1B Single-phase clock (inverted)
158 DCLK2 Two-phase clock
159 DCLK2B Two-phase clock (inverted)
• Each of the RGB channels is an 6-bit 2-phase
signal.
• The output mode can be switched to single-phase
output mode.
(Output from the ODD pin)
• Each of the RGB channels is an 8-bit 2-phase
signal.
• The output mode can be switched to single-phase
output mode.
(Output from the ODD pin)
• The sync period, position, and polarity can be set.
•
A composite sync signal can be output from VOUT.
• Outputs the same frequency as that of the crystal
oscillator.
• The enable period and the polarity can be set.
•
A composite signal can be output from BLKVOUT.
• Outputs a frequency 1/2 that of the crystal
oscillator.
No. 7023-3/14
LC74982W
Control Signal Overview
Signal type Pin No. Pin Description Notes
172 AICS Chip select
Three-wire bus 173 AIDA Data bus
174 AICK Bus clock
175 SDA Data bus
I
2
C-bus
176 SCL Bus clock
• Used for OSD control and γ correction
characteristics settings.
• Used to set the internal control registers and to
output internal status information.
• The slave address is “0111000+ (R/W)”.
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage V
DD
max –0.3 to +4.6 V
Input voltage V
I
–0.5 to + 5.5 V
Output voltage V
O
–0.3 to VDD+ 0.3 V
Allowable power dissipation Pd max Ta = 70°C 0.9 W
Storage temperature Tstg –55 to +125 °C
Operating temperature Topr –30 to +70 °C
Specifications
Absolute Maximum Ratings at VSS= 0 V
Parameter Symbol Conditions
Ratings
Unit
min typ max
Supply voltage V
DD
3.0 3.3 3.6 V
Input voltage range V
IN
0 — 5.5 V
Allowable Operating Ranges at Ta = –30 to +70°C
Parameter Symbol Conditions
Ratings
Unit
min typ max
Input pins C
IN
f = 1 MHz — — 10 pF
Output pins C
OUT
f = 1 MHz — — 10 pF
Bidirectional pins C
I/O
f = 1 MHz — — 10 pF
I/O Pin Capacitances at Ta = 25°C, VDD= VI= 0 V
Note: While the standard operating temperature is –30 to +70°C, for applications such as automotive applications, it can also be used over the range –40 to
+85°C. Note, however, that the value of the allowable power dissipation differs somewhat between these two cases. Contact your SANYO
representative for details if you need to use this device with the latter (wider) operating temperature range.
Parameter Symbol Conditions
Ratings
Unit
min typ max
Input high-level voltage V
IH
CMOS level 0.7 V
DD
— — V
CMOS level Schmitt 0.75 V
DD
— — V
Input low-level voltage V
IL
CMOS level — — 0.2 V
DD
V
CMOS level Schmitt — — 0.15 V
DD
V
Input high-level current I
IH
VI= V
DD
–10 — +10 µA
V
I
= VDD, with pull-down resistors attached. 10 — 100 µA
Input low-level current I
IL
VI= V
SS
–10 — +10 µA
Type B4, I
OH
= –2 mA VDD– 0.8 — — V
Output high-level voltage V
OH
Type B8, IOH= –4 mA VDD– 0.8 — — V
Type B12, I
OH
= –6 mA VDD– 0.8 — — V
Type B4, I
OL
= 2 mA — — 0.4 V
Output low-level voltage V
OL
Type B8, IOL= 4 mA — — 0.4 V
Type B12, I
OL
= 6 mA — — 0.4 V
Output leakage current I
OZ
In the high-impedance output state –10 — +10 µA
Pull-down resistance R
DN
35 70 140 kΩ
Quiescent current* I
DD
Outputs open, VI= VSSor V
DD
— — 100 µA
DC Characteristics at Ta = –30 to +70°C, VDD= 3.0 to 3.6 V
Note: * Certain of the input pins include built-in pull-down resistors. The quiescent current drain cannot be guaranteed in certain situations due to the
structure of these circuits.
No. 7023-4/14
LC74982W
Pin Assignment
160
165
170
175
180
185
190
195
200
205
100
95
90
85
80
75
70
65
60
55
DVDD
BLKVOUT
BLKHOUT
RST
DVSS
DVDD
PLLH
BLKIV
BLKIH
VIPC
HIPC
VIDTV
HIDTV
VITV
HITV
DVSS
DVDD
CLPCR
CLPCB
CLPY
CLPP
DVSS
DVDD
BIN0
BIN1
BIN2
BIN3
BIN4
BIN5
BIN6
BIN7
DVSS
DVDD
GIN0
GIN1
GIN2
GIN3
GIN4
GIN5
GIN6
GIN7
DVSS
DVDD
RIN0
RIN1
RIN2
RIN3
RIN4
RIN5
RIN6
RIN7
DVSS
DVSS
DCLK2
DCLK2B
DVDD
DVSS
HOUT
VOUT
VIRST
DVDD
DVSS
XTAL
DVDD
DVSS
EXCTR
MUTE
AICS
AIDA
AICK
SDA
SCL
PDOWN1
PDOWN2
CLKIO
DVDD
DVSS
TSTOA7 (GOODD0)
TSTOA6 (GOODD1)
TSTOA5 (GOODD2)
TSTOA4 (GOODD3)
TSTOA3 (GOODD4)
TSTOA2 (GOODD5)
TSTOA1 (GOODD6)
TSTOA0 (GOODD7)
DVDD
DVSS
TSTOB7 (BOODD0)
TSTOB6 (BOODD1)
TSTOB5 (BOODD2)
TSTOB4 (BOODD3)
TSTOB3 (BOODD4)
TSTOB2 (BOODD5)
TSTOB1 (BOODD6)
TSTOB0 (BOODD7)
TSTMOD3
TSTMOD2
TSTMOD1
TSTMOD0
TSTSUB3
TSTSUB2
TSTSUB1
TSTSUB0
DVDD
DVDD
DCLK1B
DCLK1
DVSS
DVDD
BOODD5 (TEST3)
BOODD4 (TEST2)
BOODD3 (TEST1)
BOODD2 (TEST0)
BOODD1 (ROODD7)
BOODD0 (ROODD6)
DVSS
DVDD
GOODD5 (ROODD5)
GOODD4 (ROODD4)
GOODD3 (ROODD3)
GOODD2 (ROODD2)
GOODD1 (ROODD1)
GOODD0 (ROODD0)
DVSS
DVDD
ROODD5 (BOEVEN7)
ROODD4 (BOEVEN6)
ROODD3 (BOEVEN5)
ROODD2 (BOEVEN4)
ROODD1 (BOEVEN3)
ROODD0 (BOEVEN2)
DVSS
DVDD
BOEVEN5 (BOEVEN1)
BOEVEN4 (BOEVEN0)
BOEVEN3 (BOEVEN7)
BOEVEN2 (BOEVEN6)
BOEVEN1 (BOEVEN5)
BOEVEN0 (BOEVEN4)
DVSS
DVDD
GOEVEN5 (GOEVEN3)
GOEVEN4 (GOEVEN2)
GOEVEN3 (GOEVEN1)
GOEVEN2 (GOEVEN0)
GOEVEN1 (ROEVEN7)
GOEVEN0 (ROEVEN6)
DVSS
DVDD
ROEVEN5
ROEVEN4
ROEVEN3
ROEVEN2
ROEVEN1
ROEVEN0
DVSS
DVSS
OSDRIN
OSDGIN
OSDBIN
OSDEN
YIN7
YIN6
YIN5
YIN4
YIN3
YIN2
YIN1
YIN0
DVDD
DVSS
UIN7
UIN6
UIN5
UIN4
UIN3
UIN2
UIN1
UIN0
DVDD
DVSS
VIN7
VIN6
VIN5
VIN4
VIN3
VIN2
VIN1
VIN0
DVDD
DVSS
CLKITV
DVDD
DVSS
CLKIDTV
DVDD
DVSS
CLKIPC
DVDD
SCANMOD
SCANEN
AVSS
PDO
AVDD
AVSS
VCOCNT
VOCORNG
AVDD
157
208
104
53
52
5045403530252015105
105110115120125130135140145150155
1
105
156
LC74982W
(Top view)
* ( ): Values in parentheses apply in 8-bit mode.
No. 7023-5/14
LC74982W
Pin Functions
Pin No. Pin
I/O type
Connection Notes
I/O Type
1 DVSS P GND Digital system ground
2 OSDRIN I g74980m03 Caption OSD microcontroller OSD red input (NTSC only)
3 OSDGIN I g74980m03 Caption OSD microcontroller OSD green input (NTSC only)
4 OSDBIN I g74980m03 Caption OSD microcontroller OSD blue input (NTSC only)
5 OSDEN I g74980m03 Caption OSD microcontroller OSD data enable (NTSC only)
6 YIN7 I g74980m03 Digital decoder MSB
7 YIN6 I g74980m03 or Y signal input
8 YIN5 I g74980m03 ADC or
9 YIN4 I g74980m03 or R signal input
10 YIN3 I g74980m03 Digital Interface
11 YIN2 I g74980m03
12 YIN1 I g74980m03
13 YIN0 I g74980m03 LSB
14 DVDD P Power supply Digital system power supply: 3.3 V
15 DVSS P GND Digital system ground
16 UIN7 I g74980m03 Digital decoder MSB
17 UIN6 I g74980m03 or C (CbCr multiplexed) signal input
18 UIN5 I g74980m03 ADC or
19 UIN4 I g74980m03 or Cb signal input
20 UIN3 I g74980m03 Digital Interface or
21 UIN2 I g74980m03 G signal input
22 UIN1 I g74980m03
23 UIN0 I g74980m03 LSB
24 DVDD P Power supply Digital system power supply: 3.3 V
25 DVSS P GND Digital system ground
26 VIN7 I g74980m03 Digital decoder MSB
27 VIN6 I g74980m03 or Cr signal input
28 VIN5 I g74980m03 ADC or
29 VIN4 I g74980m03 or B signal input
30 VIN3 I g74980m03 Digital Interface
31 VIN2 I g74980m03
32 VIN1 I g74980m03
33 VIN0 I g74980m03 LSB
34 DVDD P Power supply Digital system power supply: 3.3 V
35 DVSS P GND Digital system ground
36 CLKITV I g74980m05 Digital decoder TV clock input (data rate)
37 DVDD P Power supply Digital system power supply: 3.3 V
38 DVSS P GND Digital system ground
39 CLKIDTV I g74980m05 PLL DTV clock input
40 DVDD P Power supply Digital system power supply: 3.3 V
41 DVSS P GND Digital system ground
42 CLKIPC I g74980m05 Digital interface PC clock input (data rate)
43 DVDD P Power supply Digital system power supply: 3.3 V
44 SCANMOD I g74980m03 Open Scan test mode
45 SCANEN I g74980m03 Open Scan test enable
46 AVSS P GND Analog system ground
47 PDO O zwp3vpll3 Loop filter Charge pump output (open)
48 AVDD P Power supply Analog system power supply: 3.3 V
49 AVSS P GND Analog system ground
50 VCOCNT I g74100m06 Loop filter VCO control input (Connect to AV
SS
.)
51 VCORNG I g74100m06 Resistor VCO bias resistor input (Connect to AV
SS
.)
52 AVDD P Power supply Analog system power supply: 3.3 V
Continued on next page.
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