Sanyo LC7475 Specifications

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges,or other parameters) listed in products specifications of any and all SANYO products described or contained herein.

CMOS IC

On-Screen Display Controller

for PAL-Format Video

Ordering number:ENN3885A

LC7475

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

Overview

The LC7475 is a video display controller for superimposing text and low-level graphics onto a PAL-format television receiver. The LC7475 has 128 characters in internal ROM. Up to 288 characters can be displayed on a 12-line by 24-character display under microprocessor control. The LC7475 features four vertical and four horizontal character dimensions and 64 vertical and 64 horizontal screen start positions. It also features a flashing enable bit for each character position. The LC7475 operates from a 5 V supply and is a v ailable in 22-pin shrink DIPs.

Features

• Complete text and graphics video overlay circuitry.

• 128 characters in internal ROM.

• 288 character display capability.

• 12 × 18 dot-matrix character resolution.

• Approximately 0.5 or 1 s period character flashing option.

• Selectable flashing duty cycles of 25, 50 or 75%.

• Internal or external synchronization.

• Serial data control.

• 5 V supply.

• 22-pin shrink DIP.

Package Dimensions

unit:mm

3059-DIP22S

[LC7475]

22 12

6.4

7.62

111

0.95 0.48

21.2

1.78

3.25

0.51min

1.7

3.9max

3.3

SANYO : DIP22S

Pin Assignment

0.25

Top view

71901TN (KT)/9021JN No.3885–1/12

Block Diagram

LC7475

No.3885–2/12

Pin Description

rebmuNemaNnoitpircseD

1V 2NIXtupnirotallicsolatsyrC 3TUOXtuptuorotallicsolatsyrC 4TSETtuptuotseT 5TSRtupniteseR 6KLCStupnikcolcatadlaireS 7NIStupniatadlaireS 8SCtupnitcelespihC 9KBVLtupnitnemtsujdalevel-gniknalB

01AHCVLtupnitnemtsujdalevel-retcaragC 11V 21TUOVCtuptuooedivetisopmoC 31V 41NIVCtupnioedivetisopmoC 51V 61INYStupnirotarapescnyS 71CPEStupnitnemtsujdarotarapescnyS 81TUOPEStuptuorotarapescnyS 91NIPEStupnicnyslacitreV 02TUOCSOtuptuorotallicsokcolctoD 12NICSOtupnirotallicsokcolctoD 22V

LC7475

1SS

2DD

2SS

1DD

dnuorgtiucriclatigiD

ylppustiucricgolanA

dnuorgtiucricgolanA

ylppuscigoL

Specifications

Absolute Maximum Ratings

retemaraPlobmySsnoitidnoCsgnitaRtinU

egnaregatlovylppuSV

egnaregatlovtupnIV

egnaregatlovtuptuOV

noitapissidrewopelbawollAdPxam 52=aT(003 ˚ )CWm

erutarepmetgnitarepOrpoT 07+ot03–

erutarepmetegarotSgtsT 521+ot04–

Recommended Operating Conditions at Ta = 25˚C

retemaraPlobmySsnoitidnoCsgnitaRtinU

egatlovylppuscigoLV

egatlovylppusgolanAV

egnaregatlovylppuscigoLV

egnaregatlovylppusgolanAV

DD

I

O

1DD 2DD 1DD 2DD

V

V V

Vot3.0–

0.7+

SS

SS SS

SS

Vot3.0–

DD

Vot3.0–

DD

V72.1ot5.4

V

3.0+

V

3.0+

V

˚C ˚C

5V 5V

5.5ot5.4V V

1DD

No.3885–3/12

LC7475

Electrical Characteristics at T a = –30 to +70˚C, V

retemaraPlobmySsnoitidnoC

tnerrucylppuSI

egatlovtuptnilevel-wolTUOPESV

egatlovtupnilevel-wolKLCSdnaTSR,NIS,SCV

egatlovtupnilevel-hgihTUOPESV

tupnilevel-hgihKLCSdnaTSR,NIS,SC

egatlov

egatlovtupnioedivetisopmocINYSV egatlovtupnioedivetisopmocNIVCV

level-hgihNIPESdnaKLCS,TSR,NIS,SC

tnerructupni

tnerructupnilevel-hgihNICSOI

ycneuqerftupnirotarenegcnySf

ycneuqerftupnikcolctoDf

tnerrucegakaelTUOVCI

Timing Characteristics at Ta = –30 to +75˚C, V

retemaraPlobmySsnoitidnoC

htdiwesluptupniKLCSt

htdiwesluptupnilevel-hgihSCt

emitputestupnielbaneatadSCt

emitputestupniatadNISt

emitdlohtupnielbaneatadSCt

emitdlohtupniatadNISt

emitetirwdrowtib-61t

emitetirwatadMARt

DD

V

1LI 2LI

V

1HI

V

2HI

1NI

2NI

I

1HI

2HI

1CSO 2CSO

L

DD1

)KLCS(W

)SC(W

)SC(US

)NIS(US

)SC(H

)NIS(H

drow

TW

= 5V, V

DD1

1DD

= 5±0.5V

= 5V, unless otherwise noted

DD2

sgnitaR

nimpytxam

I,V5.4=

Am1=0.1V

LO

I,V5.4=

Am1=5.3V

HO

VSS– 3.0V2.0

V8.0

1DD

0.25.2V 2V

–1Aµ

37.71zHM

5701zHM

sgnitaR

nimpytxam

002sn

1sµ 002sn 002sn 2sµ

002sn 01sµ

1sµ

V

1DD

02Am

1DD

3.0+

1Aµ

01Aµ

tinU

V

P-P P-P

tinU

No.3885–4/12

LC7475

Input Timing

Data and address words are input in serial format on SIN. A 16-bit address word is input after the falling edge of CS followed by 16-bit data words. The address is incremented automatically after each data word. The data input timing is shown in figure 1. Only the lower eight bits of the address word are significant. Only the lower eight bits of data words at addresses 000H to 0AFH, the lower 11 bits of data words at addresses 0B0H to 0BBH, and the lower 12 bits of data words at addresses 0BCH to 0BFH are significant. All non-significant bits should be set to 0.

Figure 1. Input timing

RAM Memory Configuration

RAM memory is organized as 16-bit words as shown in table 1. Locations 000H to 0AFH are display RAM, locations 0B0H through to 0BBH are display line address registers, locations 0BCH to 0BDH are display control registers, location 0BEH is the video signal control register and location 0BFH is the general control register. Table 1. Memory configuration

sserddA

FEDCBA9876543210

otH000

00000000 LFC6C5C4C3C2C1C

HFA0

×

H0B0 0000

H1B0 0000

H2B0 0000

H3B0 0000

H4B0 0000

H5B0 0000

H6B0 0000

H7B0 0000

H8B0 0000

H9B0 0000

HAB0 0000

HBB0 0000

HCB0 0000

HDB0 0000

HEB0 0000

HFB0 0000