Sanyo LC74735W Specifications

Ordering number : ENN*7191

42602RM (OT) No. 7191-1/50

Overview

The LC74735W is an on-screen display CMOS IC that
displays characters and patterns on a TV screen.
For QVGA display, the LC74735W supports the use of
both a 12×18 dot character font and a 12×18 dot graphics
font with 16 colors with a total of 512 characters and
glyphs.
For WVGA display, the LC74735W supports the use of
both a 24×32 dot character font and a 12×16 dot graphics
font with 16 colors with a total of 512 characters and
glyphs.
The LC74735W can also implement extremely varied
displays by the use of an external ROM.
The LC74735W supports both QVGA (480×234) and
WVGA (800×480).

Features

• Screen structure
— Main:

QVGA mode: 40 characters × 13 lines (up to 520
characters) on a QVGA panel
WVGA mode: 33 characters × 15 lines (up to 495
characters) on a WVGA panel

— Wallpaper display screen: Permanent repetition of a

2×2 (horizontal × vertical) character pattern

• Character structure
— QVGA mode:

12 dots (horizontal) × 18 dots (vertical): Character
display
12 dots (horizontal) × 18 dots (vertical): Graphic
glyph display

— WVGA mode:

24 dots (horizontal) × 32 dots (vertical): Character
display

12 dots (horizontal) × 16 dots (vertical): Graphic
glyph display (1 pixel: 2x2 dots)

— Character display clock: About 9 MHz — QVGA

with an LC oscillator

33.2 MHz (maximum: 40 MHz) WVGA with an
external clock signal input

*: The ROM image is known when QVGA or WVGA

mode is specified.

• Number of characters: 512 (internal)
Up to 2048 characters when an external 16-bit 4M ROM
is used.

• Character sizes: Four horizontal sizes (1×, 2×, 3×, and
4×)
Four vertical sizes (1×, 2×, 3×, and 4×)
The character size is specified in line units.

• Display start positions: 512 positions in the horizontal
direction and 256 positions in the vertical direction.
QVGA mode - WVGA mode
Setting units: Horizontal: 1 dot - 2 dots (In screen units)
Vertical: 1 dot - 2 dots (In screen units)

• Display functions
— Blinking specification (In character units)

Period: 1/64, 1/32, and 1/16 of the vertical sync
signal (In screen units)
Duty: Fixed at 50%

— Box (raised or recessed) display

Raised/depressed specification (In character units)
Left: Off/on specification (In character units)
Right: Off/on specification (In character units)
Top: Off/on specification (In character units)
Bottom: Off/on specification (In character units)

— Border specification (In line units): Only valid with

glyphs from the character font.

Preliminary

LC74735W

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

On-Screen Display Controller

CMOS IC

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

• Color specification
Character
— Character color (In character units): 1 of 16 colors

can be specified.

— Character background color (In character units): 1 of

16 colors can be specified.

— Border color (In line units): 1 of 16 colors can be

specified.

• Graphic
— 16 types can be specified by ROM data

• Box color (line units) : 1/16 cdors

• Background color (screen units) : 1/16 colors

• Color table (palette)
— Sixteen colors can be selected from a set of 512

colors (One of which is specified to be transparent.)

— Number of color tables: 2. This allows up to 32

colors to be displayed at the same time.

• Wallpaper screen (Graphics glyphs only)
Wallpaper display: Repeated display under the main
screen (2 characters horizontally by 2 characters
vertically).
Sprite character display: Displayed above the main
screen (2 characters horizontally by 2 characters
vertically)

• Output
— QVGA

Analog RGB output
BLK (OSD display period signal)

— WVGA

Digital RGB output (3 bits per color)
BLK (OSD display period signal)

• Package: SQFP80

• Voltage: 3.3 V

Package Dimensions

unit: mm

3220-SQFP80

No. 7191-2/50

LC74735W

14.0

12.0

1.25 1.25

0.5

14.0

12.0

1.25

1.25

0.5

1 20

21

40

41

60

61

80

0.1

0.5

1.6max

1.4

0.5

0.2

0.135

SANYO: SQFP80

[LC74735W]

Pin Assignment

No. 7191-3/50

LC74735W

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20

60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41

A16
A17
CE
OE
VDD3
VSS3
D0
D1
D2
D3
D4
D5
D6
D7
VDD1
VSS1
D8
D9
D10
D11

VSS1

OSCin

OSCout

CTRL1

SCLK

SIN

CS

VDD1

VSYNC

VBLK

HSYNC

HBLK
TEST1
TEST2

RST
VSS1
VDD1

CLKOUT

VSS1
VDD1

VSS2

RREF

CVREF

COMP

BOUT

GOUT

ROUT

OUTR

VDD2

VSS1

BLK

BD0

BD1

BD2

GD0

GD1

GD2

RD0

RD1

RD2

80

79

78

77 76 75 74 73 72 71 70 69 68 67 66

65

64 63 62 61

21

22

23

24 25 26 27 28 29 30 31 32 33 34 35

36

37 38 39 40

VDD3

VSS3A0A1

A2

A3

A4

A5

A6

A7

VDD3

VSS3A8A9

A10

A11

A12

A13

A14

A15

No. 7191-4/50

LC74735W

Pin Functions

Pin No. Symbol Type Functional description

1 V

SS

1 Ground Digital system ground

2 OSCin

LC oscillator

Connections for the character output dot clock generator oscillator coil and capacitor.

3 OSCout

May also be used for external clock input.

4 CTRL1 OSCin oscillator input control

Switches between external clock input mode and LC oscillator mode.
Low: LC oscillator, high: external clock input MORE+

5 SCLK Clock input

Clock input for the serial data input system

MORE+ (This input has hysteresis characteristics.)

6 SIN Data input

Serial data input

MORE+ (This input has hysteresis characteristics.)

7 CS Enable input

Enable input for the serial data input system. Serial data input is enabled when this pin is low.

MORE+ (This input has hysteresis characteristics.)

8 VDD1 Power supply (+3.3 V) Digital system power supply: +3.3 V
9 VSYNC Vertical sync signal input

Vertical sync signal input

MORE+ (This input has hysteresis characteristics.)

10 VBLK Vertical blanking signal input

Vertical blanking signal input

MORE+ (This input has hysteresis characteristics.)

11 HSYNC Horizontal sync signal input

Horizontal sync signal input

MORE+ (This input has hysteresis characteristics.)

12 HBLK

Horizontal blanking signal input

Horizontal blanking signal input

MORE+ (This input has hysteresis characteristics.)

13 TEST1 Test mode control 1

Test mode control 1

Low: normal operation, high: test mode MORE+

14 TEST2 Test mode control 2

Test mode control 2

Low: normal operation, high: test mode (scan mode) MORE+

15 RST Reset input

System reset input

MORE+ (This input has hysteresis characteristics.)
16 VSS1 Ground Digital system ground
17 VDD1 Power supply (+3.3 V) Digital system power supply: +3.3 V
18 CLKOUT Clock output Clock output
19 VSS1 Ground Digital system ground
20 VDD1 Power supply (+3.3 V) Digital system power supply: +3.3 V
21 RD2 Rout output: bit 2

Rout output

22 RD1 Rout output: bit 1

This is a 3-bit digital output with values from 000 to 111.
23 RD0 Rout output: bit 0

24 GD2 Gout output: bit 2

Gout output

25 GD1 Gout output: bit 1

This is a 3-bit digital output with values from 000 to 111.
26 GD0 Gout output: bit 0

27 BD2 Bout output: bit 2

Bout output

28 BD1 Bout output: bit 1

This is a 3-bit digital output with values from 000 to 111.
29 BD0 Bout output: bit 0

30 BLK Blanking signal output This signal indicates the OSD display period.
31 VSS1 Ground Digital system ground
32 VDD2 Power supply (+3.3 V) Analog system power supply: +3.3 V
33 Outr outr output: analog Output. Connect a resistor Ro (67 Ω) to this pin.
34 Rout Rout output: analog D/A converter (3 bits) output. Connect a resistor Ro (200 Ω) to this pin.
35 Gout Gout output: analog D/A converter (3 bits) output. Connect a resistor Ro (200 Ω) to this pin.
36 Bout Bout output: analog D/A converter (3 bits) output. Connect a resistor Ro (200 Ω) to this pin.
37 CCOMP

Phase correction capacitor connection

Capacitor connection: 1.5 µF
38 CVREF Reference voltage output Capacitor connection: 0.1 µF
39 RREF

Reference resistor connection

Resistor connection: ro, 1540 Ω
40 VSS2 Ground D/A converter ground

Continued on next page.

No. 7191-5/50

LC74735W

Continued from preceding page.

Pin No. Symbol Type Functional description

41 D11 Data input 11 ROM data input 11. MORE+
42 D10 Data input 10 ROM data input 10. MORE+
43 D9 Data input 9 ROM data input 9. MORE+
44 D8 Data input 8 ROM data input 8. MORE+
45 VSS1 Ground Digital system ground
46 VDD1 Power supply (+3.3 V) Digital system power supply: +3.3 V
47 D7 Data input 7 ROM data input 7. MORE+
48 D6 Data input 6 ROM data input 6. MORE+
49 D5 Data input 5 ROM data input 5. MORE+
50 D4 Data input 4 ROM data input 4. MORE+
51 D3 Data input 3 ROM data input 3. MORE+
52 D2 Data input 2 ROM data input 2. MORE+
53 D1 Data input 1 ROM data input 1. MORE+
54 D0 Data input 0 ROM data input 0. MORE+
55 VSS3 Ground External ROM output system ground
56 VDD3

Power supply (+3.3 or +5.5 V)

External ROM output system power supply
57 OE Output enable ROM output enable output. This is an active low output.
58 CE Chip enable ROM chip enable output. This is an active low output.
59 A17 Address output 17 ROM address output 17
60 A16 Address output 16 ROM address output 16
61 A15 Address output 15 ROM address output 15
62 A14 Address output 14 ROM address output 14
63 A13 Address output 13 ROM address output 13
64 A12 Address output 12 ROM address output 12
65 A11 Address output 11 ROM address output 11
66 A10 Address output 10 ROM address output 10
67 A9 Address output 9 ROM address output 9
68 A8 Address output 8 ROM address output 8
69 VSS3 Ground External ROM output system ground
70 VDD3

Power supply (+3.3 or +5.5 V)

External ROM output system power supply
71 A7 Address output 7 ROM address output 7
72 A6 Address output 6 ROM address output 6
73 A5 Address output 5 ROM address output 5
74 A4 Address output 4 ROM address output 4
75 A3 Address output 3 ROM address output 3
76 A2 Address output 2 ROM address output 2
77 A1 Address output 1 ROM address output 1
78 A0 Address output 0 ROM address output 0
79 VSS3 Ground External ROM output system ground
80 VDD3

Power supply (+3.3 or +5.5 V)

External ROM output system power supply

No. 7191-6/50

LC74735W

Specifications

Maximum Ratings

Parameter Symbol Conditions

Ratings

Unit

min max

Supply voltage

V

DD

1 VDD1, VDD2 VSS– 0.3 VSS+ 4.6 V

V

DD

3 VDD3 (A0 to A17, CE, OE) VSS– 0.3 VSS+ 6.0 V

Input voltage V

IN

All input pins VSS– 0.3 VDD1 + 0.3 V

Output voltage

V

OUT

1 RD2:0, GD2:0, BD2:0, and BLK outputs VSS– 0.3 VDD1 + 0.3 V

V

OUT

2 A0 to A17, OE, CE outputs VSS– 0.3 VDD1 + 0.3 V
Maximum power dissipation Pdmax — 230 mW
Operating temperature Topg –30 +85 °C
Storage temperature Tstg –40 +125 °C

Parameter Symbol Conditions

Ratings

Unit

min typ max

Supply voltage

V

DD

1 VDD1, VDD2 3.0 3.3 3.6 V

V

DD

3 VDD3 3.0 3.3 5.5 V

V

IH

1 CTRL1, TEST1, TEST2

0.7 VDD1

— 5.5 V

High-level input voltage V

IH

2 SCLK, SIN, CS, VSYNC, HSYNC, RST

0.8 VDD1

— 5.5 V

V

IH

3 D0 to D11

0.7 VDD1

— 5.5 V

V

IL

1 CTRL1, TEST1, TEST2 VSS– 0.3 —

0.3 VDD1

V

Low-level input voltage V

IL

2 SCLK, SIN, CS, VSYNC, HSYNC, RST VSS– 0.3 —

0.2 VDD1

V

V

IL

3 D0 to D11 VSS– 0.3 —

0.3 VDD1

V

Oscillator frequency F

OSC1

OSCin and OSCout oscillator pins (LC oscillator) — 10 — MHz

F

OSC2

OSCin, VDD1 = 3.3 V — 33 40 MHz

External clock input V

IN

1 VDD1 = 3.3 V, CTRL1 = high 0.5 — 3.3 Vp-p

Vrefda Reference voltage — 1.1 — V

D/A (3 bit 3 ch)

Rfda

Output load resistance ROUT, GOUT, and BOUT

— 200 — Ω

Rfbda

Output load resistance OUTR

— 67 — Ω

Rref Reference load resistor, RREF — 1540 — Ω

Recommended Operating Conditions

No. 7191-7/50

LC74735W

Parameter Symbol Pin Conditions

Ratings

Unit

min typ max

V

OH

1

RD2:0, GD2:0, BD2:0, V

DD

1 = 3.0 V

VDD1 – 0.8

— — V

and BLK outputs I

OH

1 = –8 mA

High-level output voltage V

OH

2 A0:17, OE, and CE

V

DD

3 = 3.0 V

VDD3 – 0.8

— — V

I

OH

2 = –8 mA

V

OH

3 A0:17, OE, and CE

V

DD

3 = 4.5 V

VDD3 – 0.8

— — V

I

OH

3 = –8 mA

V

OL

1

RD2:0, GD2:0, BD2:0, V

DD

1 = 3.0 V

— — 0.4 V

and BLK outputs I

OL

1 = 8 mA

Low-level output voltage V

OL

2 A0:17, OE, and CE

V

DD

3 = 3.0 V

— — 0.4 V

I

OL

2 = 8 mA

V

OL

3 A0:17, OE, and CE

V

DD

3 = 4.5 V

— — 0.4 V

I

OL

3 = 8 mA

CTRL1, TEST1, TEST2,

IIH1 SCLK, SIN, CS, VSYNC, VIN= VDD1 — — 10 µA

HSYNC, RST

Input current

I

IH

2 D0:11 VIN= VDD3 — — 10 µA

CTRL1, TEST1, TEST2,

IIL1 SCLK, SIN, CS, VSYNC, VIN= V

SS

–10 — — µA

HSYNC

IIL2 D0:11 VIN= V

SS

–10 — — µA

I

DD

1 VDD1

All outputs open

— — 37 mA

Operating current drain

OSCin: 40 MHz

I

DD

2 VDD2 D/A on — — 22 mA

I

DD

3 VDD3 — — 20 mA

CLK Clock frequency — — 20 MHz

D/A Vmax Maximum output voltage V

DD

2 = 3.3 V — 1 — V

Vmin Minimum output voltage V

DD

2 = 3.3 V — 0 — V

Electrical Characteristics at Ta = –30 to +85°C, VDD= 3.3 V unless otherwise specified.

Supplementary Materials

No. 7191-8/50

LC74735W

tw(cs)

CS

tsu(cs) tw(sclk) tw(sclk) th(cs)

SCK

tsu(sin) th(sin)

SI

tword

twt

SCK

0 1 5 6 7 0 1 54 6 7

CSB

Parameter Symbol Conditions

Ratings

Unit

min typ max

Minimum input pulse width

tw (sclk) SCK 200 — — ns

tw (cs) CSB (The period CS is high) 1 — — µs

Data setup time

tsu (cs) CSB 200 — — ns

tsu (sin) SI 200 — — ns

Data hold time

th (cs) CSB 2 — — µs
th (sin) SI 200 — — ns

One word write time

tword The time to write 8 bits of data 4.2 — — µs

twt RAM data write time 1 — — µs

OSD Write (See figure 1.) at Ta = –30 to +85°C, VDD1 = 3.3 ± 0.3 V

Timing Characteristics

Figure 1 OSD Serial Data Input Timing

LC74735W System Block Diagram

No. 7191-9/50

LC74735W

CS

SIN

SCLK

VDD1, VDD2,VDD3 VSS1,VSS2,VSS3

RST

HSYNC
HBLK

HSYNC
HBLK

OSCin
OSCout

CTRL1

OE, CE
A0-17

D0-11

D/A

FROM

VRAM

Serial-to-

parallel

converter

16-bit

latch

+
command
decoder

Horizontal

direction

control register

Address

control circuit

Address

control circuit

External ROM

control circuit

Output control circuit

Vertical

direction

control register

Horizontal

direction

counter

Vertical

direction

counter

RAM and ROM

read and write

control

Character

size control

Timing

generator

RD2-0
GD2-0
BD2-0
BLK

CCOMP
CVREF
RREF

OUTR
ROUT
GOUT
BOUT

No. 7191-10/50

LC74735W

Display Control Command Table

Display Control Commands

The display control commands have serial input format that consists of 8-bit units transmitted LSB first.A commands
consists of a command identification code in the first byte and data in the second and following bytes. Both a first byte
and a second byte (16 bits) must be transmitted for each command. Commands 10, 11, and 71 set the IC to continuous
write mode. (Continuous write mode is cleared by setting the CS pin high.)

First byte Second byte

Command

Command identification code

Data Data

7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0

COMMAND00 (Write address)

1 0 0 0 0 0 V3 V2 V1 V0 H5 H4 H3 H2 H1 H0

Main

COMMAND01 (Write address)

1 0 0 0 0 1 0 0 0 SV0 0 0 0 0 0 SH0

Sub (Wallpaper)

1 0 0 1 0 0 RM2

RM1(1)

0 0 at BXS BXL BXR BXU BXD

Command 10 (Character write)

(2)

CB3 CB2 CB1 CB0 CC3 CC2 CC1 CC0

Main

(3)

0 0 CT0 I/E M/G C10 C9 C8

(4)

C7 C6 C5 C4 C3 C2 C1 C0

1 0 0 1 0 1 RM2

RM1(1)

0 0 0 0 0 0 0 0

Command 11 (Character write)

(2)

0 0 0 0 0 0 0 0

Sub (Wallpaper)

(3)

0 0 CT0 I/E M/G C10 C9 C8

(4)

C7 C6 C5 C4 C3 C2 C1 C0

COMMAND20 (System control) 1 0 1 0 0 0 0 0

TSTMD2 TSTMD1

Q/W2 Q/W1

SYSRST

CTERS

SRMERS

MRMERS

COMMAND21 (Display control) 1 0 1 0 0 0 0 1

LCSOFF

BK1 BK0 SBG1 SBG0

DSPBG DSPGS DSPGM
COMMAND22 (I/O polarity control) 1 0 1 0 0 0 1 0 BLD1 BLO0 BLOP BLO1 BLO0 CKP VIP HIP
COMMAND23

(Screen background color)

1 0 1 0 0 0 1 1 0 0

BGCT1 BGCT0

BGC3 BGC2 BGC1

BGC0

COMMAND24 (I/O polarity control 2) 1 0 1 0 0 1 0 0

DSPMD1 DSPMD0

DASEL

VBLKON HBLKON

CKOP VPB

HPB

COMMAND25 (Output control 3) 1 0 1 0 0 1 0 1 0 0 0 OTM2 OTM1 OTM0

QRM1 QRM0

COMMAND30

1 0 1 1 0 0 0 0 VPM7 VPM6 VPM5 VPM4 VPM3 VPM2 VPM1

VPM0

(Vertical display start position: main)
COMMAND31

1 0 1 1 0 0 1

HPM8 HPM7 HPM6 HPM5 HPM4 HPM3 HPM2 HPM1 HPM0

(Horizontal display start position: main)
COMMAND32

1 0 1 1 0 1 0 0 VPS7 VPS6 VPS5 VPS4 VPS3 VPS2 VPS1

VPS0

(Vertical display start position: sub)
COMMAND33

1 0 1 1 0 1 1

HPS8 HPS7 HPS6 HPS5 HPS4 HPS3 HPS2 HPS1 HPS0

(Horizontal display start position: sub)
COMMAND34

1 0 1 1 1 0 0 0 VPG7 VPG6 VPG5 VPG4 VPG3 VPG2 VPG1

VPG0

(Vertical display start position: screen)
COMMAND35

1 0 1 1 1 0 1

HPG8 HPG7 HPG6 HPG5 HPG4 HPG3 HPG2 HPG1 HPG0

(Horizontal display start position: screen)
COMMAND40

1 1 0 0 0 0 0 0 0 0 0 0

SZV1 SZV0 SZH1 SZH0

(Character size control)
COMMAND41

1 1 0 0 0 1 0 0

LSZ7 LSZ6 LSZ5 LSZ4 LSZ3 LSZ2 LSZ1 LSZ0

(Character size control: line setting U)
COMMAND42

1 1 0 0 1 0 0 0

LSZ15 LSZ14 LSZ13 LSZ12 LSZ11 LSZ10 LSZ9 LSZ8

(Character size control: line setting D)
COMMAND50

1 1 0 1 0 0 0 0

BXUW BXLW

0

BXUCT0 BXUC3 BXUC2 BXUC1 BXUC0

(Box control U)
COMMAND51

1 1 0 1 0 1 0 0

BXDW BXRW

0

BXDCT0 BXDC3 BXDC2 BXDC1 BXDC0

(Box control D)
COMMAND52

1 1 0 1 1 0 0 0

LBX7 LBX6 LBX5 LBX4 LBX3 LBX2 LBX1 LBX0

(Box control: line setting U)
COMMAND53

1 1 0 1 1 1 0 0

LBX15 LBX14 LBX13 LBX12 LBX11 LBX10 LBX9 LBX8

(Box control: line setting D)
COMMAND60

1 1 1 0 0 0

BLK1 BLK0 0 0 0 EGCT0 EGC3 EGC2 EGC1 EGC0

(Border control)
COMMAND61

1 1 1 0 0 1 0 0

LFC7 LFC6 LFC5 LFC4 LFC3 LFC2 LFC1 LFC0

(Border control: line setting U)
COMMAND62

1 1 1 0 1 0 0 0

LFC15 LFC14 LFC13 LFC12 LFC11 LFC10 LFC9 LFC8

(Border control: line setting D)
COMMAND70 (Write address)

1 1 1 1 0 0 0 0

0 0 0 CIN1 CTA3 CTA2 CTA1 CTA0

Color Table

COMMAND71 (Data write)

1 1 1 1 0 1

0

RM3(1)

0 0 0 0 TCK TB2 TB1 TB0

Color Table

(2)

0 0 TG2 TG1 TG0 TR2 TR1 TR0

Command 00 (Main screen write address set command)

No. 7191-11/50

LC74735W

• First byte

DA0 to 7 Register

Content

Notes

State Function
7 — 1
6 — 0 Command 0 identification code
5 — 0 Main screen write address setting
4 — 0
3 — 0

Sub-identification code: 0

2 — 0

1

V3

0

<MSB>

1

0 V2

0
1

• Second byte

DA0 to 7 Register

Content

Notes

State Function

7 V1

0 Main screen memory line address
1 (0 to E, hexadecimal)

6

V0

0 QVGA mode: 13 lines

<LSB>

1 WVGA mode: 15 lines

5

H5

0

<MSB>

1

4 H4

0
1

3 H3

0 Main screen memory character position address
1 (00 to 27, hexadecimal)

2 H2

0 QVGA mode: 40 characters
1 WVGA mode: 33 characters

1 H1

0
1

0

H0

0

<LSB>

1

No. 7191-12/50

LC74735W

Command 01 (Subscreen write address set command)

• First byte

DA0 to 7 Register

Content

Notes

State Function
7 — 1
6 — 0 Command 0 identification code
5 — 0 Subscreen memory write address setting
4 — 0
3 — 0

Sub-identification code: 1

2 — 1
1 — 0
0 — 0

• Second byte

DA0 to 7 Register

Content

Notes

State Function
7 — 0

6 V0

0 Subscreen memory line address

1 (0 to 1, hexadecimal) 2 lines
5 — 0
4 — 0
3 — 0
2 — 0
1 — 0

0

H0

0 Subscreen memory character address

<LSB>

1 (0 to 1, hexadecimal) 2 characters

No. 7191-13/50

LC74735W

Command 10 (Main screen display character data write setting command)

• First byte

DA0 to 7 Register

Content

Notes

State Function
7 — 1
6 — 0 Command 1 identification code
5 — 0 Display character data write setting
4 — 1
3 — 0

Sub-identification code 0

2 — 0

1 RM2

0
1

0 RM1

0
1

• Second byte (1)

DA0 to 7 Register

Content

Notes

State Function
7 — 0
6 — 0

5 at

0 Blinking off

Blinking specification

1 Blinking on

4 BXS

0 Protruding

Box specification: raised/recessed

1 Recessed

3 BXL

0 None

Box specification: left side

1 Box displayed

2 BXR

0 None

Box specification: right side

1 Box displayed

1 BXU

0 None

Box specification: top

1 Box displayed

0 BXD

0 None

Box specification: Bottom

1 Box displayed

When this command has been issued, the IC
remains in display character data write mode until
the CS pin is set high.

RM2 RM1 Mode

0 0 (1)(2)(3)(4) End
0 1 (1)(2)(3)(4) Continuous
1 0 (3)(4) Continuous
1 1 (2)(3)(4 Continuous

Continuous write mode selection

• Second byte (2)

DA0 to 7 Register

Content

Notes

State Function

7

CB3

0

[MSB]

1

6 CB2

0
1

5 CB1

0
1

4

CB0

0

[LSB]

1

3

CC3

0

[MSB]

1

2 CC2

0
1

1 CC1

0
1

0

CC0

0

<LSB>

1

Character background color specification
0000 to 1111, or 0 to F (hexadecimal)

Character color specification
0000 to 1111, or 0 to F (hexadecimal)

Character background color specification
When a character glyph is specified, 1 of 16 colors
may be selected.

Character color specification
When a character glyph is specified, 1 of 16 colors
may be selected.

*: This register is set to the all bits zero state when the IC is reset by the RST pin.

No. 7191-14/50

LC74735W

• Second byte (3)

DA0 to 7 Register

Content

Notes

State Function
7 — 0
6 — 0

5 CT0

0 Color table number 1

Color table selection

1 Color table number 2

4 I/E

0 Internal ROM

ROM selection

1 External ROM

3 M/G

0 Character

Character/graphic specification

1 Graphic

2

C10

0

[MSB]

1

1 C9

0

Character code specification

1

0 C8

0
1

• Second byte (4)

DA0 to 7 Register

Content

Notes

State Function

7 C7

0
1

6 C6

0
1

5 C5

0
1

4 C4

0
1

3 C3

0
1

2 C2

0
1

1 C1

0
1

0

C0

0

[LSB]

1

Character code

Internal ROM: 512 characters

000 to 1FF (hexadecimal)
0 to 511

External ROM: 2048 characters

000 to 7FF (hexadecimal)
0 to 2047

* Transparent character specification

I/E = 0 (Internal ROM)
M/G = 0 (Character)
Code = 1FF (hexadecimal)

Character code specification

*: This register is set to the all bits zero state when the IC is reset by the RST pin.

No. 7191-15/50

LC74735W

Command 11 (Subscreen display character data write setting command)

• First byte

DA0 to 7 Register

Content

Notes

State Function
7 — 1
6 — 0 Command 1 identification code
5 — 0 Display character data write setting
4 — 1
3 — 0

Sub-identification code 1

2 — 0

1 RM2

0
1

0 RM1

0
1

When this command has been issued, the IC
remains in display character data write mode until
the CS pin is set high.

RM2 RM1 Mode

0 0 [1][2][3][4] End
0 1 [1][2][3][4] Continuous
1 0 [3][4] Continuous
1 1 [2][3][4] Continuous

Continuous write mode selection

DA0 to 7 Register

Content

Notes

State Function
7 — 0
6 — 0
5 0
4 0
3 0
2 0
1 0
0 0

• Second byte (1)

DA0 to 7 Register

Content

Notes

State Function
7 0
6 0
5 0
4 0
3 0
2 0
1 0
0 0

• Second byte (2)

*: This register is set to the all bits zero state when the IC is reset by the RST pin.