Sanyo LC7456A Specifications

Ordering number : ENN*6733

LC7456A

CMOS IC

LC7456A

U.S. Closed Caption Signal Extraction IC

Preliminary

Overview

The LC7456A receives the composite video signal from the V / C (Video Chroma) signal processor and extracts the
closed caption data. This data and a clock signal, generated by an on-chip PLL, are then sent to the decoder IC. The
LC7456A is a CMOS version of the LA7945 IC also currently in production. The differences between the LA7945 and
the LC7456A are a change from Bipolar to CMOS technology, a smaller package size (22 pins to 16 pins), and a
reduction in the external circuitry requierd.
An LC8640XX series microcontroller is needed to perform the decoding after the LC7456A has extracted the caption
data from the composite video signal.

Features

• Low power consumption due to CMOS process

• Accurate caption signal extraction using a built-in pead hold circuit and digital technology.

• Power Requirement : 5V ± 10 %

• Package : DIP16

Ver. 1.02B
21594

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft's
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

D2000 RM (IM) O

No.6733-1/6

LC7456A

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10

9

CP

VSS2

VDD2

TEST2

V

COR

CVIN

PEAK

SLICE

VSS1
TEST1
LN21
CPDT
CPCK

VDD1

O / E
HSYNC

ILC00006

Pin Arrangement Diagram (DIP16)

Pin Function

Pin

No. Name

1VSS1 GND
2 TEST1 Test pin, usually open
3 LN21 Line 21H pulse output
4 CPDT Caption data output
5 CPCK Caption data latch clock output
6 O/E Field determination output
7 HSYNC HSYNC input
8VDD1 Power supply

9 SILCE Caption data slice level output
10 PEAK Caption data peak hold level output
11 CVIN Composite video input
12 VCOR Built-in VCO frequency control pin
13 TEST2 Test pin, usually open
14 VDD2 Power supply
15 VSS2 GND
16 CP Built-in PLL filter pin

Function

Package Dimensions

unit : mm
3006B

16

1

19.2

0.71 2.54

0.48

9

6.4

7.62

8

3.0

3.65max

3.4

1.2

SANYO : DIP16(300mil)

0.25

No.6733-2/6