Sanyo LC7454M Specifications
Ordering number : ENN*6685
CMOS IC
LC7454A/M
CMOS Data Slicer
Preliminary
Overview
The LC7454A/M is a data slicer IC for the Index Plus + signals. The LC7454A/M extracts the Caption and the Index Plus +
data form the Vertical Blanking Period of the TV signal and send it out to the decoder IC (Usually Microcomputer).
The LC7454A/M can be used to extract the Closed Caption signals, the XDS signals and the Index Plus + signals.
Features
(1) Low power dessipation by CMOS process
(2) Stable signal extraction by integrated peak hold circuit and digital circuit.
(3) Operation Voltage range : 5V ± 10%
(4) Package LC7454A : DIP18
LC7454M : MFP20
Ver.1.03
90699
91400 RM (IM) Ohta No.6685-1/16
LC7454A/M
VSS
Pin Assignment
1
2
3
4
5
6
7
8
9
LC7454A LC7454M
* VDD1and VSS1are power supply terminals for digital circuit. VDD2 and VSS2 are power supply terminals for analog
circuit. Connect there terminals as the following diagram in order to reduce the noise disturbance between two powers.
DIP18 MFP20
VSS1
TEST
LN26
O/
/CFOUT
E
/CFIN
HS
DATA
SCKIN
CE
IOC
VSS2
VDD2
MOD1
VCOR
CVIN
MOD0
VDD1
SLICE
Power
supply
CP
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
10
VSS1
TEST
LN26
O/
/CFOUT
E
/CFIN
HS
DATA
SCKIN
CE
IOC
NC
LC7454A/M
VDD1
VSS1
VDD2
2
CP
VSS2
VDD2
MOD1
VCOR
CVIN
MOD0
VDD1
SLICE
NC
20
19
18
17
16
15
14
13
12
11
No.6685-2/16
Package Dimension
(unit : mm)
3007B
Package Dimension
(unit : mm)
3036C
LC7454A/M
SANYO : DIP-18
SANYO : MFP-20
No.6685-3/16
LC7454A/M
selection
li
l
CP
VCOR
SLICE
O/E/CFOUT
HS/CFIN
CVIN
(Mode 1,3)
(Mode 2)
circuit
Oscillation
(Mode 2)
(Mode3)
(Mode 1)
(Mode 2)
PLL reference clock
PLL
(Mode 3)
(Mode 1)
(VCO)
32bit data
output buffer 5
32bit data
output buffer 4
32bit data
output buffer 3
Pedestal clamp
Sync separator
control
32bit data buffer
Data transmit
32bit data
output buffer 2
cer contro
Data s
Data slicer
Slice line
data buffer
16bit line select
Data
judgment
Data
input/output
32bit data
output buffer 1
16bit data
judgement buffer
control
Input
control
LC7454system block diagram
LN26
CE
IOC
DATA
SCKIN
No.6685-4/16
LC7454A/M
Operation on each mode
The LC7454 has three operating modes. The operation mode be selected by the status of MOD0 and MOD1 terminals. The functionality of
three modes are the same. Only the PLL reference frequen cy which is used to gener ate operat ion clo ck is di fferent. Use mod e1 or mode3
only in the application which uses 2x data. Any mode (Mode1,2 or 3) can be used in the 1x data only application.
Terminal
MOD1 MOD0
Open Open Mode1 NTSC-VCR Use H-sync signal which is separated from C-Video signal.
Open VDD1 Mode2 NTSC-VCR Use 1/32 divided signal 503 KHz which is generated by external
VDD Open Mode3 NTSC-TV Use H-sync signal from Fly Back.
Terminal Functions
Terminal #
(DIP18)
1 VSS1 Ground
2 TEST Test terminal, Open in normal operation
3 LN26 32µs Pulse output at line 26 timing on both field
4
5
6 DATA Line select data input and slice data output *2
7 SCKIN Data transmit clock input
8
9 IOC Data direction control signal input *4
10 SLICE Pulse outpu t at selected slice line
11 VDD1 Power terminal
12 MOD0 Open Connect to VDD Open
13 CVIN Conposit video input
14 VCOR Connect resister for internal VCO oscillation frequency control
15 MOD1 Open Open Connect to VDD
16 VDD2 Power terminal
17 VSS2 Ground
18 CP Filter terminal for internal PLL
*1 ‘H’ level in Odd field, ‘L’ level in Even field.
*2 N-ch open drain in output mode.
*3 Feed ‘L’ level only when data transmission is in effect. If CE=’H’, data terminal will become
input/output disable, SCKIN terminal will become input disable.
*4 ‘H’ level : Output mode
‘L’ level : Input mode
Terminal
name
O/E/CFOUT
HS
CE
MODE Applications PLL reference
ceramic resonator.
Function Description
Mode 1 Mode 2 Mode 3
Pulse output for field
judgment *1
/CFIN Sync separated HS pulse
output
Chip select input *3
Output terminal for ceramic
resonator
Input terminal for Ceramic
resonator
Pulse output for field
judgment *1
External HS pulse input
No.6685-5/16
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