Sanyo LC7444 Specifications

Ordering number : EN4305A

CMOS LSI

LC7444

Dual VCO

Overview

The LC7444 consists of two independent VCO (voltage controlled oscillator) circuits.

These circuits support VCO operation with only the addition of external resistors that determine the oscillation range.

Features

•Two independent VCO circuits

•The oscillator frequency range can be set with external resistors.

•Good linearity in the voltage - frequency conversion characteristics

•High-impedance oscillator control voltage input

•CMOS clock output

•Fabricated in a CMOS process for lower power

•Oscillator frequency range: 8 to 32 MHz

•Operating supply voltage: 5 V ± 10%

•Package: DIP14

Package Dimensions

unit: mm

3003A-DIP14

[LC7444]

SANYO: DIP14

Specifications

Absolute Maximum Ratings at Ta = 25 ± 2°C, V SS1 = VSS2 = 0 V, VDD = VDD1, VDD2

Parameter	Symbol	Conditions	Ratings	Unit
Maximum supply voltage	VDD max		–0.3 to +7.0	V
Maximum input voltage	VIN max		–0.3 to VDD + 0.3	V
Maximum output voltage	VOUT max		–0.3 to VDD + 0.3	V
Allowable power dissipation	Pd max		300	mW
Operating temperature	Topr		–10 to +70	°C
Storage temperature	Tstg		–55 to +125	°C

Allowable Operating Ranges at Ta = –10 to +70°C, VSS1 = VSS2 = 0 V, VDD = VDD1, VDD2

Parameter	Symbol						Conditions	min	typ	max	Unit
Supply voltage	VDD							4.5	5.0	5.5	V
Input high level voltage	VIH
			ENA1,		ENA2			0.7 VDD			V
Input low level voltage	VIL									0.3 VDD	V
			ENA1,		ENA2
Oscillator range resistors	Rrng		R1, R2					6.8		13	kΩ

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

52295TH (OT) No. 4305-1/3

LC7444

Electrical Characteristics at Ta = 25 ± 2°C, VDD = 5 V ± 10%, VSS1 = VSS2 = 0 V, VDD = VDD1, VDD2

Parameter	Symbol					Conditions	min	typ	max	Unit
Output high level voltage	VOH		OUT1, OUT2: IOH = –1 mA				VDD – 0.4			V
Output low level voltage	VOL		OUT1, OUT2: IOL = 1 mA						0.4	V
Quiescent current	IDDS					= VDD, FC1, FC2 = VSS		2		mA
			ENA1,		ENA2
Operating current drain	IDD		R1 = R2 = 7.5 kΩ , no output load,					7		mA
			oscillator clock = 20 MHz
Input leakage current	IIH, IIL						–1		+1	µA
Oscillator clock frequency	fo		R1, R2 = 6.8 kΩ , FC1, FC2 = VSS to VDD*1				16		32	MHz
operating range			R1, R2 = 13 kΩ , FC1, FC2 = VSS to VDD*1				8		16	MHz
Duty	Du	*2						50		%
Note: 1.

2. Duty: Du

tH

Du = tH + tL × 100

Pin Assignment

No. 4305-2/3