Sanyo LC7441NE Specifications

Sanyo LC7441NE Specifications

Ordering number:ENN*3941B

CMOS IC

LC7441N, 7441NE

Picture-in-picture Controller for TVs and VCRs

Preliminary

Overview

The LC7441N, 7441NE are picture-in picture (PIP) system controller ICs for use in NTSC, PAL or multi-system (both NTSC and PAL) TVs and VCRs. The LC7441 PIP system configuration requires discrete LC7480 A/D converter and memory ICs.

The LC7441 system controller IC provides nested-picture main-screen/sub-screen video signal control. Single or multiple (2) sub-screens occupying 11.11% (one-third height, one-third width) of the main-screen can be constructed and controlled. Features include still/active display, white/color frame, fixed/variable (screen) positioning, and wipe function for gradual sub-screen display and erasure. Sub-screen horizontal resolution is achieved by 248 6-bit, 64-level samples.

The LC7441 construction includes A/D interface, vertical(VERT) filter, memory controller, odd-field decision circuits, read/write PLLs and D/A converters.

The LC7441 operates from a 5 V supply and is available in 64-pin DIPs and 64-pin QIPs.

Features

NTSC, PAL and multi-system compatibility.

TV and VCR signals.

Forms component-based PIP controller system.

One or two (nested) sub-screens occupying 11.11% of main-screen.

Still and active video display control.

White and colored screen frames.

Fixed and variable screen positioning.

Gradual sub-screen display and erasure (wipe) function.

A/D interface, vertical (VERT) filter, memory controller.

Three D/A converters.

5 V supply.

64-pin DIP and 64-pin QIP.

Package Dimensions

unit:mm

 

 

 

 

 

 

 

 

 

3071-DIP64S

 

 

 

 

 

 

 

 

 

 

 

 

[LC7441N]

 

 

 

 

64

 

 

 

 

 

33

 

 

 

 

 

 

 

 

 

 

 

19.05

16.8

 

 

 

 

 

 

 

 

 

0.25

1

 

 

 

 

 

32

 

 

 

 

 

 

57.2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4.0

5.0max

 

 

 

 

 

 

 

 

 

3.2

 

 

 

0.95

 

0.48

1.78

1.01

0.51min

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SANYO : DIP64S

unit:mm

 

 

 

 

 

 

 

 

 

3159-QIP64E

 

 

 

 

 

 

 

 

 

 

 

[LC7441NE]

 

 

 

 

 

 

 

 

 

17.2

 

 

 

 

 

 

 

 

 

14.0

1.6

 

 

 

 

 

 

1.0

0.8

0.35

1.0

0.15

 

 

 

 

 

33

 

 

1.6

1.0

48

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

32

 

 

 

 

 

 

49

 

 

 

 

 

 

 

 

 

 

 

 

 

 

17.2

14.0

 

 

 

 

 

 

 

 

 

 

0.8

 

 

 

 

 

 

 

 

 

 

 

 

 

17

 

 

 

 

 

1.0

64

 

 

3.0max

 

 

 

 

 

1

 

16

 

0.1

 

 

 

 

 

 

2.7

 

 

 

 

 

 

 

 

 

 

 

 

 

15.6

0.8

 

 

 

 

 

 

 

 

 

 

SANYO : QIP64E

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges,or other parameters) listed in products specifications of any and all SANYO products described or contained herein.

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

O3101TN (KT)/51595TH(ID)/4212JN No.3941–1/20

LC7441N, 7441NE

Pin Assignments

Top view

No.3941–2/20

LC7441N, 7441NE

Block Diagram

No.3941–3/20

LC7441N, 7441NE

PIP System Diagram

Pin Functions

 

 

 

 

 

 

 

 

 

 

 

Function

QIP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

TV/VCR select, CMOS input

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

NTSC/PAL select, CMOS input

 

 

 

 

 

 

 

 

 

 

 

 

3

11

 

 

 

 

 

 

 

 

 

 

DT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

12

 

 

 

 

 

 

 

 

 

 

WE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5

13

 

 

 

 

 

 

Dual-port memory control outputs

 

RAS

 

 

 

 

 

 

 

 

 

 

 

 

 

6

14

 

 

 

 

 

CAS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7

15

 

 

SC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Continued on next page.

No.3941–4/20

LC7441N, 7441NE

Continued from preceding page.

 

Number

Name

Equivalent circuit

 

Function

 

 

 

 

QIP

 

DIP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

 

16

SODI3

 

 

 

 

 

 

 

 

 

 

 

 

9

 

17

SODI2

 

4-bit, dual-port memory serial output data, TTL

 

 

 

 

 

 

 

10

 

18

SODI1

 

inputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

11

 

19

SODI0

 

 

 

 

 

 

 

 

 

 

 

 

12

 

20

WDO3

 

 

 

 

 

 

 

 

 

 

 

 

13

 

21

WDO2

 

4-bit, dual-port memory input data output lines

 

 

 

 

 

 

 

14

 

22

WDO1

 

 

 

 

 

 

 

 

 

 

 

 

 

15

 

23

WDO0

 

 

 

 

 

 

 

 

 

 

 

 

16

 

24

 

A7

 

 

 

 

 

 

 

 

 

 

 

 

17

 

25

 

A6

 

 

 

 

 

 

 

 

 

 

 

 

18

 

26

 

A5

 

 

 

 

 

 

 

 

 

 

 

 

19

 

27

 

A4

 

8-bit, dual-port memory address output lines

 

 

 

 

 

 

 

20

 

28

 

A3

 

The msb is A7, and the lsb, A0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

21

 

29

 

A2

 

 

 

 

 

 

 

 

 

 

 

 

22

 

30

 

A1

 

 

 

 

 

 

 

 

 

 

 

 

23

 

31

 

A0

 

 

 

 

 

 

 

 

 

 

 

 

24

 

32

DVDD

 

5 V digital supply

 

25

 

33

DVSS

 

Digital ground

 

26

 

34

 

AD5

 

 

 

 

 

 

 

 

 

 

 

 

27

 

35

 

AD4

 

 

 

 

 

 

 

 

 

 

 

 

28

 

36

 

AD3

 

6-bit, sampled digital data TTL inputs

 

 

 

 

 

 

 

29

 

37

 

AD2

 

The msb is AD5, and the lsb, AD0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

30

 

38

 

AD1

 

 

 

 

 

 

 

 

 

 

 

 

31

 

39

 

AD0

 

 

 

 

 

 

 

 

 

 

 

32

 

40

YSW

 

A/D interface Y-select output

 

 

 

 

 

 

 

 

 

33

 

41

RSW

 

A/D interface R –

Y select output

 

 

 

 

 

 

 

 

 

34

 

42

BSW

 

A/D interface B –

Y select output

 

 

 

 

 

 

 

 

35

 

43

ADCLK

 

Sampling-clock output

 

 

 

 

 

 

 

 

36

 

44

CLAMPAD

 

A/D conversion clamp pulse output

 

 

 

 

 

 

 

 

37

 

45

 

KH

 

Sub-screen horizontal sync input

 

 

 

 

 

 

 

 

38

 

46

 

KV

 

Sub-screen vertical sync, Schmitt-trigger input

 

 

 

 

 

 

 

 

39

 

47

 

OH

 

Main-screen horizontal sync input

 

 

 

 

 

 

 

 

40

 

48

 

OV

 

Main-screen vertical sync, Schmitt-trigger input

 

 

 

 

 

 

 

 

41

 

49

PLLOH

 

Read-PLL horizontal sync signal select, CMOS input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

42

 

50

 

SBY

 

Active-LOW standby mode set, CMOS input

 

 

 

 

 

 

 

 

43

 

51

 

WK

 

Sub-screen frame ON/OFF select, CMOS input

 

 

 

 

 

 

 

 

44

 

52

KDIS

 

Sub-screen display ON/OFF select, CMOS input

 

 

 

 

 

 

 

 

 

Continued on next page.

No.3941–5/20

LC7441N, 7441NE

Continued from preceding page.

 

Number

 

Name

Equivalent circuit

Function

 

 

 

 

QIP

 

DIP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Serial data enable and still picture select, CMOS

45

 

53

 

SDE/STL

 

 

 

 

input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

46

 

54

 

SER/PIN

 

Serial data and pin data select, CMOS input

 

 

 

 

 

 

 

 

 

 

47

 

55

 

SD/FHP

 

Serial data and sub-screen horizontal position

 

 

 

select, CMOS input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

48

 

56

SCK/FVP

 

Serial data clock and sub-screen vertical position

 

 

select, CMOS input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

49

 

57

 

WAKU

 

Frame output

 

 

 

 

 

 

 

 

 

 

50

 

58

 

KOUT

 

Main-screen/sub-screen switch, blanking signal

 

 

 

output

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

51

 

59

 

 

 

 

 

Active-LOW reset, CMOS input

 

 

 

RES

 

 

 

 

 

 

 

 

 

 

 

52

 

60

CLAMPDA

 

D/A converter clamp-pulse output

 

 

 

 

 

 

 

 

 

 

53

 

61

 

AVDD

 

5 V analog supply

54

 

62

 

AVSS

 

Analog ground

55

 

63

 

BAOUT

 

B – Y D/A converter output

 

 

 

 

 

 

 

 

 

 

56

 

64

 

YAOUT

 

Y D/A converter output

 

 

 

 

 

 

 

 

 

 

57

 

1

 

RAOUT

 

R – Y D/A converter output

 

 

 

 

 

 

 

 

 

 

58

 

2

 

 

NC

 

No connection

 

 

 

 

 

 

 

 

 

 

59

 

3

 

VREF

 

D/A converters reference voltage input

 

 

 

 

 

 

 

 

 

 

60

 

4

 

BIAS

 

D/A converters bias capacitor connection

 

 

 

 

 

 

 

 

 

 

61

 

5

 

KLPFO

 

Sub-screen horizontal sync PLL charge-pump,

 

 

 

tristate output

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

62

 

6

 

KLPFI

 

Sub-screen horizontal sync PLL VCO clock input

 

 

 

 

 

 

 

 

 

 

63

 

7

 

OLPFI

 

Sub-screen horizontal sync PLL VCO clock input

 

 

 

 

 

 

 

 

 

 

64

 

8

 

OLPFO

 

Main-screen horizontal sync PLL charge-pump,

 

 

 

tristate output

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

No.3941–6/20

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