Sanyo LC74402 Specifications

Ordering number : EN*4872A
93098HA (OT) / 30295TH (OT) No. 4872-1/19
LC74401E, 74402, 74402E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
PIP Controllers
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
Overview
The LC74401E, LC74402, and LC74402E are memory controllers for TV set and VCR PIP (picture in picture) systems. Since these LSIs include three D/A converter circuits, a component PIP system can be constructed by combining one of these LSIs with memory and an A/D converter such as the LC7480.
Features
• Horizontal resolution: 600 TV lines
*1
• Three D/A converters (for the Y, R-Y, and B-Y signals) are incorporated in the PIP memory controller block.
• High image quality is supported by vertical filter function frame memory processing*2.
•I2C bus controlled.
• Built-in PLL circuit (requires an external LPF)
• Supports NTSC, PAL, and multiple (NTSC-PAL) formats
• External control functions (only provided by the LC74401E) — 8-bit D/A converter (PWM): Six pins — General-purpose ports: Four pins
• Sub-screen specifications — Number of sub-screens: 1-8
*2
— Display on/off and frame on/off/color switching,
wipe function
— Supports switching between fixed (4 corners) and
arbitrary (8-bit specification of vertical and horizontal position) display positions.
— Size: Area: 1/4, 1/9, 1/16, Vertical compression: 1/2,
1/3, 1/4; Horizontal compression: 2/3, 1/3, 1/6
Note: Horizontal compression can be adjusted by
changing the PLL divisor. The display area can be changed independently in the vertical and horizontal directions.
— Horizontal resolution (Y signal): About 250 dots — Gradation (quantization): 64 (6 bits)
• Operating supply voltage: 5 V ± 10%
• QFP80E: LC74401E
• DIP64S: LC74402-Pin assignment identical to the LC7442 (except for the serial control pins)
• QFP64E: LC74402E-Pin assignment identical to the LC7442E (except for the serial control pins) Note 1
When the main screen synchronization PLL has the standard value (PLL7 to PLL3 = 10011)
Note 2: The specifications depend on the amount of
external memory as listed in the table below.
o: Frame display of both dynamic and static images supported.
(Frame memory processing)
▲: Frame display of dynamic images only supported.
✕: Not supported.
Note: The number of sub-screens listed in the table above are doubled
in split mode. (However, image quality is reduced.)
D/A Clock
Y 15.00 MHz R-Y 3.75 MHz B-Y 3.75 MHz
Display memory 256 K 1 M One screen o
Two screens o Three screens Four screens
Pin Assignments
No. 4872-2/19
LC74401E, 74402, 74402E
unit: mm
3159-QFP64E
[LC74402E]
unit: mm
3071-DIP64S
SANYO: DIP64S
[LC74402]
Package Dimensions
unit: mm
3074-QFP80E
SANYO: QIP80E
[LC74401E]
SANYO: QIP64E
No. 4872-3/19
LC74401E, 74402, 74402E
Block Diagram
No. 4872-4/19
LC74401E, 74402, 74402E
Component-Type PIP System Structure Based on the LC74401E/2/2E and the LC7480
No. 4872-5/19
LC74401E, 74402, 74402E
Functional Overview
1. Reduction options Vertical: Selectable 1/2, 1/3 and 1/4 reduction vertical filter coefficients. Horizontal: (1/1) to 2/3 to (1/2) to 1/3 to (1/4) to 1/6. Intermediate values are implemented using the aspect correction function.
2. Number of sub-screens With 1 Mb of memory: 1 to 4 or (8). * Values in parentheses are for SPLIT mode, where the image quality is reduced. With 256 kb of memory: 1 or (2).
3. Static images With 1 Mb of memory: Frame static image (supported with 2 or fewer screens) or field static images With 256 kb of memory: Field static image
4. Display position Screen A: Fixed positions in the four corners Screen B: Free positioning (Specified by 8 bits in each of the vertical and horizontal directions.)
5. Frame
• On/off selectable
• Two types that differ by insertion method
— Pin frame: The frame position is specified by a high level pin output. (application frame insertion) — D/A frame: A 50% white or arbitrary color overlapped on the Y, R-Y, and B-Y video signals.
6. Wipe Twelve types
7. Blanking size The vertical and horizontal directions can be specified independently (6 bits each) Sixteen forms can be specified.
8. Blue background The sub-screen can be set to all blue or all black.
9. Memory clear Sets the data written to video memory to a fixed value corresponding to a 25% white color.
10. Wide-screen TV support
• Aspect correction function
• Subtitle shifting
The subtitle area can be trimmed and displayed as a sub-screen. The vertical reduction ratio can be set independently to 1/4, 1/3, or 1/2. The horizontal reduction can be set to values up to 1/1 using mode 2E.
11. Support for NTSC, PAL, and multi-mode (NTSC-PAL) products
12. External control functions using an I2C interface (LC74401E only)
• Six 8-bit D/A converter circuits built-in (PWM)
• Four general-purpose ports built-in
13. Setting adjustments Fine adjustment of various settings, including sub-screen position displacement and color shift is supported.
No. 4872-6/19
LC74401E, 74402, 74402E
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