Applications
• Remote controllers for telephone answering machines
and other telephone products
Features
• Detects 16 DTMF signals.
• Includes on-chip all filters required in a DTMF receiver
— Dial-tone filter
— High-frequency group bandpass filter
— Low-frequency group bandpass filter
• Serial data output
• Supports microprocessor-controlled guard times.
• Wide operating power-supply voltage range: 2.7 to 5.5 V
• Supports a low power mode that allows current
dissipation to be reduced.
Package Dimensions
unit: mm
3086A-MFP10S
Ordering number : EN5000A
DTMF Receiver LSI
63098HA (OT)/72595HA (OT) No. 5000-1/6
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Specifications
Absolute Maximum Ratings at Ta = 25°C
Allowable Operating Ranges at Ta = –35 to +70°C, VSS= 0 V
DC Electrical Characteristics at Ta = 25°C, VDD= 3 V, VSS= 0 V
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage V
DD
max –0.3 to + 6.0 V
Input voltage V
IN
–0.3 to VDD+ 0.3 V
Input current I
IN
–10 to +10 mA
Output voltage V
OUT
–0.3 to VDD+ 0.3 V
Allowable power dissipation Pd max Ta ≤ 70°C 120 mW
Operating temperature Topr –35 to +70 °C
Storage temperature Tstg –50 to +125 °C
Parameter Symbol Conditions min typ max Unit
Operating supply voltage V
DD
2.7 5.5 V
Input high-level voltage V
IH
Pin 7 0.7 V
DD
V
Pin 2 0.85 V
DD
V
Input low-level voltage V
IL
Pin 7 0.3 V
DD
V
Pin 2 0.15 V
DD
V
Parameter Symbol Conditions min typ max Unit
Operating supply current I
DD
(op) 1.6 2.8 mA
Standby supply current I
DD
(st) PD pin = 3 V 20 µA
Output high-level current I
OH
Pins 6, 8 and 9, V
OUT
= 2.6 V –0.3 mA
Output low-level current I
OL
Pins 6, 8 and 9, V
OUT
= 0.4 V 0.6 mA
Input impedance Zin Pin 1 10 kΩ
Pull-down resistor current I
SI
PD = 3 V 1.2 3.0 µA
CMOS LSI
LC73881M
SANYO: MFP10S
[LC73881M]
AC Electrical Characteristics at Ta = 25°C, VDD= 3 V, VSS= 0 V, f
OSC
= 4.194304 MHz
Note: 1. The dBm values are defined such that 0 dBm is the 1 mW power level for a 600 Ω load.
2. All 16 DTMF signals frequency
3. With a 40 ms DTMF signal period and a 40 ms pause period
4. Nominal DTMF signal frequencies
5. Low-group and high-group signal levels are the same.
6. DTMF signal frequency deviations within ±1.5% ± 2 Hz
7. Gaussian noise with a 0 to 3 kHz bandwidth
8. 350 and 440 Hz dial tone frequencies
9. Error rate of less than 1 error in 10,000 events
10.Referenced to the lowest component of the DTMF signal.
11.Twist =
Pin Assignment
High-frequency group tone level
Low-frequency group tone level
No. 5000-2/6
LC73881M
Parameter Symbol Conditions min typ max Unit
Input signal valid level — *1, 2, 3, 5, 6, 9 –45 –20 dBm
Positive twist accept — *2, 3, 6, 9, 11 ±10 dB
Frequency detection accept — *2, 3, 5, 9 ±1.5% ±2 Hz
Frequency rejection accept — *2, 3, 5 ±3.5 %
Third tone tolerance — *2, 3, 4, 5, 9, 10 –16 dB
Dial tone tolerance — *2, 3, 4, 5, 8, 9, 10 +22 dB
Noise tolerance — *2, 3, 4, 5, 7, 9, 10 –8 dB
Tone present detection time t
DP
See the timing chart. 3 20 ms
Tone absent detection time t
DA
See the timing chart. 0.5 20 ms
Tone duration accept t
REC
See the timing chart. 20 ms
Tone duration reject t
REC
See the timing chart. 45 ms
Inter-digit pause invalid time t
DO
See the timing chart. 20 ms
Inter-digit pause valid time t
ID
See the timing chart. 40 ms
Data shift speed — 1 MHz
Data output delay time t
PAD
See the ACK/SD timing chart 100 ns
Setup time delay t
DL
See the ACK/SD timing chart 4 µs
Data hold time t
DH
See the ACK/SD timing chart 30 ns
Oscillator frequency f
OSC
4.190109 4.194304 4.198498 MHz
Load capacitance C
XO
The OSCI and OSCO pins 30 pF
Pin Functions
Block Diagram
Test Circuit, Sample Application Circuit
No. 5000-3/6
LC73881M
Pin No. Symbol I/O Function
1 INPUT I The input must be capacitor coupled. This signal is biased to V
DD
/2 internally.
2 PD I The LC73881M goes to low power mode when this pin is set high.
3 OSCO O
Connect a 4.194304 MHz crystal oscillator or ceramic resonator to these pins to from an oscillator circuit.
4 OSCI I
When using a ceramic resonator, a capacitor of approximately 30 pF must be connected to each pin.
5 V
SS
Power supply pin. Normally 0 V.
6 SD O The decoded DTMF signal is output, this pin in a 4-bit LSB first format.
The ACK pin is used to shift out data from the SD pin. Four pulses are required to shift out the DTMF
7 ACK I character, which consists of four bits. The rising edge of the first pulse latches the data (before shifting)
into the shift register.
A high level indicates the presence of a DTMF signal. Although the rise of this signal is later than that of the
8 STD O
EST pin, it is less sensitive to burst waveforms and other noise.
9 EST O
A high level indicates the presence of a DTMF signal. Applications should monitor this pin and, after waiting
an appropriate period, apply four pulses to the ACK pin to access the data.
10 V
DD
Power supply pin. Normally 2.7 to 5.5 V.
Timing Chart
Normal State Timing Chart
When the DTMF signal (#n) is split due to, for example, the burst signal
When noise (#n+a) similar to a DTMF signal is input
No. 5000-4/6
LC73881M
When the data output is disrupted due to input clock displacement.
Data is output from the SD pin after 4 pulses are input to the ACK pin. However, note that if 5 or more pulses are input
between one rising edge on the EST pin and the next rising edge on the EST pin, the fifth and later pulses will be
ignored.
ACK/SD Timing Chart
Reset Timing at Power On
Filter Characteristics
No. 5000-5/6
LC73881M
> 1 µs
PS No. 5000-6/6
LC73881M
Output Code Table
DTMF Dialing Matrix
This catalog provides information as of June, 1998. Specifications and information herein are subject to change
without notice.
■ No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace
equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of
which may directly or indirectly cause injury, death or property loss.
■ Anyone purchasing any products described or contained herein for an above-mentioned use shall:
➀ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and
distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all
damages, cost and expenses associated with such use:
➁ Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on
SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees
jointly or severally.
■ Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for
volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied
regarding its use or any infringements of intellectual property rights or other rights of third parties.
F
L
F
H
Key b3 b2 b1 b0
697 1209 1 L L L H
697 1336 2 L L H L
697 1477 3 L L H H
770 1209 4 L H L L
770 1336 5 L H L H
770 1477 6 L H H L
852 1209 7 L H H H
852 1336 8 H L L L
852 1477 9 H L L H
941 1336 0 H L H L
941 1209 H L H H
941 1477 # H H L L
697 1633 A H H L H
770 1633 B H H H L
852 1633 C H H H H
941 1633 D L L L L
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