SANYO LC378000RP Datasheet

Overview
The LC378000RP is an 8-Mbit mask ROM that can be switched between byte mode, which provides an 8-bit × 1,048,576-word structure, and word mode, which provides a 16-bit × 524,288-word structure. Since this device operates over the wide supply voltage range of 2.6 to
5.5 V and achieves access times (tAA) of 100 ns (at VCC=
4.5 to 5.5 V) and 200 ns (at VCC= 2.6 to 5.5 V), it can be used in a wide range of systems, from 5-V systems requiring high-speed access to 3-V battery operated systems.
Features
• Supply voltage range: 2.6 to 5.5 V
• Access time (tAA):100 ns (VCC= 4.5 to 5.5 V) (tCA): 110 ns (VCC= 4.5 to 5.5 V)
200 ns (VCC= 2.6 to 5.5 V)
• Switchable between 8-bit and 16-bit data path widths
Byte mode: 1,048,576 words × 8 bits Word mode: 524,288 words × 16 bits
• Operating current drain: 90 mA (maximum)
• Standby current: 30 µA (maximum)
• Fully static operation (internal synchronization)
• Three-state outputs
• Package: 42-pin DIP (600 mil) plastic package
Package Dimensions
unit: mm
3014A-DIP42
CMOS IC
42098RM (OT) No. 5793-1/4
Preliminary
SANYO: DIP42
[LC378000RP]
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Internally Synchronized Silicon Gate 8M (1,048,576-
word × 8-bit, 524,288-word × 16-bit) Mask ROM
LC378000RP
Ordering number : EN*5793
Pin Assignment
No. 5793-2/4
LC378000RP
Block Diagram
Pin Functions
D15/A-1:In byte mode, this pin functions as
the A-1 address input, and in word mode, it functions as the D15 data output pin.
A0 to A19 Address inputs D0 to D15/A-1 Data outputs CE Chip enable input OE Output enable input BYTE Byte/word mode switching V
CC
Power
V
SS
Ground
Function Logic Table
Note: X: A high-level or low-level input
D8 to 14 are high impedance and D15 functions as the A-1 address input.
CE OE BYTE Output pin state Current drain
H X L High impedance Standby mode level L H L High impedance Operating mode level L L L DOUT × 8 (BYTE MODE)* Operating mode level H X H High impedance Standby mode level L H H High impedance Operating mode level L L H DOUT × 16 (WORD MODE) Operating mode level
Address buffer
Row decoder
Memory array
Column decoder
+ bias circuit
Sense amplifier
Byte/word output
switching circuit
Output buffer
A-1 buffer
CE buffer
BYTE buffer
OE buffer
Internal timing
generator
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