Sanyo LA3220 Specifications

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges,or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
Monolithic Linear IC
2-Channel Equalizer Amplifier with ALC
Ordering number:ENN912D
LA3220
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Features
• Dual pre-amp with built-in ALC (pre-amp × 2 + ALC ×
2).
• Due to high gain, recording amp can be formed sepa­rately (variable monitor possible).
• ALC and direct motor drive obtained through SEPP out­put stage.
• Good ALC response balance between channels.
• Good reduced voltage characteristic.
• Excellent channel separation.
• Quick stabilization during power supply input.
Specifications
Absolute Maximum Ratings at Ta = 25˚C
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erutarepmetegarotSgtsT 521+ot04–
tnerrucelbawolla.rTCLA 5.3Am
xam 41V
CC
Ta≤40˚C
Package Dimensions
unit:mm
3003A-DIP14
19.2
0.48
[LA3220]
1.2
14
1
1.98 2.54
8
6.4
7.62
0.25
7
3.0
3.65max
3.4
0.51min
SANYO : DIP14
˚C ˚C
Operating Conditions at Ta = 25˚C
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egatlovylppusrewopdednemmoceRV
ecnatsiserdaoLR
CC
L
Operating Characteristics at Ta = 25˚C, VCC=5V, f=1kHz, RL=10k (PB), Rg=680 (REC),
See specified Test Circuit.
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niagegatloVGV
egatlovtuptuomumixaMV
OCC
O
BP04Bd
CER85Bd
xamBP,%1=DHT9.02.1V
O
10700TH (KT)/40194HK/O137KI/8064KI, TS No.912–1/8
sgnitaR
nimpytxam
5.401Am 58Bd
Continued on next page.
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086nahtsselton
tinU
Continued from preceding page.
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htdiwCLAV
ecnalabCLAV
noitrotsidCLAV
Equivalent Circuit Block Diagram
LA3220
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nimpytxam
i
O
IN
k2.2=gR BP,zHk02otzH02=.F.P.B,0.10.2Vµ
i i i
BP,Bd0=0405Bd
CER,mBd06–=5354Bd CER,mBd02–=00.2Bd CER,mBd06–=5.00.2%
1203k
tinU
Test Circuit
No.912–2/8
LA3220
Test Procedure
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I
OCC
GV
O
GV1ffono1 ffoffoB,AVgol02=GV
VOxam1ffono1 ffoffoB VegatlovtuptuoerusaeM
DHT1ffono1 ffoffoB VtarotcafnoitrotsiderusaeM
pesHC
V
IN
htdiwCLA1ffoffo2noffoB
ecnalabCLA1ffoffo2noffoB
noitrotsidCLA1ffoffo2noffoB
2ffoffo1 ffoffo– .retemmadaeR 1noffo1 ffoffoB,A
S
S
1-1
2-1
21 12
2ffono1 ffonoC
ffono1 ffoffoB
Sample Application Circuit : Variable Moniter System
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noitacol
erudecorP
GVtaerusaeM
OV/I
Vegatlov
O
Vegatlov
I
.Bd3puseog
.deilppa
Vgol02=
O
Vtaegatlovtupni
VegatlovtuptuO
OV/I
I
)Bd(
O
.mBd0=
k2.2=gRnehwtnelaviuqe .
O
Vegatlovtupninehw2,1pma
.deilppasimB02–=IVegatlov
htiw)Bd(
Vtaegatlovtuptuo;
.
O
.%1=DHTta
.V5.0=
O
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niagzHk1niegatlovsiontuptuoniatbO
tupninehwmorfegneregatlovtupnI
VegatlovtuptuolitnumBd06–=
O
neewtebecnreffidlevel
I
simBd02–=
tupninehwrotcafnoitrotsiderusaeM
No.912–3/8
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