Sansui Micro-750-D Service Manual
MODEL
SERVICE MANUAL
MI
CAUTION : Before servicing this chassis, read the "PRODUCT SAFETY SERVICE FOR VIDEO PRODUCTS" section
on page 3 of this manual.
CRO 750D
DVD and CD
PLAYER
Under license form Digital Theater Systems, Inc.
CONTENTS
SERVICE PRECAUTIONS .........................2-3
BLOCK DIAGRAMS................................4-5
IC INTRODUCTION
PRINTED CIRCUIT ..............................22-28
REPLACEMENT PARTS LIST . ....................29-42
............................6-21
PRODUCT SAFETY SERVICING GUIDELINES FOR VIDEO PRODUCTS
CAUTION: DO NOT ATTEMPT TO MODIFY THIS PRODUCT IN ANY WAY AND
NEVER PERFORM CUSTOMIZED INSTALLATIONS WITHOUT
MANUFACTURER'S APPROVAL. UNAUTHORIZED MODIFICATIONS WILL NOT
ONLY VOID THE WARRANTY, BUT MAY LEAD TO YOUR BEING LIABLE FOR
ANY RESULTING PROPERTY DAMAGE OR USER INJURY.
SERVICE WORK SHOULD BE PERFORMED ONLY AFTER YOU ARE
THOROUGHLY FAMILIAR WITH ALL OF THE FOLLOWING SAFETY CHECKS
AND SERVICING GUIDELINES. TO DO OTHERWISE, INCREASES THE RISK OF
POTENTIAL HAZARDS AND INJURY TO THE USER.
WHILE SERVICING, USE AN ISOLATION TRANSFORMER FOR PROTECTION
FROM A.C. LINE SHOCK.
SAFETY CHECKS
AFTER THE ORIGINAL SERVICE PROBLEM HAS BEEN CORRECTED, A CHECK
SHOULD BE MADE OF THE FOLLOWING.
SUBJECT: FIRE & SHOCK HAZARD
1. BE SURE THAT ALL COMPONENTS ARE POSITIONED IN SUCH A WAY AS
TO AVOID POSSIBILITY OF ADJACENT COMPONENT SHORTS. THIS IS
ESPECIALLY IMPORTANT ON THOSE MODULES WITCH ARE
TRANSPORTED TO AND FROM THE REPAIRSHOP.
2. NEVER RELEASE A REPAIR UNLESS ALL PROTECTIVE DEVICES SUCH AS
INSULATORS, BARRIERS, COVERS, SHIELDS, STRAIN RELIEFS, POWER
SUPPLY CORDS, AND OTHER HARDWARE HAVE BEEN REINSTALLED PER
ORIGINAL DESIGN. BE SURE THAT THE SAFETY PURPOSE OF THE
POLARIZED LINE PLUG HAS NOT BEEN DEFEATED.
3. SOLDERING MUST BE INSPECTED TO DISCOVER POSSIBLE COLD
SOLDER JOINTS, SOLDER SPLASHES OR SHARP SOLDER POINTS. BE
CERTAIN TO REMOVE ALL LOOSE FOREIGN PARTICLES.
4. CHECK FOR PHYSICAL EVIDENCE DF DAMAGE OR DETERIORATION TO
PARTS AND COMPONENTS, FOR FRAYED LEADS AND DAMAGED
INSULATION (INCLUDING A.C. CORD), AND REPLACE IF NECESSARY
FOLLOW ORIGINAL LAYOUT, LEAD LENGTH AND DRESS.
5. NO LEAD OR COMPONENT SHOULD TOUCH A RECEIVING TUBE OR A
RESISTOR RATED AT 1 WATT OR MORE. LEAD TENSION AROUND
PROTRUDING METALSURFACES MUST BE AVOIDED.
6. ALL CRITICAL COMPONENTS SUCH AS FUSES. FLAMEPROOF RESISTORS,
CAPACITORS, ETC. MUST BE REPLACED WITH EXACT FACTORY TYPES,
DO NOT USE REPLACEMENT COMPONENTS OTHER THAN THOSE
SPECIFIED OR MAKE UNRECOMMENDED CIRCUIT MODIFICATIONS.
7. AFTER RE-ASSEMBLY OF THE SET, ALWAYS PERFORM AN A.C. LEAKAGE
TEST ON ALL EXPOSED METALLIC PARTS OF THE CABINET, (THE
CHANNEL SELECTOR KNOB, ANTENNA TERMINALS. HANDLE AND
SCREWS) TO BE SURE THE SET IS SAFE TO OPERATE WITHOUT DANGER
OF ELECTRICAL SHOCK. DO NOT USE A LINE ISOLATION TRANSFORMER
DURING THIS TEST, MAKE SURE TO USE AN A.C. VOLTMETER. HAVING
5000 OHMS PER VOLT OR MORE SENSITIVITY, IN THE FOLLOWING
MANNER; CONNECT A 1500 OHMS 10 WATT RESISTOR, PARALLELED BY
A.15 MFD. 150V A.C. TYPE CAPACITOR BETWEEN A KNOWN GOOD EARTH
GROUND (WATER PIPE, CONDUIT, ETC.) AND THE EXPOSED METALLIC
PARTS, ONE AT A TIME. MEASURE THE A.C. VOLTAGE ACROSS THE
COMBINATION OF 1500 OHM RESISTOR AND 15 MFD CAPACITOR.
REVERSE THE A.C. PLUG AND REPEAT A.C. ANY VOLTAGE
MEASUREMENTS FOR EACH EXPOSED METALLIC PART. VOLTAGE
MEASURED MUST NOT EXCEED 75 VOLTS R.M.S. THIS CORRESPONDS
TO 0.5 MILLIAMP A.C. ANY VALUE EXCEEDING THIS LIMIT CONSTITUTES A
POTENTIAL SHOCK HAZARD AND MUST BE CORRECTED IMMEDIATELY.
GOOD EARTH GROUND
SUCH AS THE WATER
PIPE, CONDUIT, ETC.
PLACE THIS PROBE
ON EACH EXPOSED
METAL PART
SUBJECT GRAPHIC SYMBOLS
THE LIGHTNING FLASH WITH APROWHEAD SYMBOL. WITHIN AN
EQUILATERAL TRIANGLE, IS INTENDED TO ALERT THE SERVICE
PERSONNEL TO THE PRESENCE OF UNINSULATED "DANGEROUS
VOLTAGE" THAT MAY BE OF SUFFICIENT MAGNITUDE TO
CONSTITUTE A RISK OF ELECTRIC SHOCK.
THE EXCLAMATION POINT WITHIN AN EQUILATERAL TRIANGLE IS
INTENDED TO ALERT THE SERVICE PERSONNEL TO THE
PRESENCE OF IMPORTANT SAFETY INFORMATION IN SERVICE
LITERATURE.
SUBJECT: X-RADIATION
1. BE SURE PROCEDURES AND INSTRUCTIONS TO ALL SERVICE PERSONNEL
COVER THE SUBJECT OF
X-RAYS IN CURRENT T.V. RECEIVERS IS THE PICTURE TUBE. HOWEVER,
THIS TUBE DOES NOT EMIT X-RYS WHEN THE HIGH VOLTAGE IS AT THE
FACTORY SPECIFIED LEVEL. THE PROPER VALUE IS GIVEN IN THE
APPLICABLE SCHEMATIC. OPERATION AT HIGHER VOLTAGES MAYCAUSE A
FAILURE OF THE PICTURE TUBE OR HIGH VOLTAGE SUPPLY AND, UNDER
CERTAIN CIRCUMSTANCES, MAY PRODUCE RADIATION IN EXCESS OF
DESIRABLE LEVELS.
2. ONLY FACTORY SPECIFIED C.R.T ANODE CONNECTORS MUST BE USED.
DEGAUSSING SHIELDS ALSO SERVE AS AN X-RAY SHIELD IN COLOR SETS,
ALWAYS RE-INSTALL THEM.
3. IT IS ESSENTIAL THAT SERVICE PERSONNEL HAVE AVAILABLE AN
ACCURATE AND RELIABLE HIGH VOLTAGE METER. THE CALIBRATION OF
THE METER SHOULD BE CHECKED PERIODICALLY AGAINST A
REFERENCE STANDARD, SUCH AS THE ONE AVAILABLE AT YOUR
DISTRIBUTOR.
4. WHEN THE HIGH VOLTAGE CIRCUITRY IS OPERATING PROPERLY, THERE IS
NO POSSIBILITY OF AN
CHASSIS IS SERVICED, THE BRIGHTNESS SHOULD BE RUN UP AND DOWN
WHILE MONITORING THE HIGH VOLTAGE WITH A METER TO BE CERTAIN
THAT THE HIGH VOLTAGE DOES NOT EXCEED THE SPECIFIED VALUE AND
THAT IT IS REGULATING CORRECTLY. WE SUGGEST THAT YOU AND YOUR
SERVICE ORGANIZATION REVIEW TEST PROCEDURES SO THAT VOLTAGE
REGULATION IS ALWAYS CHECKED AS A STANDARD SERVICING
PROCEDURE AND THAT THE HIGH VOLTAGE READING BE RECORDED ON
EACH CUSTOMER'S INVOICE.
5. WHEN TROUBLESHOOTING AND MAKING TEST MEASUREMENTS IN A
PRODUCT WITH A PROBLEM OF EXCESSIVE HIGH VOLTAGE AVOID BEING
UNNECESSARILY CLOSE TO THE PICTURE TUBE AND THE HIGH VOLTAGE
SUPPLY DO NOT OPERATE THE PRODUCT LONGER THAN IT IS NECESSARY
TO LOCATETHE CAUSE OF EXCESSIVE VOLTAGE.
6. REFER TO HV. B+ AND SHUTDOWN ADJUSTMENT PROCEDURES
DESCRIBED IN THE APPROPRIATE SCHEMATIC AND DIAGRAMS(WHERE
USED).
X-RADIATION. THE ONLY POTENTIAL SOURCE OF
X-RADIATION PROBLEM. EVERY TIME A COLOR
SUBJECT: IMPLOSION
1. ALL DIRECT VIEWED PICTURE TUBES ARE EQUIPPED WITH AN INTEGRAL
IMPLOSION PROTECTION SYSTEM, BUT CARE SHOULD BE TAKEN TO
AVOID DAMAGE DURING INSTALLATION, AVOID SCRATCHING THE TUBE. IF
SCRATCHED REPLACE IT.
2. USE ONLY RECOMMENDED FACTORYREPLACEMENT TUBES.
SUBJECT: TIPS ON PROPER INSTALLATION
1. NEVER INSTALL ANY PRODUCT IN A CLOSED-IN RECESS. CUBBYHOLE OR
CLOSELY FITTING SHELF SPACE, OVER OR CLOSE TO HEAT DUCT, OR IN
THE PATH OF HEATEDAIR FLOW.
2. AVOID CONDITIONS OF HIGH HUMIDITY SUCH AS: OUTDOOR PATIO
INSTALLATIONS WHERE DEW IS A FACTOR, NEAR STEAM RADIATORS
WHERE STEAM LEAKAGE IS A FACTOR, ETC.
3. AVOID PLACEMENT WHERE DRAPERIES MAY OBSTRUCT REAR VENTING.
THE CUSTOMER SHOULD ALSO AVOID THE USE OF DECORATIVE
SCARVES OR OTHER COVERINGS WHICH MIGHT OBSTRUCT VENTILATION.
4. WALL AND SHELF MOUNTED INSTALLATIONS USING A COMMERCIAL
MOUNTING KIT, MUST FOLLOW THE FACTORY APPROVED MOUNTING
INSTRUCTIONS. A PRODUCT MOUNTED TO A SHELF OR PLATFORM MUST
RETAIN ITS ORIGINAL FEET (OR THE EQUIVALENTTHICKNESS IN SPACERS)
TO PROVIDE ADEQUATE AIR FLOW ACROSS THE BOTTOM. BOLTS OR
SCREWS USED FOR FASTENERS MUST NOT TOUCH ANY PARTS OR
WIRING. PERFORM LEAKAGE TEST ON CUSTOMIZED INSTALLATIONS.
5. CAUTION CUSTOMERS AGAINST THE MOUNTING OF A PRODUCT ON
SLOPING SHELF OR A TILTED POSITION, UNLESS THE PRODUCT IS
PROPERLY SECURED.
6. A PRODUCT ON A ROLL-ABOUT CART SHOULD BE STABLE ON ITS
MOUNTING TO THE CART CAUTION THE CUSTOMER ON THE HAZARDS OF
TRYING TO ROLL A CART WITH SMALL CASTERS ACROSS THRESHOLDS
OR DEEP PILE CARPETS.
7. CAUTION CUSTOMERS AGAINST THE USE OF A CART OR STAND WHICH
HAS NOT BEEN LISTED BY UNDERWRITERS LABORATORIES, INC. FOR USE
WITH THEIR SPECIFIC MODEL OF TELEVISION RECEIVER OR
GENERICALLY APPROVED FOR USE WITH TV'S OF THE SAME OR LARGER
SCREEN SIZE.
8. CAUTION CUSTOMERS AGAINST THE USE OF EXTENSION CORDS. EXPLAIN
THAT A FOREST OF EXTENSIONS SPROUTING FROM A SINGLE OUTLET
CAN LEAD TO DISASTROUS CONSEQUENCES TO HOME AND FAMILY.
2
SERVICING PRECAUTIONS
CAUTION : Before servicing the DVD covered by this
service data and its supplements and ADDENDUMS, read
and follow the : if
unforeseen circumstances create conflict between the
following servicing precautions and any of the safety
precautions in this publications, always follow the safety
precautions.
Remember Safety First:
SAFETY PRECAUTIONS NOTE
General Servicing Precautions
1. Always unplug the DVD AC power cord from the AC
power source before:
(1) Removing or reinstalling any component, circuit board,
module, or any other assembly.
(2) Disconnection or reconnecting any internal electrical
plug or other electrical connection.
(3) Connecting a test substitute in parallel with an
electrolytic capacitor
Caution :
polarity installation of electrolytic capacitors may
result in an explosion hazard.
A wrong part substitution or incorrect
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid state) devices can be damaged
easily by static electricity. Such components commonly are
called Electrostatically Sensitive (ES) Devices. Examples of
typical ES devices are integrated circuits and some field
effect transistors and semiconductor chip components.
The following techniques should be used to help reduce the
incidence of component damage caused by static electricity.
1. Immediately before handling any semiconductor
component or semiconductor-equipped assembly, drain
off any electrostatic charge on your body by touching a
known earth ground. Alternatively, obtain and wear a
commercially available discharging wrist strap device,
which should be removed for potential shock reasons
prior to applying power to the unit under test.
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface
such as aluminum toil, to prevent electrostatic charge
buildup or exposure of the assembly.
2. Do not spray chemicals on or near this DVD or any of its
assemblies.
3. Unless specified otherwise in this service data, clean
electrical contacts by applying an appropriate contact
cleaning solution to the contacts with a pipe cleaner,
cotton-tipped swab, or comparable soft applicator.
Unless specified otherwise in this service data,
lubrication of contacts is not required.
4. Do not defeat any plug/socket B+ voltage interlocks with
witch instruments covered by this service manual might
be equipped.
5. Do not apply AC power to this DVD and/or any of its
electrical assemblies unless all solid-state device heat
sinks are correctly installed.
3. Use only a GROUNDED-tip soldering iron to solder or
unsolder ES devices.
4. Use only an anti-static solder removal device. Some
solder removal devices not classified a "anti-static" can
generate electrical charges sufficient to damage ES
devices.
5. Do not use freon-propelled chemicals. These can
generate electrical charge sufficient to damage ES
devices.
6. Do not remove a replacement ES device from its
protective package until immediately before you are
ready to install it. (Most replacement ES devices are
packaged with leads electrically shorted together by
conductive foam, aluminum foil, or comparable
conductive material.)
6. Always connect test instrument ground lead to the
appropriate ground before connection the test
instrument positive lead. Always remove the test
instrument ground lead last.
Insulation Checking Procedure
Disconnect the attachment plug trom the AC outlet and turn
the power on. Connect an insulation resistance meter(500V)
to the blades of the attachment plug. The insulation
resistance between each blade of the attachment plug and
accessible conductive parts (Note 1) should be more than
1M ohm.
Note 1 :
panels, input terminals, Earphone jacks, etc.
Accessible Conductive Parts including Metal
7. Immediately before removing the protective material
from the leads of a replacement ES device, touch the
protective material to the chassis or circuit assembly
into which the device will be installed.
Caution : Be sure no power is applied to the chassis or
circuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Normally harmless motion
such as the brushing together of your clothes fabric or the
lifting of your foot from a carpeted floor can generate
static electricity sufficient to damage an ES device.)
3
4
FM+AM
TFCE1E
115
1
125
A750 KEY ASS'Y
14
11
14
A750 MIC
ASS'Y
XP3
1
25
2
XP2
115
XP10
110
A750 AMP ASS'Y
XP13
125
3
1
1
DSM750
6
DECODER
1
ASS'Y
1
6
25
24
112
XP5
1
12
1
12
7
XP1
1
110
XP404
12
6
XP402
1
AD750
PO WER
ASS'Y
12
XP403
1
4
12
14
8
10
13
12
5
9
124
KHL-232B
1
LOADING
6
ASS'Y
5
IC INTRODUCTION
D1890 PIN ASSIGNMENTS
Pin Num bers PIN NAME Type Description
QFP100 and LQ FP100
RF Flag Interface
13 DEFECT Digital Output Flag of bad data output status
RF SIO interface
14 SLCK Digital Input RF serial clock input
15 SDEN Digital Input RF serial data enable
16 SDATA Digital IO RF serial data IO
11 RST Digital input Reset (active high)
12 XCK16M Digital input 16.9M Hz for verification
RF
40 DVDA Analog input DVD RF signal input A
41 DVDB Analog Input DVD RF signal input B
42 DVDC Analog Input DVD RF signal input C
43 DVDD Analog Input DVD RF signal input D
38 DVDRFIN Analog Input DVD RF signal input RFIN
39 DVDRFIP A nalog Input DVD RF s ignal input RFIP
53 CDA Analog Input CD RF signal input A
54 CDB Analog Input CD RF signal input B
55 CDC Analog Input CD RF signal input C
56 CDD Analog Input CD RF signal input D
61 OSP Analog O ffset c ancellation capacitor connecting
60 OSN Analog Offset cancellation capacitor c onnecting
86 RFOP Analog output RF positive output
85 RFON Analog output RF negative output
59 RFGC Analog RF VGA control
TRACKING ERROR
88 DPFN Analog DPD amplifier negative input
87 DPFO Analog DPD amplifier output
23 IR Analog DPD reference resister connec ting
17 DPDMUTE Digital input DPD m ute control input
83 TNI Analog Input 3 beam satellite PD signal input
82 TPI A nalog Input 3 beam satellite PD signal input
97 TEO A nalog O utput Tracking error output
FOCUSING ERROR & RF LEVEL & CENTRAL SERVO SIGNAL
64 CDFNI Analog Input CD focus ing error negative input
65 CDFPI A nalog Input CD focusing error pos itive input
44 DVDFNI Analog input DVD foc using error negative input
45 DVDFPI A nalog input DVD focusing error positive input
95 FEO A nalog O utput Focusing error output
96 FEONI Analog Input Focusing error am plifier negative input
93 FLVL Analog Output RF level output
6
Pin Num bers PIN NAME Type Description
94 FLVLNI Analog input RF level amplifier negative input
69 CDCSNI Analog input CD central servo signal negative input
70 CDCSPI A nalog input CD central s ervo signal pos itive input
46 DVDCSNI Analog input DVD central servo signal negative input
47 DVDCSPI Analog input DVD central servo signal positive input
2 CSO Analog output Central servo signal output
3 CSONI Analog input Central servo am plifier negative input
ALPC
80 MDI1 Analog Input Laser power monitor input
81 LDO1 Analog Output Laser driver output
51 MDI2 Analog Input Laser power monitor input
52 LDO2 Analog Output Laser driver output
RF RIPPLE
8 CRTP Analog RF top envelop filter capacitor connecting
9 CRTPLP Analog Defect level filter capac itor c onnecting
7 HRFRP Analog output High frequency RF ripple output
6 LRFRP Analog output Low frequency RF ripple output
POWER
24,25,30,34,62,63 AVDD Power RF pow er
21,22,28,37,57,58 AGND GND GND
89,90 SVDD Power Servo analog pow er
98,99 SGND GND GND
4,5 VDD Power Digital power
18,19 GND GND GND
REFERENCE VOLTAGE
92 VREFO Analog output Reference voltage 2.0V
91 V2REFO Analog output Reference voltage 4.0V
ALPC TRIMMING
32 TM1 Analog input Trimming pin for ALPC1
33 TM2 Analog input Trimming pin for ALPC1
35 TM3 Analog input Trimming pin for ALPC2
36 TM4 Analog input Trimming pin for ALPC2
HIGH SPEED TRACK COUNTING
1 TRLP Analog Low-pass filter capacitor connecting
100 TRLPA Analog Low-pass filter capacitor connec ting
10 HTRC Digital output High s peed track c ounting digital output
FOR MONITOR ONLY
26 MON Analog output
27 MOP A nalog output
31 VCON Analog output
20 HTRCMPH Digital output
84 HTE Analog output
7
D1890 BLOCK DIAGRAM
8
D1870 PIN ASSIGNMENTS
Pin Numbers Pin NAME Type Description
RG data PLL interface
11 PLLVDD Power Power for data PLL and related analog circuitry.
10 JITFN Analog Input The negative input terminal of operation amplifier for RF jitter m eter.
9 JITFO Analog O utput The output terminal of RF jitter meter.
Phase com parator output. Output the phase difference of EFM and Pck4m.
8 PDO Analog Output
7 IREF Analog Input
6 LPFN Analog Input The negative input terminal of loop filter amplifier.
5 LPFO Analog Output The output of loop filter am plifier.
4 LPIN Analog Input The input of the low pass filter.
3 LPIO Analog Output The output of the low pass filter.
2 PLLVSS Ground G round pin for data PLL and related analog circuitry.
1 VBDPLL Analog O utput Reference voltage.
176 RFIN Analog Input The negative input term inal of RF differential signal.
175 RFIP Analog Input The positive input terminal of RF differential signal.
174 RFDSLV Analog O utput RF data slicer level output.
173 SCO Analog Output Analog slicer current output.
Signal Amplifier Interface
172 ADCVDD Power Power pin for ADC circuitry.
171 HRFZC Analog Input High frequency RF ripple zero crossing input or photo interrupt pulse input.
170 RFRPSLV Analog Output RF ripple slice level output.
169 RFP Analog Input RF ripple detect input.
168 RFLEVEL Analog Input Sub beam add input or RF level input.
167 FEI Analog Input Focus error input.
166 TEI Analog Input Tracking error input.
165 TEZU Analog Input Tracking error zero crossing input.
164 TEZISLV Analog Input Tracking error zero crossing low pass input.
163 ADIN Analog Input General A/D input.
162 ADCVSS Ground G round pin for ADC circuitry.
Motor and Actuator Drive Interface
161 PDMVSS Ground Ground for PDM Circuitry.
160 PW M2VREF Analog Input A reference voltage input for PW M circuitry. The typical value is 4.0V.
159 PW MVREF Analog Input A reference voltage input for PWM circuitry. The typical value is 2.0V.
158 PDMVDD Power Power for PDM circuitry.
12 FOO Analog Output Focus servo output. PDM output of focus servo compensator.
13 TRO Analog Output Tracking servo output. PDM output of tracking servo com pensator.
14 PWMO UT1 Analog O utput
15 PWMO UT2 Analog O utput
17 DMO Analog O utput Disk motor control output. PW M output.
18 FMO Analog Output
19
20 FG
22 TRCLOSE TTL Output
23 ENDM TTL Output Enable/disable disk motor. A logical high enables disk m otor.
Panel Interface
FROPENPW
M
Analog Output
TTL Schmitt
Input 50K pull up
Sink or source a constant current to loop filter over this pin when phase
difference occurs. Otherwise, this pin is high impedance.
Current reference input. It generates reference current for data PLL.
Connect an external 15K resistor to this pin and PLLVSS.
1 st Gen eral multi- level PW M output. The num ber of output levels is set
with DSP com m and. It is used to control step m otor.
2 nd G eneral multi-level PWM output. The number of output level is
selected DSP com mand.
Disk motor co ntrol. 3-level PWM output. It is u sed only for DC mot or, but it
is corporate with the pin PWMOUT1 to control step motor. If the internal
DC_FMO is pos itive, the FMO output lag s 90
the FMO output leads 90
Tray open control output.
It generates PWM output for TRWM EN
TRWMEN
Motor Hall sensor input.
Tray close output.
It provides a clock out to the m icro controller.
27hRW 2
=0.
than PW MO UT1.
than PWMOUT1, otherwise
=0 or digital output for
27hRW2
9
Pin Numbers Pin NAME Type Description
24 LED TTL O utput LED control output.
25 PLY#/PAU#
26 EJ/STOP#
27 LIMIT#
28 TRAYO UT#
29 TRAYIN#
Micro controller Interface
30 URST TTL Output
31 UWR#
32 URD#
33 UCS1
34 UCS2
36 UALE
37-43,46 UAD
47 UINT#
Crystal Interface & DRAM clock Interface
44 DMVSS G round Ground pin for DRAM clock circuitry.
45 DMVDD Power Power pin for DRAM clock circuitry.
48 XTALI Input Crystal input. The working frequency in 33.8688MHz.
49 XTALO O utput Crystal output.
Memory Interface
50 DQM TTL O utput
51 BA1 TTL Output
52 BA0 TTL Output
53 CKE TTL Output
54 CLK TTL O utput SDRAM clock
55-56 RA[11:10] TTL Output
58-64,66-6
7,69
70 RAS# TTL Output RAM row address strobe, low active
71 ROE# TTL Output
RA[9:0] TTL Output RAM address bus
TTL Input
50K pull up
TTL Input
50K pull up
TTL Input
50K pull up
TTL Input
50K pull up
TTL Input
50K pull up
TTL Schmitt
Input 50K pull up
TTL Schmitt
Input 50K pull up
TTL I/O
50K pull up
TTL I/O
50K pull up
TTL I/O
with Schmitt
Input
50K pull up
TTL I/O
50K pull up
TTL Output
Open drain
Play/pause key input, active low.
Eject, stop key input, active low.
Sledge inner lim it input, active low.
Tray_is_out input. A logical low indicates the tray is out. Feedback flag
from tray connector.
Tray_is_in input. A logical low indicates the tray is in. Feedback flag from
tray connector.
Power-on reset output for external devices, active high.
If the flash m ode is used, the micro controller must be the kind of
multiplexed address/data m ode and its output pins m ust be at tri-state.
Otherwise, the flash mode cannot be used.
Micro controller write strobe, active low.
Micro controller read strobe, active low.
For non flash mode cycle: register bank select control 1, input from m icro
controller.
For flash mode cycle: flash ROM address FLASH_ADR14.
For non flash mode cycle: register bank select control 2, input from m icro
controller.
For flash mode cycle: flash ROM address FLASH_ADR15.
For non flash m ode cycle: address latch enable, high active input from
micro controller.
For flash mode cycle: address latch enable, high active output to control
external 373.
For non flash mode cycle: micro control address/data Bus.
For flash mode cycle: flash ROM address/data bus.
FLASH_ADR[7:0]/FLASH_D[7:0]. The FLASH_ADR[7:0] is latched in the
external 373.
Micro controller Interrupt, low active.
For non flash mode: SDRAM output Mask.
For flash mode: flash ROM address FLASH_ADR13.
For non flash mode: SDRAM bank address 1
For flash mode: flash ROM address FLASH_ADR12.
For non flash mode: SDRAM bank address 0
For flash mode: flash ROM address FLASH_ADR11.
For non flash mode: SDRAM clock enable.
For flash mode: flash ROM address FLASH_ADR10.
For non flash mode: DRAM address bus RA[11:10]
For flash mode: flash ROM address FLASH_ADR[9:8]
RAM output enable, low active.
It must be pulled with 20K resister if flash mode is used.
10
Pin Numbers Pin NAME Type Description
72 RWE# TTL Output
73
74 CAS# TTL O utput
76-83,
85-87
90-94
System Clock Interface
88 IPLLVDD Power Power pin for system varipitch circuitry.
89 IPLLVSS Ground Ground pin for system varipitch circuitry.
Host Interface
101 DASP#
102 CS3FX#
103 CS1FX#
105,108,10
6
107 PDIAG #
110 IOCS16#
CASH#/RWE
H#
RD[15:0] TTL I/O RAM data bus
HA[2:0]
TTL Output
TTL I/O
50K pull up
TTL Input
50K pull up
TTL Input
50K pull up
TTL Input
50K pull up
TTL I/O
50K pull up
TTL Output
Open drain
RAM write enable, low active. When two write enable pins are used, it only
for low byte.
High column address strobe: Write enable High Byte
Multi-function pin: low active
RAM column address strobe for high byte, when two column address
strobe pins are used.
Write enable for high byte, when two write enable pins are used.
World RAM column address strobe: Low column address strobe
Multi-function pin: low active
RAM column address strobe for a word, when two column address strobe
pins are not used.
It is used only for low byte, when two column address strobe pins are used.
Drive active/Slave present
This is the time-multiplexed signal that indicates that a device is active, or
that slave is present.
Host chip select 2(for 3FXH/37xh)
The CX3FX# and CS1FX# are chip select signals from the host used to
select the Com mand Block registers.
Host chip select 1 (for 1Fxh/17xh)
Host address bus
This is the 3-bit binary coded address asserted by the host to access a
register or data port in the device.
Passed diagnostics
I/O 16-bit chip select
111 INTRQ TTL Output
112 DMACK#
113 IORDY TTL O utput
114 DI O R#
TTL Input
50K pull up
TTL Input
50K pull up
Host interrupt.
The MT1368 uses this signal to interrupt the host system.
DMA acknowledge.
This signal shall be used by the host in response to DMAREQ to initiate
DMA transfers.
I/O channel ready: Ultra DMA ready: Ultra DMA data strobe.
This is a multi-function pin.
For i/o channel Ready, this signal is negated to extend the host transfer
cycle of any register read or write when the device is not able to complete
the transfer.
For Ultra DMA Ready, this signal is asserted by the device to indicate to the
host that the device is ready to receive Ultra DMA data out bursts from the
host.
For Ultra DMA data strobe, this is the data in strobe signal from device for
Ultra DMA data in burst to host.
Device I/O read: Ultra DMA ready: Ultra DMA data strobe.
This is multi-function pin.
For Device I/O Read, this signal is the strobe signal asserted by the host to
read device registers or the data port.
For Ultra DMA read, this is asserted by the host to indicate to the device
that the host is ready to receive Ultra DMA data in burst to host
For Ultra DMA data strobe, this signal is the data out strobe signal from the
host for an Ultra DMA data out burst.
11
Pin Numbers Pin NAME Type Description
Device I/O write: Stop Ultra DMA burst
This is multi-function pin.
For Device I/O Write, this signal is the strobe signal asserted by the host to
write device registers or the data port.
116 DI O W #
TTL Schmitt
Input 50K pull up
For Stop Ultra DMA, this signal shall be negated by host before data is
transferred in an Ultra DMA burst and is asserted by host during an Ultra
DMA burst to signal the termination of Ultra DMA burst.
DMA request.
117 DMARQ TTL Output
This signal is used for DMA data transfers between host and device and it
shall be asserted by the MT1368 when it is ready to transfer data to or from
the host. The direction of data transfer is controlled by DIOR# and DIOW #.
118-120,12
2-126,-128-
131,134-13
HD[15:0] TTL I/O
7
138 HRST#
TTL Schmitt
Input 50K pull up
Host data bus.
This is an 8- or 16- bit bi-directional data interface between the host and
device; the lower 8 bits are used for 8-bit register transfers. Data transfers
are 16-bit wide.
Host reset.
This signal is referred to as hardware reset and it is used by host to reset
the MT1368.
CLV/CAV Varipitch interface
140 VPVDD Power Power pin for varipitch VCO circuitry.
141 VCO CIN Analog Input Connect capacitor for com pensator loop filter.
142 VPVSS Ground Ground pin for varipitch VCO circuitry.
Miscellaneous
139 PRST#
TTL Schmitt
Power-on reset, low active
Input 50K pull up
143 TEST
TTL Input
Test mode control pin, high active
50K Pull-Down
Lag and Programmable I/O Interface
145 FLAG D TTL I/O Servo DSP flag.
146 FLAG C TTL I/O Servo DSP flag.
147 FLAG B TTL I/O Servo DSP flag.
Servo DSP flag. The internal flags of servo DSP can be selected to output
148 FLAG A TTL I/O
through FLAGA, FLAGB, FLAGC, and FLAGD pins. To program the
selection the micro controller m ust write FLGMO D register.
150 IO 3
151 IO 2
TTL I/O
50K pull high
TTL I/O
50K pull high
152 IO 1 TTL I/O
153 IO 0
TTL I/O
50K pull high
At non-flash mode: program mable I/O or internal non-servo flags output.
At flash m ode cycle: to monitor DSVSEL to device master or slaver. It is
recorded on DEVSEL
At non-flash mode cycle: programmable I/O or internal non-servo flags output.
At flash mode cycle: flash ROM address FLASH_ADR16.
At non-flash mode cycle: programmable I/O or internal non-servo flags output.
At flash mode cycle: flash RO M output enable FLASH _O E#.
At non-flash mode cycle: programmable I/O or internal non-servo flags output.
At flash mode cycle: flash RO M write enable FLASH_W R#.
102hRW 6
.
SIO interface & Defect
154 SDATA TTL I/O RF serial data input/output.
155 SDEN TTL output RF serial data latch enable
156 SLCK TTL output RF serial clock output
157 BDO
TTL Input
Flag of defect data input status
50K pull down
Digital Power & Ground
57,75,104,1
DVDD3 Power +3.3V use for Internal digital circuitry and digital output pad
44
16,65,109,
DVDD Power +5V use for Internal digital circuitry and digital output pad
133,100
21,35,68,8
4,115,121,1
27,133,149
DVSS Ground Internal digital circuitry and digital output pad.
96
12
D1870 BLOCK DIAGRAM
RFRPSLV
TEZI
TEZISLV
HRFZC
ADCVDD
FEI
TEI
RFRP
RFLEVEL
ADIN
ADCVSS
SLCK
SDEN
SD ATA
FDO
TRO
FMO
PWMOUT1
PWMOUT2
PDMVDD
PWM2VREF
PWMVREF
PDWVSS
FLAGA
FLAGB
FLAGC
FLAGD
IO[3:0]
RFZC/
TEZC
Circuit
Servo
ADC
Serial RF
Controller
PDM &
PWM
DAC
Flags &
Program-
mable
I/O
BDO
RF flag
Interface
Servo
DSP
Varipitch
CLV Clock
Generator
VPVDD
VCOC N
RFDTSL
VPVSS
SCO
Data
Slicer
RF N
RF P
REF
PLLVDD
LPFN
Protection
EFM/EFM+
Demodulator
Subcode/ID
Demodulator
CLV/CAV
Controller
ENDM
LP N
Sync
FG
PLLVSS
Data
PLL
J TFN
PWM
DAC
PDO
DMO
LPFO
LP P
VBDPLL
J TFO
CIRC/RSPC
Error Corrector
CDROM
Sync Detection
Descrambler
CSS
Host/MPEG Interface
HRST#
DASP#
PD AG#
HD[15 0]
Host
Data
FIFO
D OW#
D OR#
DMACK#
HA[2 0]
CS1FX#
C3
Decoder
ATAPI
Packet
FIFO
CX3FX#
Varipitch System
NTRQ
ORDY
DMARQ
OCS16#
XTALO
XTAL
Clock
Generator
System Clock
Micro-controller
Interface
UALE
UCS1
UCS2
URD#
PLLVDD
SRAM
UWR#
PLLVSS
256
U NT#
DMVDD
DRAM
Clock
Generator
UAD[7 0]
DMVSS
Memory
Controller
Key/LED
Interface
Interface
Reset
Logic
Buffer
Mega
URST#
TEST
PRST#
RD[15:0]
RA[11:0]
RAS#
CAS#
CASH#/RWEH#
RWE#
ROE#
CLK
CKE
DOM
BA(1:0)
EJ/STOP#
PLY#/PAU#
LED
TRAYIN#
TRAYOUT#
LIMIT#
TROPENPWM
TRCLOSE
13
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