This Service Manual is a property of Samsung Electronics Co.,Ltd.
Any unauthorized use of Manual can be punished under applicable
International and/or domestic law.
ⓒ
Samsung Electronics Co.,Ltd. Nov. 2004
Samsung Electronics Co.,Ltd. Nov. 2004
Printed in South Korea.
Printed in South Korea.
Code No.:
BASIC.
GH68-05795A
1. SGH-Z110V Specification
1. GSM General Specification
GSM900
Phase 1
Freq. Band[MHz]
Uplink/Downlink
ARFCN range1~124
Tx/Rx spacing45MHz45MHz95MHz
Mod. Bit rate/
Bit Period
Time Slot
Period/Frame
Period
Modulation0.3GMSK0.3GMSK0.3GMSK
MS Power33dBm~13dBm33dBm~5dBm30dBm~0dBm
890~915
935~960
270.833kbps
3.692us
576.9us
4.615ms
EGSM 900
Phase 2
880~915
925~960
0~124 &
975~1023
270.833kbps
3.692us
576.9us
4.615ms
DCS1800
Phase 1
1710~1785
1805~1880
512~885
270.833kbps
3.692us
576.9us
4.615ms
Power Class5pcl ~ 15pcl5pcl ~ 19pcl0pcl ~ 15pcl
Sensitivity-102dBm-102dBm-100dBm
TDMA Mux888
Cell Radius35Km35Km2Km
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Specification
2. GSM TX power class
TX Pow er
control level
533±2 dBm
631±2 dBm
729±2 dBm
827±2 dBm
925±2 dBm
1023±2 dBm
1121±2 dBm
GSM900
TX Pow er
DCS1800
control level
030±3 dBm
128±3 dBm
226±3 dBm
324±3 dBm
422±3 dBm
520±3 dBm
618±3 dBm
1219±2 dBm
1317±2 dBm
1415±2 dBm
1513±2 dBm
1611±3 dBm
179±3dBm
187±3 dBm
195±3 dBm
716±3 dBm
814±3 dBm
912±4 dBm
1010±4 dBm
118±4dBm
126±4 dBm
134±4 dBm
142±5 dBm
150±5 dBm
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2. SGH-Z110V Circuit Description
1. SGH-Z110V RF Circuit Description
1. Antenna Switch Module (U100)
The antenna switch module allows multiple operating bands and modes to share the same antenna. A common
antenna connects to one of five paths: 1) UMTS-2100 Rx/Tx, 2) EGSM-900 Rx, 3) EGSM-900 Tx, 4) DCS-1800 Rx,
and 5) DCS-1800 Tx. UMTS operation requires simultaneous reception and transmission.
2. Filter
To convert Electromagnetic Field Wave to Acoustic Wave and then pass the specific frequency band.
- GSM Rx FILTER (F100)→For filtering the frequency band between 925 ~ 960 MHz.
- DCS Rx FILTER (F101)→For filtering the frequency band 1805 and 1880 MHz.
- WCDMA Rx FILTER (F200)→For filtering the frequency band 2110 and 2170 MHz.
- WCDMA Tx FILTER (F201)→For filtering the frequency band 1920 and 1980 MHz.
3. VCTCXO (OSC200)
To generate the 19.2MHz reference clock to drive the logic and RF.
4. Duplexer (F202)
A duplexer splits a single operating band into receive and transmit paths.
5. WCDMA PAM (U201)
This is a key component in the transmitter chain and must complement the RTR6200 IC precisely; jointly they
dominate the UMTS transmitter performance characteristics. Parameters such as gain, output power level, ACLR,
harmonics, Rx-band noise, and power supply current are critical.
6. GSM/DCS PAM (U102)
The PAM is a key component in any transmitter chain and must complement the rest of the transmitter precisely.
For GSM and DCS operation, the closed-loop transmit power control functions add even more requirements relative
to the UMTS PA. In addition to gain control and switching requirements, the usual RF parameters such as gain,
output power level, several output spectrum requirements, and power supply current are critical.
7. GSM/DCS Dual Tx VCO (OSC100)
The dual Tx VCO outputs, one for EGSM and one for DCS, drive a resistive network that splits the active signal
into two signals: 1) the input to the active PAM – this is the low loss path, and 2) the OPLL feedback signal.
8. Dual VCO (OSC201)
The dual-band UHF VCO is a key component within its phase-locked loop; VCO performance directly impacts PLL
and transceiver performance. GSM/DCS Rx/Tx LO & UMTS Rx LO signal is generated from this dual VCO's output.
9. RFL6200 (U200)
The RFL6200 includes an LNA circuit optimized for UMTS-2100 operation. The LNA is separated from all other
receive functions contained within the RFR6200 receiver IC to improve mixer LO to RF isolation – a critical
parameter in the Zero-IF architecture.
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Circuit Description
10. RFR6200 (U203)
The RFR6200 provides the Zero-IF receiver signal path, from RF to analog baseband, for UMTS-2100 applications.
The RFR6200 accepts its UMTS input signal from the handset RF front-end design. The UMTS input is configured
differentially to optimize second-order inter-modulation and common mode rejection performance, and implements
MSM-controlled gain adjustments to extend the receiver dynamic range.
11. RTR6200 (U101)
The RTR6200 supports multi-band, multi-mode phones with two receiver signal paths and three transmitter signal
paths:
1) Receiver paths
- EGSM-900
- DCS-1800
2) Transmitter paths
- EGSM-900 (using OPLL technique)
- DCS-1800 (using OPLL technique)
- UMTS-2100
Numerous secondary functions are integrated on-chip as well:
3) Phase-locked loop circuits
- PLL#1 and an on-chip VCO supports UMTS Tx
- PLL#2 and an external VCO supports EGSM Rx and Tx, DCS Rx and Tx, and UMTS Rx
4) Transceiver LO generation and distribution circuits
- EGSM-900 Rx and Tx
- DCS-1800 Rx and Tx
- UMTS-2100 Tx
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Circuit Description
2. Baseband Circuit description of SGH-Z110V
1. PM6050
1.1. Power Management
Ten low-dropout regulators designed specifically for GSM applications power the terminal and help ensure optimal
system performance and long battery life. It provides seven LDO support for 2.6V, 2.8V while a self-resetting,
electronically fused switch supplies power to external accessories. Ancillary support functions, such as RTC module
and RTC charger, Clock Buffer, aid in reducing both board area and system complexity.
SBI BUS serial interface provides access to control and configuration registers. This interface gives full control of
the MSM6200 and enables system designers to maximize both standby and talk times.
Supervisory functions. including a reset generator, an input voltage monitor, and a ADC support reliable system
design. These functions work together to ensure proper system behavior during start-up or in the event of a fault
condition(low microprocessor voltage, insufficient battery energy, or excessive die temperature).
1.2 TCXO Controller and Buffers
The PM6050 IC includes circuits for controlling the TCXO warm-up and buffering its signal for distribution throughout
the handset. Performance specifications are presented below.
2. Connector
2-1. LCD Connector
LCD is consisted of main LCD(color 262K TFT LCD) and small LCD(color 65K TFT LCD). Chip select signals in the
MA55141(U501), SLCD_CS can enable small LCD and DEN for main LCD. I2C buses in MSM6200 (U301) control
white-LED of LCDs.
"SLCD_RESET, MLCD_RESET" signals initiate the Reset process of LCDs.
8-bit data lines(RGB[10:17]) transfers data and commands to Small LCD through bypass capacitor. Data and
commands use "SCLD_RS" signal. If this signal is high, Inputs to Small LCD are commands. If it is low, Inputs to
Small LCD are data. The signal which informs the input or output state to Small LCD, is required.
Main LCD interface is 18bit data lines(RGB[0:17]) CPU Interface.
"RGB_VSYNC","RGB_HSYNC","RGB_DE",and,"RGB_CLK" are the signal for transferring data.
Power signals for LCD are "2.8VDV" and "VBATT". "SPKR_P","SPKL_P", "SPKR_N" and "SPKL_N" from U602 are
used for dual audio speaker.
2-2. Key
This is consisted of key interface pins among U301, KEY_0~3 and SCAN_0~6. These signals compose the matrix.
Result of the matrix informs the key status to key interface in U301. Power on/off key is seperated from the matrix.
So power on/off signal is connected with U301 to enable U400. Eighteen key LED use the "VCC_BK" supply voltage
from U304. "HALL_SW" informs the status of folder (open or closed) to modem. This uses the hall effect IC,EM1681.
A magnet under main LCD enables EM1681. It has additional two hall-effect ICs, that are needed for camera
sensing.
One senses the rotation of Z110V camera, and the other senses the Push-pull of the camera.
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Circuit Description
2-3. EMI ESD Filter
This system uses the EMI ESD filter, GMF05LC to protect ESD and Noise from IF CONNECTOR part, LCD,
Camra, and KEY PCB.
2-4. IF connetor
It is 24-pin connector. They are designed to use VBATT, VF, Q_TXD0, Q_RXD0, JIG_ON, M_RXD0, M_TXD0, USB
signal(D+,D-,USB_VCC) and GND. They connected to power supply IC, microprocessor and signal processor IC.
3. Audio
RCV_P and RCV_N from U601 are connected to the main receiver. EAR10P and EAR10N are connected to the
Earphone receiver. MIC1P and MIC1N are connected to the main MIC. And MIC2P and MIC2N are connected to
the Earphone.
YMU769 has a virtual speaker image function, so that it is the most suitable LSI as a sound source output device
which is used in mobile phones for high functional game sounds or high quality ringing melodies, and so on.
Synthesizer section in YMU769 adopts the “Stereophonic Hybrid Synthesizer System” that is given the advantages
of both FM Synthesizers and Wave Table Synthesizers, makes it possible to generate up to 32 FM voices and 32
wave table voices simultaneously.
YMU769 is a LSI for portable telephone that is capable of playing high quality music by utilizing FM synthesizer and
ADPCM decoder that are included in this device.
As a synthesis, YMU769 is equipped 32 voices with different tones. Since the device is capable of simultaneously
generating up to synchronous with the play of the FM synthesizer, various sampled voices can be used as sound
effects. Since the play data of YMU769 is interpreted at anytime through data bus, the length of the data(playing
period) is not limited, so the device can flexibly support application such as incoming call melody music distribution
service.
The hardware sequence built in this device allows playing of the complex music without giving excessive load to the
CPU of the portable telephones. Moreover, the registers of the FM synthesizer can be operated directly for real time
sound generation, allowing, for example, utilization of various sound effects when using the game software installed
in the portable telephone.
YMU769 includes a speaker amplifier with high ripple removal rate whose maximum output is 550mW (SPVDD=3.6V).
For the headphone, it is provided with a stereophonic output terminal.
4. Memory
The signals in the MSM6200 enable two memories. They use only one volt supply voltage, VDD_LP from the
PM6050. This system uses SPANSION's memory, S99PL129JCOBAWUC. It is consisted of 128M bits flash NOR
memory and 32M bits SRAM memory. It has 16 bit data line, AD[0~15] which is connected to MSM6200. It has 22
bit address lines, A[1~22]. ROM_CS and RAM_CS signals is chip select.
In the multi-media processor, it has two type of memories. One is 1GMbit NAND Flash memory and the other is
512Mbit SDRAM memory. Multi-media processor doesn't have a NAND memory interface. But we make a software
algorithm use for NAND memory.
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Circuit Description
5. Multi-media processor MA55141
MA55141 is an LSI, which is designed on 3GPP 3G-324M Standard for a video telephone system.
Since protocol software is external, MA55141 can run with another protocol like H.323 by changing its software.
MA55141 has ARM9 CPU, so supports more various application.
Feature
- Based on 3GPP 3G-324M standard
- Video MPEG-4 (simple profile level1) or H263 (baseline)
- Audio AMR, G723.1, MP3 or AAC (program downloadable)
- Multiplexing H.223 (Level 0, 1, 2, processed by CPU with assistant hardware)
- Control H.245 (Processed all by CPU)
- Built-in 32bit RISC CPU(ARM926EJ) for control. (Max 133MHz, I-cache 16KB, D-cache 8KB, MMU and JAVA
accelerator (Jazelle) included.)
- Built-in 16bit DSP for audio CODEC
- Built-in SD/MMC/Memory Stick I/F
- Video input Rec601/656 YUV = 4:2:2, 8 bit I/F
- Video output Rec601 YUV = 4:2:2(8bit) / RGB 18bit
Built-in Picture-In-Picture Image Displaying Functions
Built-in On Screen Display(OSD) Functions with alpha blending
- Video CODEC
Encoding and decoding : QCIF 40fps, CIF 10fps
Encoding only :QCIF 68fps, CIF 17fps
Decoding only :QCIF 96fps, CIF 24fps
Deblocking filter is built-in.
Max output image size : 2032×2032
- Program on SDRAM is executable without ROM (optional).
- Power supply
VDDI1=1.425V to 1.65V(For internal circuit. Please power off during stand-by)
VDDI2=VDDI1(For internal circuit. Please provide during stand-by)
VDDP0, VDDP1=1.425V to 1.65V(For internal PLL0 and PLL1)
VDDO, VDDOD=2.7V to 3.0V(For I/O)
This LDO is the voltage source of Multimedia part. The MIC2211 is a dual-output LDO regulator.
The one of dual is capable of sourcing 150mA, while the another one can supply up to 300mA.
Ideal for battery operated applications, the MIC2211 offers 1% accuracy, extremely low dropout voltage (80mV @
100mA), and extremely low ground current (only 48mA total). Equipped with TTL logic compatible enable pins, the
MIC2211 can be put into a zero-off-mode current state, drawing no current when disabled. Separate enable pins
allow individual control of each output voltage.
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Circuit Description
7. Camera (HV7151SP)
The HV7151SP is a highly integrated single chip CMOS color image sensor implemented by proprietary
Hynix 0.35um COMS sensor process realizing high sensitivity and wide dynamic range.
Total pixel array size is 1170 x 880 pixels are active. So, It can supports the picture below 1Mega-pixel snap shot.
Each active pixel composed of 4 transistors has a micro-lens to enhance sensitivity, and converts photon energy to
analog pixel voltage. On-chip 10bit Analog to Digital Converter(ADC) ditgitizes analog pixel voltage, and on-chip
Correlated Double Sampling(CDS) scheme reduces Fixed Pattern Noise(FPN) dramatically. The integration of sensor
function and image processing functions make HV7151SP especially very suitable for mobile imaging systems such
as IMT-2000.
8. Irda
This system uses IRDA module, HSDL_3208, Agilent's. This has signals, Input data and output data.
These signals are connected to MSN6200.
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3. SGH-Z110V Exploded View and its Parts list
1. Cellular phone Exploded View
QCA01
QFR01
QCR42
QCR12
QKP01
QME01
QSH02
QFU01
QLC01
QSP02
QSP01
QSP03
QFL01
QCR20
QSC14
QMW01
QCR05
QAN01
QVO01
QCR26
QSC13
QRF01
QMP01
QMI01
QMO01
QVO02
QRE01
QIF01
QCR07
QBA32
QBA33
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