Samsung S5C7320X01-T0R0 Datasheet

S5C7320X01 DATA SHEET
PRODUCT SUMMARY
100-TQFP-1414
INTRODUCTION
S5C7320X01 receives digital data from CCD-using video camera systems such as MMPC and surveillance cameras, and outputs combined video signals. It also runs algorithms for AE/AWB and transmits them to MICOM, or carries out AE/AWB independently. S5C7320X01 has the following features;
FEATURES
NTSC/PAL, 360H/510H/720H/760H CCD compatible
Able to detect and correct 64 CCD white defects
Built-in digital clamp feature
ORDERING INFORMATION
3-line processing using 2 line memories
Luminance signal process
Chrominance signal process
Device Package Operating Tempertature
S5C7320X01-T0R0 100-TQFP-1414 0 °C 70 °C
Color difference signal modulation using quadrature subcarrier generation (DTO) method
Built-in timing and sync signal generator
External synchronization compatible (Line-lock, H-reset/V-reset, H-PLL/V-reset)
Built-in ability to determine if in external synchronization mode
Serial MICOM interface
Built-in algorithm for AE/AWB
MICOMless (stand-alone) full AE/AWB
Partial linear approximation method's γ compensation feature for R, G, B and luminance
Built-in 2CH DAC for combined Y/C analog output
EEPROM interface for register setting without MICOM
Built-in EVR interface for controlling CDS/AGC, and CCD
APPLICATIONS
Camcorder
Surveillance camera
Multimedia PC (MMPC) camera
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DATA SHEET S5C7320X01
C
C
T
T
V
V
V
PIN CONFIGURATION
C
C
S
S
S
X
Y
Y
Y
Y
S
Y
Y
Y
Y
D
C
C
C
C
S
C
C
C
D
D
C
T
T
C
O
O
O
O
S
O
O
O
O
D
O
O
O
O
8
9
E
1
0
K
7
6
5
4
4
3
2
1
0
3
7
S
6
5
4
3
C
O
O
O
O
3
2
1
0
CCD7 CCD6 CCD5 CCD4 CCD3 CCD2 CCD1 CCD0
VDD5
SECK
SECSN
SED
ADCK
SG2
VSS5
SG1
SUB
VSS6
H1 H2
VDD6
V4
V3
V1 V2
WB1 WB0 WBRNG SS2 SS1 SS0 FSHTR VDDA2 VSSA2 AC VREF IREF
S5C7520X01
V S S 1
RGS
P
X1X C 1
S
V
C
C
P
VDHDF
V
L
C
P
H
C
V
S
S
S
H
H
2
D
L
L
B
L
S
S
S
A
I
C
P
D
D
P
P
L
D
S
F
1
1
3
K
2
4
Y
2
E
N C
D
L
G
I
D
H
R
2
M
R
R
R
I
D
D
C
C
A
A
K
O
O
I
M
VBB COMP AY VSSA1 VDDA1 EHD EVD RSTN SMO SMI SMCK SMCSN BLC
Figure 1. Pin Configuration
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S5C7320X01 DATA SHEET
PIN DESCRIPTION
Table 1. Pin Description
No Name I/O Description Note
1 VSS1 G Ground 2 PC1 O Phase comparator output for main clock PLL 3 X1 I Main X-TAL input 4 X2 O Main X-TAL output 5 RG O Reset gate pulse 6 SHP O Precharge sample & hold pulse 7 SHD O Data sample & hold pulse 8 VDD1 P Power
9 CLP12 O Clamp pulse 12 (CLP1/CLP2 multiplexing) 10 CLP34 O Clamp pulse 34 (CLP3/CLP4 multiplexing) 11 PBLK O Pre-blank pulse 12 VD O Vertical drive pulse 13 HD O Horizontal drive pulse 14 FLD O Field ID signal 15 VSS2 G Ground 16 LSFE O Low shutter enable signal (or Vsynco) 17 CSYNC O Composite sync (or Hsynco) 18 PAL I PAL mode (L: NTSC, H: PAL) P-down 19 HIGH I High mode (L: Normal, H:HI8) P-down 20 CCIR I CCIR format mode (L: CIF, H: CCIR) P-down 21 VDD2 P Power 22 SRDAO O EEPROM data output 23 SRDAI I EEPROM data input 24 SRCK O EEPROM control clock 25 MICOM I Stand-alone/MICOM IF selection (L: stand-alone) P-down 26 BLC I Back light compensation enable P-down 27 SMCSN I Serial MICOM chip select enable (active "L") Schmitt 28 SMCK I Serial MICOM input clock Schmitt 29 SMI I Serial MICOM data input Schmitt 30 SMO O Serial MICOM data output 31 RSTN I Master reset (active low) 32 EVD I EXT. sync. VD input (line-lock/V-reset mode) P-up
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DATA SHEET S5C7320X01
Table 1. Pin Description (Continued)
No Name I/O Description Note
33 EHD I EXT. sync. HD input
P-up
(separate sync., composite sync. locking mode.) 34 VDDA1 P Analog power for DAC 35 VSSA1 G Analog ground for DAC 36 AY O(A) Analog luminance output 37 COMP I(A) Compensation terminal for DAC 38 VBB G DAC bulk bias (ground) 39 IREF I(A) Current reference terminal 40 VREF I(A) Voltage reference terminal 41 AC O(A) Analog CHROMA output 42 VSSA2 G Analog ground for DAC 43 VDDA2 P Analog power for DAC 44 FSHTR I Fixed high speed shutter mode (active H) P-down 45 SS0 I Fixed high speed shutter control 0 P-down 46 SS1 I Fixed high speed shutter control 1 P-down 47 SS2 I Fixed high speed shutter control 2 P-down 48 WBRNG I White balance range selection P-down 49 WB0 I White balance mode 0 P-down 50 WB1 I White balance mode 1 Pull-up 51 CO0 O Digital CHROMA output (LSB) 52 CO1 O Digital CHROMA output 53 CO2 O Digital CHROMA output 54 CO3 O Digital CHROMA output 55 VSS3 G Ground 56 CO4 O Digital CHROMA output 57 CO5 O Digital CHROMA output 58 CO6 O Digital CHROMA output 59 CO7 O Digital CHROMA output (MSB) 60 VDD3 P Power 61 YO0 O Digital luminance output (LSB) 62 YO1 O Digital luminance output 63 YO2 O Digital luminance output 64 YO3 O Digital luminance output
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