Samsung S5C7221X01-V0B0, S5C7221X01-V0T0 Datasheet
TIMING & SYNC. GENERATOR FOR B/W CCD S5C7221X01
INTRODUCTION
The S5C7221X01 is a Vertical CCD Driver LSI which is fabricated by CMOS
process for high voltage
FEATURES
• Includes voltage source circuit for CCD image sensor
• Input voltage : 5V / 3.3V
• Package : 20 SSOP
ORDERING INFORMATION
Device Package Operating
S5C7221X01-V0B0
S5C7221X01-V0T0
BLOCK DIAGRAM
20-SSOP-225
20-SSOP-225
-20 °C − 85 °C
GND
XSUB
XV2
XV1
XSG1
XV3
XSG3
XV4
VCP
DCIN
10
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
VHH
VSUB
VEE
Φ V2
Φ V1
VME
Φ V3
Φ V4
VHH
DCOUT
1
S5C7221X01 TIMING & SYNC. GENERATOR FOR B/W CCD
PIN DESCRIPTION
Pin Symbol I/O Description Remark
1 GND - Ground control
2 Xsub I Output Control (Vsub)
3 XV2 I Output Control (ΦV2)
4 XV1 I Output Control (ΦV1)
5 XSG1 I Output Control (ΦV1)
6 XV3 I Output Control (Φ V3)
7 XSG3 I Output Control ( ΦV3)
8 XV4 I Output Control (Φ V4)
9 VCP I Power of amp
10 DCIN I OP-Amp input (internal pull-down resistor)
11 DCOUT O OP-Amp output
12 VHH - Power (15V)
13 ΦV4 O High Voltage Output (2 level :VME, VEE)
14 ΦV3 O High Voltage Output ( 3 level : VME, VEE, VHH)
15 VME - Power (0V)
16 ΦV1 O High Voltage Output (3 level : VME, VEE, VHH)
17 ΦV2 O High Voltage Output (2 level : VME, VEE)
18 VEE - Power (-8.5V)
19 Vsub O High Voltage Output ( 2 level : VEE, VHH)
20 VHH - Power (15V)
ABSOLUTE MAXIMUM RATINGS ( Ta = 25°C )
Characteristics Symbol Value Unit
VEE 0 − -10
Supply Voltage VHH -0.3 − VEE +35
VME VEE -0.3 − 3.0
VI -0.3 − VHH +0.3
Input Voltage
VCP -0.3 − VEE+35
V
Output Voltage ΦV1, ΦV2, Φ V3, ΦV4, ΦVsub VEE -0.3 − VHH +0.3
OP-Amp output Current I
Operating Temperature T
Storage Temperature T
OUT
OPR
STG
±5 mA
-25 − +85
-45 − +120
2
°C
TIMING & SYNC. GENERATOR FOR B/W CCD S5C7221X01
LOGIC FUNCTION TABLE
INPUT OUTPUT
XV1,3 XSG1,3 XV2,4 XSUB Φ V1, 3 ΦV2, 4 VSUB
L L - - VHH - H L - - Z - L H - - VME - H H - - VEE - -
- - L - - VME -
- - H - - VEE -
- - - L - - VHH
- - - H - - VEE
AC CHARACTERISTICS
( VHH = 15V, VME = GND, VEE = - 8.5V ; Ta = 25°C )
Description Symbol Test Conditions Min Typ Max Unit
TPLM NO LOAD (1) 10 40 70
TPMH NO LOAD (1) 10 30 70
TPLH NO LOAD (1) 10 40 100
Delay time
TPML NO LOAD (1) 10 100 200
TPHM NO LOAD (1) 10 100 180
TPHL NO LOAD (1) 10 60 100
TTLM VEE → VME (1) 400 700 930 ns
TTMH VME → VHH (1) 400 650 930
TTLH VEE → VHH (1) 10 50 100
Rising time
TTML VME → VEE (1) 200 300 500
TTHM VHH → VME (1) 400 600 820
TTHL VHH → VEE (1) 10 50 100
Output noise Voltage
VCLH, VCLL
VCMH, VCML
(2) - - 0.5 V
NOTES:
1. Refer to Timing Diagram
2. Refer to Noise Diagram
3
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