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DMLFOR MESSRS: DATE : Mar 15, 13.
2013
TOP
CUSTOMER’S SPECIFICATIONS
128.8cm (51 Inch) Wide Plasma Display Module
MODEL : S51FH-YD03
(NTSC/PAL/3D)
* This specification will be approved by both Customer and Samsung SDI Co.,Ltd.
* Please return one of this specification with your signature for approval.
Proposed by: Approved by:
Signature
General Manager. Changsub, Son
Signature .
PDP Development Team,
PDP Business Division,
Samsung SDI Co., Ltd
SAMSUNG SDI CO.,LTD.
Revision History
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SAMSUNG SDI Corporation Plasma Display Panel
No Date Description Of Changes Rev. no Approval
-
SAMSUNG SDI - 2/66 - Rev.1.0 15/03/2013
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SAMSUNG SDI Corporation Plasma Display Panel
TABLE OF CONTENTS
1. DESCRIPTION......................................................................................................................... 5
2. FEATURES ............................................................................................................................... 5
3. PRODUCT NAME AND MODEL NUMBER ....................................................................... 5
4. FUNCTION OUTLINE............................................................................................................ 5
5. BLOCK DIAGRAM ................................................................................................................. 6
6. DISPLAY CHARACTERISTICS ........................................................................................... 7
6.1 DISPLAY PERFORMANCE ........................................................................................................ 7
6.2 DISPLAY CELL ARRANGEMENT.............................................................................................. 8
6.3 LUMINANCE MEASUREMENT CONDITION............................................................................... 9
6.4 CONTRAST MEASUREMENT CONDITION ............................................................................... 10
6.5 DISPLAY CELL DEFECT SPECIFICATION ............................................................................... 11
6.6 UNIFORMITY SPECIFICATIONS.............................................................................................. 12
6.7 POWER CONSUMPTION.......................................................................................................... 13
6.8 GAMMA CHARACTERISTICS .................................................................................................. 17
6.9 FILM FILTER ......................................................................................................................... 18
6.10 WHITE BALANCE ............................................................................................................... 20
7. SOUND PRESSURE LEVEL SPECIFICATION .............................................................. 21
7.1 MEASUREMENT CONDITION ................................................................. 错误！未定义书签。
7.2 SOUND PRESSURE LEVEL ..................................................................... 错误！未定义书签。
8. MECHANICAL CHARACTERISTICS............................................................................... 23
8.1 MECHANICAL SPECIFICATIONS ............................................................................................ 23
8.2 MECHANICAL CHARACTERISTICS......................................................................................... 23
9. ENVIRONMENTAL CONDITIONS ................................................................................... 24
9.1 OPERATIONAL ENVIRONMENTAL CONDITION ...................................................................... 24
9.2 STORAGE ENVIRONMENTAL CONDITION *1 ......................................................................... 24
9.3 PANEL SURFACE CONDITION................................................................................................ 25
10. INTERFACE SIGNAL SPECIFICATIONS...................................................................... 26
10.1 CONFIGURATION CONTEXT ................................................................................................ 26
10.2 INTERFACE FUNCTION SPECIFICATIONS (INPUT DATA AND DISPLAY PROCESSING) ............. 27
10.3 INPUT SIGNAL DEFINITION................................................................................................. 27
10.4 VIDEO SIGNAL DEFINITION AND FUNCTION ....................................................................... 28
10.5 ELECTRICAL CONDITION OF INTERFACE SIGNAL................................................................ 29
10.6 VIDEO SIGNAL INTERFACE TIMING CONDITIONS................................................................ 31
10.7 INTERFACE TIMING CONDITIONS....................................................................................... 32
10.8 I2C INTERFACE CONDITIONS.............................................................................................. 33
10.9 CONNECTOR SPECIFICATIONS ............................................................................................ 37
10.10.MODE CHANGE ................................................................................................................ 43
11.ADDRESS MAP..................................................................................................................... 44
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12. INPUT POWER VOLTAGE SPECIFICATIONS ............................................................ 45
12.1 ELECTRICAL CHARACTERISTIC OVERVIEW ........................................................................ 45
12.2 PIN ASSIGNMENT OF CONNECTORS FOR POWER SUPPLY ..................................................... 45
12.3 POWER APPLYING SEQUENCE ............................................................................................ 46
13. MECHANICAL DIMENSION DRAWING....................................................................... 51
13.1 FRONT SIDE........................................................................................................................ 51
14.1 LABEL TYPE....................................................................................................................... 52
4.2 LABEL LOCATION ................................................................................................................. 53
15. PACKING.............................................................................................................................. 54
15.1 PACKING DIMENSION AND PARTS LIST .............................................................................. 54
15.2 PACKING ASSEMBLY DRAWING ......................................................................................... 54
15.3 EXPORTATION PACKING ASSEMBLY................................................................................... 55
16. RELIABLITY ....................................................................................................................... 56
16.1 MTBF VALUE.................................................................................................................... 56
16.2 EXPECTED SERVICE LIFE.................................................................................................... 56
16.3 DISCLAIMER ...................................................................................................................... 56
16.4 CERTIFICATE...................................................................................................................... 56
17. WARNING / CAUTION / NOTICE ................................................................................... 57
17.1 WARNING........................................................................................................................... 57
17.2 CAUTION ............................................................................................................................ 59
17.3 NOTICE............................................................................................................................... 60
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1. DESCRIPTION
The S51FH-YD03 is a 51-inch wide full color plasma display module with a resolution of
1920(H) × 1080(V) pixels. The display module includes the Plasma Display Panel, the
Panel Driving Electronics and the Logic Control Board.
2. FEATURES
• Wide aspect ratio(16:9) 51 inch diagonal display screen. The display area is 1124.928mm
wide and 627.48mm high.
• Slim and light weight. The display Module is 47.2mm in depth and weight only approx.
14kg (M1)
• 68719.47 million colors (12Bit), 1073.7 million colors(10Bit), or 16.77 million colors
(8Bit) combination of R,G and B digital data. (According to LVDS input selection)
• High luminance, high contrast and wide viewing angle.
( Film transmissivity 45.0%, NTSC/PAL),
And a viewing angle of greater than 160° comparable to that achieved
3. PRODUCT NAME AND MODEL NUMBER
• Product name : 51 inch Full Color Plasma Display Module
(abbreviation : PDP Module)
• Model number : S51FH-YD03
4. FUNCTION OUTLINE
• The plasma display module has an APC(Automatic Power Control) function which
restricts power consumption within the certain value with regard to each display load
ratio.
• The plasma display module is operated by following digital video signals; Vertical
synchronous signal, Horizontal synchronous signal, Enable signal and 8~12bit data
signals of each R, G and B color. All signals are based on LVDS level.
• The plasma display module is operated at 50Hz/60Hz frame rate. An external frame rate
conversion is required in order to display the other formats.
• The plasma display module requires several types of input power voltages ; voltage for
logic IC, voltage for Gate Driver, voltage for Sustain and voltage for Address.
• The plasma display module is operated at progressive signal only.
An external progressive scan conversion is required in order to display the other formats.
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5. BLOCK DIAGRAM
LVDS SIGNAL
LOGIC CONTROLLER
LVDS I/F CONTROLLER
DATA PROCESSOR
DISPLAY DATA
DRIVING CIRCUIT AND PANEL
SCAN PULSE
DRIVER
PDP
1920×1080 Pixels
SUSTAIN PULSE
DRIVER
DATA DRIVER
DRIVING VOLTAGE
POWER SUPPLY UNIT
Figure 1. Block Diagram of PDP module
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6. DISPLAY CHARACTERISTICS
6.1 Display Performance
No Item Rating
1 Display Pixels
2 Display Cells Horizontal 5,760 ×Vertical 1,080 cells
3 Pixel Pitch Horizontal 585.9㎛ ×Vertical 581㎛
4 Cell Size
5 Pixel Type R, G, B Non stripe (refer to Figure-2)
Effective Display
6
7 Number of color 68719.47 million colors (12Bit) Normal
8 Viewing Angle *3 Over 160°
(Note)
* 1. Luminance and Color Coordinates are the values that were measured with Full load
* 2. Contrast Ratio is calculated from the display Luminance and the non-display
* 3. Viewing angle is a critical angle at which the Luminance is reduced to 50% to the
Size
ratio white pattern. The condition for measurement is shown in Figure-3.
Luminance value. Display condition is shown in Figure-4.
Luminance perpendicular to the PDP Module. The Luminance is measured by a noncontact luminance meter MINOLTA CA-210 without protection film on the front
panel..
Horizontal 1,920 ×Vertical 1,080 pixels
(1 pixel = 1 R,G,B cells)
R Horizontal 195.3㎛ ×Vertical 581㎛
G Horizontal 195.3㎛ ×Vertical 581㎛
B Horizontal 195.3㎛ ×Vertical 581㎛
Horizontal 1124.928mm ×Vertical 627.48mm
[ 44.29 inch × 24.70 inch ]
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6.2 Display Cell Arrangement
st
1
Pixel
Column
nd
2
Pixel
Column
rd
3
Pixel
Column
th
1918
Pixel
Column
th
1919
Pixel
Column
th
1920
Pixel
Column
1
Pixel
Row
nd
2
Pixel
Row
1079
Pixel
Row
1080
Pixel
Row
Pixel Pitch(Width):
st
Pixel
Pitch
th
th
0.5859
RGB RGB RGB
RGB RGB RGB
0.195.3
0.195.3
0.195.3
RGB RGB RGB
RGB RGB RGB
mm
RGB RGB RGB
Pitch Heigh t
(0.581 mm)
RGB RGB RGB
Cell
RGB RGB RGB
RGB RGB RGB
Figure 2. Display Cell Arrangement
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6.3 Luminance Measurement Condition
(1) Display Pattern
Effective Display Area
Effective Display Area
864 192 864
Unit : Pixels(=lines)
marked area : White display area by maximum gradation setting
marked area : Black color (non-display area)
Figure 3. Display Pattern for Brightness & Contrast Ratio Measurement
(2) Display Area ratio : 1% white window
(3) Vsync : 16.7ms
(4) Measuring equipment : MINOLTA CA-210
Pattern Generator(VG-828, LVDS Output).
(5) Ambient Temperature : Room Temperature
(6) Ambient Luminance : Dark Room (<2 lux)
[Note]
1. Measurement is done within 30 seconds after Power On. The temperature of panel
before measurement is room temperature (25℃).
2. Measurement is done within 3 seconds after Display Pattern (Figure 3) On.
486
108
486
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6.4 Contrast Measurement Condition
(1) Measuring point
Figure 4. Measurement point
(2) Vsync : 16.7 ms
(3) Measuring Equipment : MINOLTA CA-210
Pattern Generator(VG-828, LVDS Output).
(4) Contrast Calculation formula
Luminance of 1% white window Area at the center of the screen
Contrast ratio =
Luminance of Black Area *1
【 Note 】
1. For mass production test purposes, it is recommended to measure just 1 point, P1 of
Figure 4 on display pattern of Figure 3.
2. Measuring point _P1 is that minimum luminance point from among effective display
area
(5) Ambient Light : Dark Room (<2 lux)
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6.5 Display Cell Defect Specification
In some cases, a panel may have defective cells that cannot be controlled.
These defective cells can be categorized into three types;
(1) Dark cell defect : defect in which the cell is always off
(2) Bright cell defect : defect in which the cell is always on.
(3) Flickering cell defect : defect in which the cell is flickering.
※Test Pattern : Full White, Full Red, Full Green and Full Blue with 1024 gray level.
The display cell defect specifications define the allowed limits for display cell defects
and
are used as the criteria in determining whether a panel should be shipped.
W
H/4
H/2
H
Zone B
Zone A
H/4
W/4 W/4 W/2
Figure-5. Measurement Area
Item
Number of cell defects Distance between cell defects
For the detail SPEC,
Please contact to CS person of Chenan factory in Korea or Shenzhen factory in china
Specification
(Note)
* 1. A cell is composed of 3 pixels (R, G, and B)
* 2. Cell defect : If the number of dead pixels is one or two, it is called cell defect.
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x
6.6 Uniformity Specifications
The color-PDP uses ultraviolet light produced by gas discharge to illuminate phosphor.
Uneven phosphor coating and inconsistent discharge characteristics cause slight difference
in brightness among the sections in a panel.
Item
Full white
brightness
variation
Equation
Definition
The brightness is measured at 9 points (A1~A9 of Fig-6)
on full white pattern.
The full white brightness variation as then calculated
from the following equations.
Max xx−
× 100%
xMin
−
× 100%
&
Specification
15% and less
The brightness variation specifications define the allowed limits for brightness differences
and the criteria in determining whether a panel is shipped.
W : Effect ive Display Area
H : Effective Display Area
A1 A2 A3
H*0.1
A4
A7
W*0.1
A5 A6
A8 A9
W*0.1
H*0.1
Figure 6. Measurement Area
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6.7 Power consumption
6.7.1 APC (Automatic Power Control) Function
The PDP has an APC (Automatic Power Control) function for the panel driver power source.
When the total display load ratio exceeds approximately 10%, total power consumption is
limited within a specified level (=Lower Power Limit) by APC function.
The operation behavior of APC function is called as SLOW-APC. When the display loadratio changes from low to high value, the power-consumption rises instantly to “Upper
Power Limit” and gradually decreases until it reaches to the “Lower Power Limit.”
[Note] Number of steps may vary as a function of the load ratio.
6.7.2 Brightness and Power Mode Control
This PDP module offers two methods for Brightness and Power mode control.
One is APCO (APC Offset) for Peak-Brightness control, and the others are PUG and PLG
for power mode control. APCO, PUG and PLG are registers controllable through I2C
communication from image board. For detailed address and data bits of these registers, refer
to the Chapter 11. Address Map.
(1) Peak-Brightness Control (APCO)
Sustain
number
Max. Sustain
Min. Sustain
Power
Upper Power
Limit
Lower Power
Limit
Figure 7. Slow APC Behavior
- Controls the maximum sustain number
- APCO variable range : 0000h~01FFh
0 100%
Cmax
load ratio
Power
Load-ratio
Time for transition between 2 setps = 8 frames
(This could be controlled by R_HOLD_TIME)
t
Normal Bright Mode (APCO=0010h)
2/3 Peak-bright Mode (APCO=00FDh)
1/3 Peak-bright Mode (APCO=0190h)
Figure-8. APCO Behavior
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@
)
r
N
(2) ASLG (Power-Mode Control using ASL gain function)
- ASLG variable range : 80~FFh
-
Maximum available power decrease by increasing ASLG above 80h(NTSC)
Sustain
number
Max. Sustain
Min. Sustain
(3) Power-Mode Control ( PLG)
0
Load-ratio
-
- PLG(Power Lower Gain control register)
- Variable range : Default Value : 80
- PLG is for lower power level.
- PLG value : smaller than the default in order to make less power consumption.
ASLG < ASLG’
ASLG’ = 60h
ASLG > ASLG’
load at F/W pattern
Saturated at Min. Sustain
100%
NTSC(50h@PAL
High-Power Mode
ormal Mode
Powe
-Save Mode
Max(Guarantee Stress) : 265W
Typical : 260W
Figure 10. APCL Behavior (PLG Adjust,F/W Pattern)
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(4)Power- Consumption Ratio( BY ASLG, PLG)
PLG ASLG ASLG_SW Power- Consumption Ratio
80h 80h OFF 100%
77h 80h OFF 90%
6Ch 80h OFF 80%
62h 8Ch ON 70%
【 Note 】Condition By Moving Picture(30% Window Size)
Figure 11. Power- Consumption Ratio ByWindowsize(Load)
Window Size(%)
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(
(5) SAPC_Timer
The module is equipped with the APC Timer function to reduce the amount of image
retention. If the input image is not varying for at least one minutes, the fuction starts to
operate and reduce the intial APC level one step down to a predefined target level in
every three seconds. The fuction is immediately turned off when the input image starts
varying.
(5Minute)
APC450)
2 SEC )
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6.8 Gamma characteristics
6.8.1 Basis of Gamma Curve
This PDP module is normally applied to 2.2 gamma curve (refer to Figure 12)
But, this specification could be modified on the request of the customer.
Figure 12. Default Gamma Curve
6.8.2 Basis of Gamma Curve
Cinema mode lower 64 brighty lebel applied to the 2.4 gamma curve
But this specification could be modified on the request of the customer
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6.9 Film filter
6.9.1 Structure of the PDP FF
Hard coating layer
Color PSA
transmissivity 45%
6.9.2 Characteristics of the PDP FF
(1) Attached with a Hard coating film on the View side..
(2) Attached with a Near Infrared (NIR) cut off function in the Color PSA to shield them..
.
6.9.3 Dimension Specifications
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6.9.4 Film Filter Defect specifications
Item
s
Point Defects Size (mm)
φ<0.5
Specification
Allow Defects
Area A Area B
Point
Defects
Linear Defects Size (mm) Allow Defects
Width Length Area A Area B
0.1≤W<0.15
Linear
Defects
0.05≤W<0.1
0.05≤W<0.1
W<0.05
W<0.05
* Distance between defect ≧30 ㎜
[Note]
1.
When power off, the appearance defect is NG.
2.
When power on, Colored defects are treated with Cell defect specification Management.
unlimited
0.5≤φ<1.0
1.0≤φ≤1.5 1 2
1.5< ø
10<L≤20
10<L≤20
L<10
0 5
3 5
none
10 20
10<L≤20
L
<10
35
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6.10 White Balance
(1) Measuring pattern
179Gray
Figure. Measurement pattern(30% Window)
(2) Measuring condition : After 1hour aging , 50
(3) Measuring Equipment : MINOLTA CA-210
Pattern Generator(VG-828, LVDS Output).
(4) Ambient Light : Dark Room (<2 lux)
(5) Default data
∆X ∆Y
51Gray 0.272 0.278 -
51Gray
℃
Luminance
179Gray 0.272 0.278 -
(6) Specification
Type ∆X ∆Y
M1
(With filter)
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0.272 0.278 12,000
T
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SAMSUNG SDI Corporation Plasma Display Panel
7. SOUND PRESSURE LEVEL SPECIFICATION
7.1 Measuring Condition
(1) Background noise level : less than 20dBA under anechoic chamber environment
(2)
Pattern : Full White
(3)
Equipment : FFT Analyzer
z PULSE Analyzer Type 3560C made by B&K or,
z PAK System v5.3 above made by MÜLLER-BBM
(4)
Distance : 1 m from the center of rear side of PDP Module (M3)
(5)
Bandwidth : ⅓ octave band, Weighting Filter : A-weighting
Figure-13. Measuring Point
7.2 Sound Pressure Level
7.2.1 Level Ground (Land)
- Measuring Condition : 0 m
- Sound Pressure Level is overall level calculated from the individual band levels of
250Hz ~ 8kHz.
- Specification : 31.xx dB max.
7.2.2 High Ground
-. Measuring Condition : 2,000 meter
-. Sound Pressure Level is overall level calculated from the individual band levels of
4 kHz ~ 12.5 kHz.
-. Specification : 28.xx dB max.
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【 Note 】
[ Note ]
1. SDI recommends that the back cabinet of a TV has the ventilation holes of less
than 2.7 mm in diameter.
2. Audible noise is guaranteed till the altitude of 1,600 meter.
3. In order to guarantee audible noise at higher altitude than 1,600 meter, a special
module has to be used.
※ Overall value is calculated as follows,
dB
⎛
10
⎜
10
⎜
⎝
⎛
20logdB
=
⎜
10@Freq.
⎜
⎝
dB
10
⎞
P
⎟
⎟
P
0
⎠
0
dB
@8kHz@315Hz@250Hz
⎞
10
+++=
10101010log)Overall(dB Λ
×=
⎟
⎟
⎠
6
−
Pa1020P where,
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8. MECHANICAL CHARACTERISTICS
8.1 Mechanical Specifications
No Item Rating
Width 1,171±2 mm × Height 686.8±2 mm × Thickness 47.2±2 mm
(include FPC and TCP)
1
Outer
Dimension
*see Appendix : Mechanical Dimension Drawing
2 Weight
,
Approximatly 14 kg
(M1F)
8.2 Mechanical Characteristics
No Item Rating
Frequency : 0 ~ 256 Hz
1 Vibration
2 Module drop Panel not broken in less than 10cm.(3 pcs)
3 Torsion Panel not broken in less than 20kgf.(3 pcs)
Sweep Rate : 1 Octave/min
Acceleration Value : 0.85Grms
Duration Time : 1.5 hr
* Notes: (Test condition) Non-Packaging, Operational (only for Vibration)
* Test time of Vibration Test is 30 minutes every direction(X, Y, Z)
* The number of times for shock test is 6 times every direction(X, Y, Z).
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9. ENVIRONMENTAL CONDITIONS
9.1 Operational Environmental Condition
No Item Rating
Ambient
1
Temperature
Panel Surface
2
Temperature *3
3 Humidity Display Operation 20 ~ 80 RH (no condensation)
4 Pressure Display Operation 717 ~ 1,013 hPa (0 ~ 2,800 m)
[NOTE]
1. Functional Operation means that the PDP module is operated only its electrical function.
2. Display Operation means that the PDP module is operated in its full specifications.
3. Panel Surface Temperature means the surface temperature of panel that is just increased
due to the loss of power inside Panel during the image display at a normal display mode
and an ambient temperature defined in this table. The judgment of display defects (e.g.
weak discharge, missing discharge) should be done when the panel is operated at a
ambient temperature defined in this table.
4. Sound Noise is guaranteed till 2,800m
Display Operation -5℃ ~ 60℃
Temperature Slope
Small Size Pattern
Full White Pattern
Temperature Slope Below 20
Below 1.5
~ 120
℃
~ 85
℃
℃/minute
℃/cm
9.2 Storage Environmental Condition *1
No Item Rating
-20
1 Ambient Temperature
2 Humidity 5 ~ 95 RH (no condensation)
3 Pressure 1,013 ~ 307 hPa (0~10,000m)
[NOTE]
1. Storage means the short term period. (e.g. transportation, relocation and so on)
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℃ ~ 70℃
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9.3 Panel Surface Condition
9.3.1. Panel surface temperature specification
The panel surface temperature should be kept as below in order to get stable display of
image.
- Tp= below 120
- Tp= below 85
If the temperature exceeds above level, it may cause the defects of display image like dot
missing, line missing and/or poor image. As the surface temperature of panel has tendency
to rise with deduction of display rate, the relation with temperature can be describe as
below :
85
℃ (display load rate is high : large area ) ~ 120℃ (display load rate is low : small area)
Figure 14. Surface Temperature Vs Displayed Area
It is strongly recommended that the panel surface temperature should be kept as low as
possible, even though its maximum rating is described as above.
9.3.2. Panel Surface Temperature for Breaking
The temperature uniformity across panel should be maintained below 20℃/㎝ not to occur
panel breaking by temperature difference. This breaking temperature is not absolute
temperature, because it depends on condition of panel production and panel scratch. Please
take this value as a reference.
9.3.3. Panel Surface Temperature specification for Conditin of Stable Moving Image
Surface
Temperature
120
85℃
- Tm= below 50
℃ (Absolute Maximum Rating); when small size of image is displayed
℃; when Full White is displayed.
15~20% 100%
Displayed
℃(Whole Displayed Area, SET State)
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10. INTERFACE SIGNAL SPECIFICATIONS
10.1 Configuration Context
R0-R9
G0-G9
B0-B9
Vsync
Hsync
ENABLE
DCLK
Image scaler b’d
D
N
I
E
Figure-14. Interface Block Diagram
PDP Module
SPS-HI15
Tx/RxO 0±
Tx/RxO 1±
Tx/RxO 2±
Tx/RxO 3±
Tx/RxO 4±
Tx/RxO CLK±
Tx/RxE 0±
Tx/RxE 1±
Tx/RxE 2±
Tx/RxE 3±
Tx/RxE 4±
Tx/RxE CLK±
L
V
D
S
Tx
Rx
SDA
SCL
PDP_GO
M
i
c
o
m
R0-R9
G0-G9
B0-B9
Vsync
Hsync
ENABLE
DCLK
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10.2 Interface Function Specifications (input data and display processing)
-
1920x1080-dot data signals are inputted to this product to display data.
-
An I2C bus serial data interface is used for the communication between MPU of FTV
side and the CLU (Control LOGIC Unit) of this PDP Module.
10.3 Input Signal Definition
No Item Signal name Q I/O Method Definition
1 Display
Signal
Video
Signal
Chx_Rx0±
Chx_Rx1±
Chx_Rx2±
Chx_Rx3±
Chx_Rx4±
Input LVDS
2
2
Differentials
2
2
2
Differential serial data signal.
Input video and timing signals
after differential serial
conversation using a dedicated
transceiver. The serial data
signal is transmitted seven times
faster than the base signal.
2 MPU
Communication
Dot
Clock
Communication
Chx_Rx_CLK±
SDA
SCL
UART_Rx
UART_Tx
2 Input LVDS
Differential
1
1
1
1
Input
Input
Input
Output
LVTTL(I2C)
LVTTL(I2C)
UART
UART
Differential clock signal.
Input the clock signal after
differential conversation using a
dedicated transceiver. The clock
signal is transmitted at the same
speed as the base signal.
I2C bus serial data/UART bus
serial data communication
signal. Communication with the
CLU (Control Logic Unit) of
this product is enabled.
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10.4 Video Signal Definition and Function
The table below indicates the definitions and functions of input video signals before
LVDS conversion.
Interfaces Signal Functions
Symbol Function Remarks
R9(7) to R0 10(8) bits red video signal (note 1)
10(8)
G9(7) to G0
B9(7) to B0 10(8) bits blue video signal (note 1)
Hsync Horizontal synchronous signal
Vsync Vertical synchronous signal
DEN Data Enable Valid data enable signal
DCLK Clock for video signal Latch the video signal at falling edge.
* MSB: Most Significant Bit
**LSB: Least Significant Bit
Note 1: The RGB signal may be compensated with Inverse γ circuit [Halftoning Algorithm
(Error Diffusion, Dither) must be included] before inputted to the PDP Module. In
order to obtain good characteristic of low level’s gray scale, inverse γ correction
and E/D process are advisory to be performed after inputted to the PDP Module.
bits green video signal (note
1)
Display data signal:
R9(7):
Display data signal:
G9(7):
Display data signal:
B9(7):
This signal specifies the data period for
one horizontal line. Control of the next
line begins at the rising edge of Hsync.
Timing signal that controls the start of the
screen. Control of the next screen begins
at the rising edge of Vsync.
MSB*, R0: LSB**
MSB*, G0: LSB**
MSB*, B0: LSB**
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10.5 Electrical Condition of Interface Signal
10.5.1. Absolute Maximum Ratings
Common conditions : Ta = 25℃, Vcc = 3.3V
Absolute Ratings
Item Parameter Symbol Ratings Units
-0.3~
-0.5~3.5
GND
GND
GND
GND
PDP_GO
Input
Signals
LVDS
3.3V
CMOS
Table 4. 51Pin assignment of receiver
PIN No
1
2
3 GND
4 UART_Rx(*2)
5
6 NC
7
8 SDA
9
10 NC
11
12 SCL
13
14 RxHEIN4+
15
16 RxHEIN3+
17
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PIN NAME
GND
UART_Tx(*2)
GND
GND
GND
GND
GND
RxHEIN4-
RxHEIN3-
Chx_Rx-/+
Chx_Rx_CLK-/+
SDA, SCL
UART_Rx/Tx
3D_SYNC
PDP_GO
PIN No
18 GND
19
20 RxHECLKIN21
22 RxHEIN2+
23
24 RxHEIN1+
25
26 RxHEIN0+
27
28 GND
29
30 RxHOIN431
32 RxHOIN333
34 RxHOCLKIN+
PIN NAME
RxHECLKIN+
RxHEIN2-
RxHEIN1-
RxHEIN0-
RxHOIN4+
RxHOIN3+
Input Voltage Vi
Input Current Ii -10~10
Input Voltage Vi
Input Current
GND
GND
PIN No
35
36 GND
37
38 RxHOIN2-
39
40 RxHOIN1-
41
42 RxHOIN0-
43
44 GND
45
46 NC
47
48
49
50 GND
51
Ii
PIN NAME
RxHOCLKIN-
RxHOIN2+
RxHOIN1+
RxHOIN0+
3D_SYNC
3.6
8
V
㎂
V
㎃
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10.5.2. Electrical Characteristics
Common conditions : Ta = 25℃, Vcc = 3.3V
Electrical Characteristics
Signal Item Symbol Conditions Min. Typ. Max. Module
LVDS
I2C
Vs_On
3D_SYNC
Differential input high
threshold voltage
Differential input low
threshold voltage
Differential Input
Voltage
V
th VCM=1.2V - - +100
V
tl VCM=1.2V -100 - -
㎷
㎷
Vid 100 600 mV
Common Mode Voltage VCM Vid = 100mV 0.2 1.2 2.2 V
VIN =
Input current I
in
+2.4V/0V
- -
±20.0 ㎂
Vcc = 3.6V
Input Voltage
Input Capacitance Vin - - - 8
Output Voltage
Output Current I
Vih 0.7*Vcc - 3.5 V
il -0.5 - 0.8 V
V
㎊
Voh
ol - - - 0.8 V
V
ol - - - 8
oh = 8 ㎃
I
2.4 - - V
㎃
High level input voltage Vol - 2.4 - - V
Low level input voltage I
ol - - - 0.3*Vcc V
PS_ON
PDP_GO
High level input voltage Vih - 2.5 - 3.5 V
Low level input voltage I
il - -0.5 - 0.3*Vcc V
If above specifications are not meet, the output could be an abnormal Data
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10.6 Video Signal Interface Timing Conditions
The table below indicates the conditions of input video signal before LVDS conversion.
These conditions must be satisfied. Refer to the figure of the timing chart.
HSYNC must be risen up within 1 clock after the rising edge of VSYNC.
8 bits LVDS ~10 bit LVDS belong to one timing table below.
Video Input Signal Timing (NTSC/PAL)
ITEM SYMBOL Min Typ Max Units Remarks
DCLK
Hsync
Vsync
Data
Enable
* Hsync Period :
- Min : 14.0 us (1039 Tclk @DCLK 74.25MHz)
- Typ : 14.81 us (1100 Tclk @DCLK 74.25MHz)
* Vsync Period :
- Min : 1107/1324 (@Hsync Period Typ Value)
- Typ : 1125/1350 (@Hsync Period Type Value)
Period T
13.84 13.47 13.11 ns
clk
Frequency 72.25 74.25 76.25 MHz
Period 14.0 14.81 - us
Frequency Fh 71.42 67.49 - KHz
Width Twh 6 20 - T
clk
Period Tvp 1107/1324* 1125/1350* 1227/1500* Thp NTSC/PAL
Frequency Fv 61/51 60/50 55/45 Hz NTSC/PAL
Width Twv 2 5 10 Thp
Horizontal Valid Thv 960 960 960 T
Horizontal Back Porch T
Horizontal Front Porch T
- 96 - T
hbp
- 44 - T
hfp
clk
clk
clk
Vertical Valid Tvv 1080 1080 1080 Thp
Vertical Back Porch T
Vertical Front Porch T
20 36 - Thp
vbp
6 20 - Thp NTSC/PAL
vfp
Tvsync :
- PAL Long Mode : Below 49Hz
- PAL Normal Mode : 49~51Hz
- PAL LB Mode : 51~55Hz
- NTSC Long Mode : 55 ~ 59 Hz
- NTSC Normal Mode : 59 ~ 61 Hz
- NTSC LB Mode : 61 ~ 65 Hz
- NTSC Mask Mode : above 65 Hz
* LB Mode(=Low Brightness Mode) : By decreasing sustain period on the Tvsync shorter
than normal, brightness is reduced.
* 1`Mask(or Flicker) Mode : Masks abnormally short Vsync, and displays at the frame
period twice as input Vsync period.
* Long Mode : mode change is not occurred in this period, the display is normally operation
by increasing the Vsync period.
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-
10.7 Interface Timing Conditions
This PDP Module uses an LVDS interface for the signal input
SYNC
H
Thp
Tw h
Thbp
Thv Thfp
SAM SUNG PDP FHD
Active D isplay A rea
1920*1080
Tw v
Tvbp
Tvv
Tvfp
V-SYNC
Tvp
Figure 16. Video Input Signal Timing Chart
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10.8 I2C Interface Conditions
10.8.1 Basic Specifications
This PDP Module has the I2C bus serial data communication function.
The customer may use this function to make settings for PDP Module characteristics of
several items.
No Parameter Specifications
1
2 Device Status Slave Receiver
3 Slave Address CC(Write), CD(Read)
10.8.2 PDP_GO Signal
I2C control is available only when I2C-Ready signal is ‘High’ state.
Recommended Transfer Rate 100 kbps
10.8.3 Data Validity
Amount of data that is transferred is 1-Bit per 1 SCL cycle. Data is valid when SCL is high
and recognized as to state of SDA.
10.8.4 Start & Stop Condition
Start /Stop condition is generated by Master (= Image board). Before start condition or after
stop condition, a SDA cannot be recognized as valid data.
Start condition
Stop condition
☞ SCL high & SDA transition from H to L.
☞ SCL high & SDA transition from L to H.
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10.8.5. Acknowledge
When Master (=Image board) needs to stop reading data, the master should give NO ACK
signal to slave by SDA. Slave (=PDP Module) gives ACK whenever 8-bit transfer is done.
10.8.6. 7-Bit Addressing for Device address (with example of CC or CD)
Master could choose slave by 7-bit slave address and decide what procedure is by R/W bit
(H=Read procedure, L=Write procedure).
R/W ACKSlave Address
10.8.7. 16-Bit Mode
The basic I2C format (8-bit (Byte)) is expanded by 16-bit (Word). Therefore this PDP
Module’s I2C architecture consists of 7-bit slave addressing, 16-bit base addressing and 16bit data (Refer to ‘Write & Read Operation’).
10.8.8. Data Transfer Sequence (Write)
The basic I2C format (8-bit (Byte)) is expanded by 16-bit (Word). Therefore this PDP
module’s I2C architecture consists of 7-bit slave addressing, 16-bit base addressing and 16bit data (Refer to ‘Write & Read Operation’).
Note 1: Black letters mean master (=Image board)’s bus occupation.
Note 2: Blue letters mean slave (=PDP module)’s bus occupation.
Note 3: Option Bit = 01: ROM , 10: RAM , 11: both Memory(ROM and RAM)
If ROM mode is very slow, it is impossible to use normal I2C
communication.
The image board can only use RAM mode.
START
S0 S1 S2 S3 S4 S5 S6 W ACK
S0 S1 S2 S3 S4 S5 S6 S7 ACK
S0 S1 S2 S3 S4 S5 S6 S7Receive Data (Upper Byte) ACK
Slave Address
Base Address (Upper Byte)
S0 S1 S2 S3 S4 S5 S6 S7Base Address (Lower Byte)
S0 S1 S2 S3 S4 S5 S6 S7Receive Data (Lower Byte) ACK
ACK
STOPS0 S1 S2 S3 S4 S5 S6 S7Receive Data (Lower Byte) [2N + 1] ACKS0 S1 S2 S3 S4 S5 S6 S7Receive Data (Upper Byte) [2N] ACK
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10.8.9. Data Transfer Sequence (Read)
The basic I2C format (8-bit (Byte)) is expanded by 16-bit (Word). Therefore this PDP
Module’s I2C architecture consists of 7-bit slave addressing, 16-bit base addressing and 16bit data (Refer to ‘Write & Read Operation’).
Note 1: In advance, master should initialize writing sequence by giving base address and
stop condition.
Note 2: After start condition and slave addressing, master could receive data from slave.
Note 3: Master should give acknowledge whenever 8-bit data is received.
Note 4: ‘No acknowledge’ could make master give stop condition on bus. Therefore, NACK
is used for master to stop receiving data from slave.
Note 5: Black letters mean master (=Image B’D)’s bus occupation.
Note 6: Blue letters mean slave (=PDP Module)’s bus occupation.
Note 7: Option Bit = 11: both memory, 01: ROM (512K), 10: RAM (in ASIC)
S0 S1 S2 S3 S4 S5 S6 WSlave AddressSTART
S0 S1 S2 S3 S4 S5 S6 S7 ACKBase Address (Upper Byte) S0 S1 S2 S3 S4 S5 S6 S7Base Address (Lower Byte) ACK STOP
S0 S1 S2 S3 S4 S5 S6 R ACKSlave AddressSTART
ACK
S0 S1 S2 S3 S4 S5 S6 S7Request Data (Lower Byte) ACKS0 S1 S2 S3 S4 S5 S6 S7Request Data (Upper Byte) ACK
STOPS0 S1 S2 S3 S4 S5 S6 S7Request Data (Lower Byte) [2N + 1] NACKS0 S1 S2 S3 S4 S5 S6 S7Request Data (Upper Byte) [2N] ACK
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10.8.10. I2C Bus Timing Specifications
* Refer to the following data merely as sample data.
No Item Symbol
1 SCL Input Frequency
2 SCL Input “HIGH” Period
3 SCL Input “Low” Period
4 Start Condition Set Up Time
5 Start Condition Hold Time
6 Data Input Set Up Time
7 Data Input Hold Time
8 Stop Condition Set Up Time
9 Data Output Delay Time
10 Data Output Hold Time
11 SDA Bus Free Time
12 Packet Timeout *1
13 SCL, SDA Input Rising
Time
14 SCL, SDA Input Falling
Time
15 SCL, SDA Line Capacitor
fSCL
tHIGH
tLOW
tSU.STA
tHD.STA
tSU.DAT
tHD.DAT
tSU.STO
tPD
tDH
tBUF
tPT
tR
tF
Cb
Min. Typ. Max. Module
5 100 200
2.5 - -
2.5 - -
3.0 - -
2.3 - -
0.2 - -
0.1 - 3.45
2.3 - -
0.1 - -
0.1 - -
4.0 - -
1.0 - -
- - 1.0
- - 0.3
- - 400
Standard
㎑
㎲
㎲
㎲
㎲
㎲
㎲
㎲
㎲
㎲
㎲
sec
㎲
㎲
㎊
[Note]
1. Packet Timeout is minimum delay time from Start to Stop
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10.9 Connector Specifications
10.9.1 Connector Specifications (E-Buffer)
Connector
Name
CN2501
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Pin # Signal Name
1 GND
2 TCP_DATA_POS_12
3 TCP_DATA_NEG_12
4 TCP_DATA_POS_13
5 TCP_DATA_NEG_13
6 TCP_DATA_POS_14
7 TCP_DATA_NEG_14
8 TCP_DATA_POS_15
9 TCP_DATA_NEG_15
10 TCP_DATA_POS_16
11 TCP_DATA_NEG_16
12 TCP_DATA_POS_17
13 TCP_DATA_NEG_17
14 GND
15 TCP_CLK_POS_3_2
16 TCP_CLK_NEG_3_2
17 GND
18 TCP_CSE_3
19 TCP_STB_3
20 GND
21 TCP_BLK
22 TCP_POL
23 TCP_CE_2
24 TCP_CSE_4
25 TCP_STB_4
26 GND
27 TCP_CLK_POS_1_3
28 TCP_CLK_NEG_1_3
29 GND
30 TCP_CLK_POS_2_3
31 TCP_CLK_NEG_2_3
32 GND
33 TCP_CLK_POS_3_3
34 TCP_CLK_NEG_3_3
35 GND
36 TCP_DATA_NEG_18
37 TCP_DATA_POS_18
38 TCP_DATA_NEG_19
39 TCP_DATA_POS_19
40 TCP_DATA_NEG_20
41 TCP_DATA_POS_20
42 TCP_DATA_NEG_21
43 TCP_DATA_POS_21
44 TCP_DATA_NEG_22
45 TCP_DATA_POS_22
NOTES:
1. CN2501 connector is located in Logic E-Buffer
Board.
2. Pin to Pin pitch of connector CN2501 is 0.5mm
3. Pin numbering order : right to left view from
component side of Logic Board.
4. All the other pins are GND.
5. Reserved for factory use only. This pin
should be disconnected in case of customer's
use.
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46 TCP_DATA_NEG_23
47 TCP_DATA_POS_23
48 TCP_DATA_NEG_24
49 TCP_DATA_POS_24
50 TCP_DATA_NEG_25
51 TCP_DATA_POS_25
52 TCP_DATA_NEG_26
53 TCP_DATA_POS_26
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54 TCP_DATA_NEG_27
55 TCP_DATA_POS_27
56 TCP_DATA_NEG_28
57 TCP_DATA_POS_28
58 TCP_DATA_NEG_29
59 TCP_DATA_POS_29
60 GND
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10.9.2 Connector Specifications (F-Buffer)
Connector
Name
CN2601
Pin # Signal Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
D3.3V
D3.3V
D3.3V
D3.3V
NC
GND
EEPROM_WP
EEPROM_MSCL
EEPROM_MSDA
GND
TCP_CLK_POS_1_1
TCP_CLK_NEG_1_1
GND
TCP_CLK_POS_2_1
TCP_CLK_NEG_2_1
GND
TCP_CLK_POS_3_1
TCP_CLK_NEG_3_1
GND
TCP_DATA_NEG_00
TCP_DATA_POS_00
TCP_DATA_NEG_01
TCP_DATA_POS_01
TCP_DATA_NEG_02
TCP_DATA_POS_02
TCP_DATA_NEG_03
TCP_DATA_POS_03
TCP_DATA_NEG_04
TCP_DATA_POS_04
TCP_DATA_NEG_05
TCP_DATA_POS_05
GND
TCP_DATA_POS_06
TCP_DATA_NEG_06
TCP_DATA_POS_07
TCP_DATA_NEG_07
TCP_DATA_POS_08
TCP_DATA_NEG_08
TCP_DATA_POS_09
TCP_DATA_NEG_09
TCP_DATA_POS_10
TCP_DATA_NEG_10
TCP_DATA_POS_11
TCP_DATA_NEG_11
GND
TCP_CSE_0
NOTES:
1. CN2601 connector is located in Logic F-Buffer
Board.
2. Pin to Pin pitch of connector CN2609 is 0.5mm
3. Pin numbering order : right to left view from
component side of Logic Board.
4. All the other pins are GND.
5. Reserved for factory use only. This pin
should be disconnected in case of customer's
use.
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47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
TCP_STB_0
GND
TCP_CSE_1
TCP_STB_1
GND
TCP_BLK
TCP_POL
TCP_CE_0
TCP_CE_1
TCP_CSE_2
TCP_STB_2
GND
TCP_CLK_POS_1_2
TCP_CLK_NEG_1_2
GND
TCP_CLK_POS_2_2
TCP_CLK_NEG_2_2
GND
TCP_CLK_POS_3_2
TCP_CLK_NEG_3_2
GND
TCP_DATA_POS_12
TCP_DATA_NEG_12
TCP_DATA_POS_13
TCP_DATA_NEG_13
TCP_DATA_POS_14
TCP_DATA_NEG_14
TCP_DATA_POS_15
TCP_DATA_NEG_15
TCP_DATA_POS_16
TCP_DATA_NEG_16
TCP_DATA_POS_17
TCP_DATA_NEG_17
GND
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10.9.3 Connector Specifications (Y-Main)
Connector
Name
CN5004
10.9.4 Connector Specifications (X-Buffer)
Connector
Name
CN4007
Pin # Signal Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
GND
OC2-E
OC2-O
CLK
LE
OC1-E
OC1-O
YS
YRR
GND
YR
2VSCAN
YPS
YFR
YSC
YG
VSC_CON
NC
GND
XE
FH
RH
XR
MODEL_SEL_2
DRV_RESET
Y_DS_RESET
MODEL_SEL_1
5V_DET
D5V
D5V
NOTES:
1. CN5004 connector is located in Y-Main Board.
2. Pin to Pin pitch of connector CN5004 is 1.0mm
3. Pin numbering order : right to left view from
component side of Y-Main Board.
4. All the other pins are GND.
5. Reserved for factory use only. This pin
should be disconnected in case of customer's
use.
Pin # Signal Name
1
2
3
4
5
6
7
8
9
10
11
12
13
GND
NC
XE
NC
NC
NC
XS
XG
GND
DRV_RESET
X_DS_RESET
GND
5V_DET
NOTES:
1. CN4007 connector is located in X-Buffer Board.
2. Pin to Pin pitch of connector CN4007 is 1.25mm
3. Pin numbering order : right to left view from
component side of X-Buffer Board.
4. All the other pins are GND.
5. Reserved for factory use only. This pin
should be disconnected in case of customer's
use.
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14
D5V
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10.10.Mode change
10.10.1. Mode
It has four kinds of mode that is divied NT and PAL by input sync.
Mode NT PAL
Normal Normal_NT Normal_PAL
3D 3D_NT 3D_PAL
3D_Dynamic 3D_Dynamic_NT 3D_Dynamic_PAL
10.10.2. Mode Control Register
Register Address Bit Data Mode Access
bit[8] 0 or 1 Vsync Flag R
0x11 Normal Mode R / W
PDP_DRIVING_MODE 806F
bit[4:0]
0x03 3D Mode R / W
0x05 Cinema Mode R / W
0x07 3D_Dynamic Mode R / W
Figure . I2C communication between Disabled
10.10.3. Mode Change
NT, PAL, including the conversion of 6 different Mode is available to each other.
10.10.4. I2C access specification while mode change
If the I2C command input about mode change, the I2C communication could not work
while 2 frame +
β.
Input VS
1234
β
Mode Change command
Access denied by I2C(No Ack)
= 2vsync + β
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11.ADDRESS MAP
I2C Slave Address
Sub
Address
8114(NT)
A114(PAL)
89DA(NT)
A9DA(PAL) 0~7 PLG
Data
Bit
0~5
☞ Write: CC (hex), Read: CD (hex)
Symbol Item / Function
Pattern Select
☞ Patterns below are valid when IE
(Internal clk or External clk) is set to ‘1’.
00: Full Window (Black)
01~04: Full Window (White,Red,Green,Blue)
05 : 1 point Box(White, Windows size)
06~09: 9 Point Box (White,Red,Green,Blue)
0A : 1% Window
R_PAT
T_SEL
0B: Color Bar
0C : Half Gray
0D: Cross Hatch
0E : Dot Array
0F : 3% Window
10~13 : Gray Bar (Horizontal, Vertical)
14~16: Horizontal Ramp Pattern (Stay, Scroll)
17~19: Vertical Ramp Pattern (Stay, Scroll)
1A : Horizontal Gray Color Bar
1B : Dot Array, 1C : IRE, 1D : Scroll,
1E : Half Gray, 1F : Moving Scroll
Power Lower Gain Control
☞ Control the power lower level of PDP module.
Setting [hex]
Initial
Range
NT PAL
00~1E 00 00 *(a)
00~FF 80 80 *(c)
Note
89C6(NT)
A9C6(PAL)
89C6(NT)
A9C6(PAL)
89C0(NT)
A9C0(PAL)
8~15 ASLG
ASLG_
0
0~8 APCO
ASL Constant Gain
☞ Control the ASL Gain of PDP module.
ASL Constant Operation on/off S/W
SW
☞ ‘1’ = On, ‘0’ = Off
APC Offset Level
☞ Adjusts peak luminance for customer’s specifications.
80~FF 80 80 *(c)
0/1 00 00 *(c)
10~1FF 00 00 *(c)
[Note]
1.
Only sub-addresses shown in above table are allowable for access. An access to the any
other address than shown in above sub-address table may lead to an abnormal system
down or permanent damage.
2.
Above table contain the option bits of memory access, MSB and MSB-1 bit in Base
address (Upper byte).
*(a) Please access these addresses for test use only. For ordinary operating conditions,
values of these addresses should be set to initial values.
*(b) Customers can set these values considering their specifications.
*(c) APCO , ASLG, PLG is used for control the “Brightness and Power Mode” of PDP
Module. For a detailed behavior and variable range, refer to the Chapter 6.7 Power
Consumption
.
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12. INPUT POWER VOLTAGE SPECIFICATIONS
12.1 Electrical Characteristic Overview
Power
Name
Vs 209 15.0 2000 Sustain voltage
Voltage(V)
Peak Load
(A)
Regulation (%)
Ripple &
Noise (mV)
Remarks
Va 58 10.0 700 Address voltage
Vg 15 1.5
D5.3V 5.3 7.0 ±3 100
±1.5
150
Gate driver for FET
and IGBT
Drive TTL in X,Y
driving, Logic
*1. This means nominal voltage stability when current is changed from min to max.
*2. The output voltages for Vs and Va could be varied within variable range by feedback
variable resistors.
*3. This spec guaranteed when no changed luminance and power consumption spec
■ Above voltage levels are nominal value. They are adjustable to drive panel.
12.2 Pin assignment of connectors for Power Supply
Location No CN4005
Function X-Buffer
Pin Num. 7pin
Type
Pin No. Pin Name
1 Vs
2 Vs
3 NC
4 GND
5 VA
6 GND
7 15V
*1. This is a signal (Active High) from Logic main to PSU. (High : 2.8V, Low : 0V)
Yeon-Ho
SMW250-07
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12.3 Power Applying Sequence
► Relay on Sequence
Relay on !Æ
PS_on
0s
Vs_on
680ms
554ms
Va
566ms
5V
15V
666ms
Vs
208ms
560ms
Ve
Vscan
PDP_GO
*1. Reference value
*2. D3V3 needs to start with 5~50ms rising time. And at least 500mA is needed for rising time.
*3. Vs_on signal is output from Logic board to PSU.
*4. Vs should be enabling with Vs_on signal(Active High) from Logic.
*5. Vs should be always higher than Ve while D3V3 is alive.
*6. I2C Ready signal is output from Logic board to Image board.
*7. POS : Power ON Sequence.
1120ms
1110ms
904ms
986ms
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► Relay off Sequence
Relay off !Æ
PS_on
0s
Vs_on
Va
*1
20.6s
5V
3.4ms
3.8s
15V
12.1s
Vs
12.3s
Ve
Vscan
*1.From the time controlled by the High PS_ON, the 5V should be maintained for more than 30ms.
30s Æ
30s Æ
30s Æ
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► AC_off Sequence
AC off !Æ
PS_on
3.1ms
Vs_on
Va
*1
18.3s
5V
3.6ms
3.8s
15V
8.52s
Vs
Ve
Vscan
*1.From the time controlled by the High PS_ON, the 5V should be maintained for more than 30ms.
30s Æ
30s Æ
30s Æ
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► Logic Start Sequence – Controlled by Vsync
▶ AC on, Relay on
BOOT
Loading
R P
ARM
CFG
S1 S5
S2 S3 S4 S7
*1. ASIC config “R”, “P” is initialization for ASIC.
*2. ASIC config “ARM CFG” is initialization for arm processor.
*3. States that from s0 to s6 are setions of power on after system operation.
*4. ARM_call is measured by cpu counter.
S6S0
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▶ Timing description.
Parameter Description Min Typ Max Unit
a. IO-Core time delay Delay time to io from core 0.1 1.24 – ms
b. System reset Reset time for chip 10 60 – ms
c. boot configuration Boot configuration time – 150 – ms
d. configuration Glogic configuration time – 174 – ms
e. asic nreset Glogic Reset time to System reset – 324 – ms
f. external device set External device setting time – 10.4 – ms
g. data loading Data loading time 2.4 – ms
h. power sequence1 – – – ms
i. power sequence2 – – – ms
▶ Stat description.
Stat Description
S0
S2 Data loading period from External flash memory to ASIC sram
S3
S4
S5 Temperature mode setting, holding data restoration, FRC mode setting, etc.
S6 Normal operation(Internal/External switchover, 50/60Hz detect)
Register(PLL, MEM Ctrl, I/O spec, Etc) setting period for chip after system reset or
configuration
VS_ON output activating after S2
Power ON Sequence. Ypn bootstrap capacitor charging and Startup discharge
stabilization
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13. MECHANICAL DIMENSION DRAWING
13.1 Front Side
13.2 Rear Side
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14. LABEL
14.1 Label Type
(1) Label for the PDP Module, Operating Voltages, Caution/Warning Label
(2) Label for PANEL Serial Number
1
30 04 3 01 15 90920
Model Type Production
Line
51FHD FF
nd
Line 2013 01~12 1~30th 00000~99999
3
Production
Year
Production
Month
Production
Date
Production
Number
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4.2 Label location
【 Notes 】
1. Label 1 is a label for the PDP Module, power specification, Caution.
2.
Label 2 is a label for PANEL Serial Number
3.
Label 3 is a label for CPBA Label
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15. PACKING
15.1 Packing Dimension and Parts List
- Number of Module in 1 package: 13 Modules
- Packing dimensions (W*L*H): 1,326*900*1,073 (mm)
(Including Pallet :125mm)
- Weight: About 212 Kg ± 10kg
No Item No Item
1 Packing Box -Top 8 Tape Acetate
2 Cushion-Top 9 Tape Filament
3 Cushion-Middle 10 Band-PP
4 Cushion-Bottom 11 Label-Inspection
5 Chemicals 12 Wrap-Stretch-Film
6 Pallet-Composite 13 Wrap-Vinyle
7 Bag-PE 14 Label Bar Code
15.2 Packing Assembly Drawing
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15.3 Exportation Packing Assembly
A grade B grade
Region China, Russia, Thailand Except for A grade’s region
Specifications
Corner angle O X
Wrapping
(between up/down
pallete)
Pallete Timber
For SLIP prevention,
- The corner angle is fixed the
Note
corner of up/down pallete
- The vinyl wrapping between
up/down pallete
O X
Timber
(but SEDA and domestic use MDF)
No changes
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16. RELIABLITY
16.1 MTBF Value
Mean Time Between Failure is dependent on the overall PDP Module design.
MTBF : 60,000hours (Excluding Electrolytic Capacitor)
※ Condition : 25℃, Used moving Picture Signal
16.2 Expected Service Life
Expected Life tme : about 100,000 hours.
Expected life refers to the time span in whitch display white brightness decays to 50%
of the initial brightness.
The above mentioned value is a referance value, and this value cannot be guaranteed.
Image sticking and other defects are off the subject
16.3 Disclaimer
This Specification stipulates the final and comprehensive requirements for the respective
products hereof. Beyond this Specification, it is the responsibility of the customer to
explicitly disclose any additional requirements, information or reservations regarding these
requirements to Samsung SDI prior to implementation, where any and all disclosures of the
customer shall be with an authorized representative of Samsung SDI in writing. Samsung
SDI shall not be responsible for safety, performance, functionality or compatibility of the
system with which the Samsung SDI-supplied components are integrated unless such
features have been expressly communicated and described in the
Specification. SAMSUNG SDI MAKES NO GUARANTY OR WARRANTY, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO MERCHANTABILITY OR
FITNESS FOR A PARTICULAR PURPOSE, TO ANY PARTY. Moreover, any party
should do their own due diligence regarding these requirements prior to implementation
16.4 Certificate
We verify that we never use or include the restricted substances under the level 1 of SEC’s
management requirement (SS-00259) in parts and components, subsidiary material,
materials used for unit parts, and packing materials or substances added during
manufacturing process.
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17. WARNING / CAUTION / NOTICE
TO PREVENT POSSIBLE DANG
ER, DAMAGE, AND BODILY HARM, PLEASE CONSIDER AND OBSERVE ALL
WARNINGS AND CAUTIONS CONTAINED IN THIS PARAGRAPH.
17.1 Warning
If you do not consider the following warnings, it could result in death or serious injury.
(1)
The Module is controlled by high voltage about 350V. If you need to handle the Module
during operation or just after power-off, you must take proper precautions against electric
shock and must not touch the drive circuit portion and metallic part of Module within 5
minutes. The capacitors in the drive circuit portion remain temporarily charged even after
the power is turned off. After turning off the power, you must be sure to wait at least one
minute before touching the Module. If the remain voltage is strong enough, it could result
in electric shock.
(2)
Do not use any other power supply voltage other than the voltage specified in this
product specifications. If you use power voltage deviated from the specifications, it could
result in product failure.
(3)
Do not operate or install under the deviated surroundings from the environmental
specification set for the below; in moisture, rain or near water-for example, bath tub,
laundry tub, kitchen sink; in a wet basement; or near a swimming pool; and also near fire
or heater - for example, near or over radiator or heat resistor; or where it is exposed to
direct sunlight; or somewhere like that. If you use the Module in places mentioned above,
it could result in electric shock, fire hazard or product failure.
(4)
If any foreign objects (e.g. water, liquid and metallic chip or dust) entered the Module,
the power supply voltage to the Module must be turned off immediately. Also, never
push objects of any kind into the Module as they may touch dangerous voltage point or
make short circuits that could result in fire hazard or electric shock.
(5)
If smoke, offensive smell or unusual noise should come from the Module, the power
supply voltage to the Module must be turned off immediately. Also, when the screen fails
to display any picture after the power-on or during operation, the power supply must be
turned off immediately. Do not continue to operate the Module under these conditions.
(6)
Do not disconnect or connect the Module's connector while the power supply is on, or
immediately after power off. Because the Module is operated by high voltage, and the
capacitors in drive circuit remain temporarily charged even after the power is turned off.
If you need to disconnect or reconnect it, you have to wait at least one minute after power
off.
(7)
Do not disconnect or connect the power connector by a wet hand. The voltage of the
product may be strong enough to cause an electric shock.
(8)
Do not damage the power cable of the Module, also do not modify it.
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(9)
When the power cable or connector is damaged or frayed, do not use it.
(10)
When the power connector is covered with dust, please wipe it out with a dry cloth before
power on.
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17.2 Caution
If you do not consider the following cautions, it may result in personal injury or damage in
property.
(1)
Do not set the Module on an unstable, vibrating or inclined place. The Module may fall
or collapse and it may cause a serious injury to a person, and/or damage to the product.
(2)
If you need to remove the Module to another place, you must turn off the power supply
and detach the interface cable and power cable from the Module beforehand, and watch
your steps not to step on the cables during the operation. If the cables are damaged during
the transport, it may result in fire hazard or electric shock. Also if the Module is dropped
or fallen, it may cause a serious injury to a person and /or damage to the product.
(3)
When you draw or insert the module's cable, you must turn off the power supply and do it
(with) holding the connector. If you forcibly draw the cable, the electric wire in the cable
can be exposed or broken. It may result in fire hazard or electric shock.
(4)
When you carry the Module, it should be done with at least two workers in order to avoid
any unexpected accidents.
(5)
Be careful not to touch the panel glass surface while the PDP module is operating
because there is a possibility of getting a burn injury due to its very high temperature.
(6)
The Module has a glass-plate. If the Module is inflicted with excessive stress - for
example; shock, vibration, bending or heat-shock, the glass plate could be broken. It may
result in a personal injury. Also, do not press or strike the glass surface.
(7)
If the glass panel was broken, do not touch it with bare hand. It may result in a cut injury.
(8)
Do not place any object on the glass panel. It may be the cause of the scratch or break of
the glass panel.
(9)
Do not place any object on the Module. It may result in a personal injury due to fall or
drop.
(10)
PDP is a product, which generates heat during operation. Therefore, do not use the
materials which make corrode the PDP module by the chemical reaction that takes place
in high temperature and humidity conditions.
(11)
Exposing to corrosive gases or contact with the materials, which may cause corrosions,
could lead to chemical reactions that will adversely affect on the device. If you were to
use the PDP in such conditions, consider ways to avoid such exposure or to protect the
PDP module.
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17.3 Notice
When you apply the Module to your system or handle it, you must make sure to follow the
notices set forth below.
□
Notice to your system design
(1)
The Module radiates the infrared rays of between 800 and 1000 ㎚. It may bring an error
in operating the IR-remote controller or another electric system. Please consider (to)
providing the IR absorb filter in your system, and evaluating it.
(2)
The Module has a high-voltage switching circuit and a high-speed clock circuit.
Therefore, you have to apply and evaluate the EMC consideration of your system.
(3)
The Module has a glass plate. In your mechanical design, please (consider to) avoid any
excessive shock and stress to the glass surface. Also be careful not to damage the exhaust
pipe at the corner of glass plate. If the glass plate and exhaust pipe are damaged, the
&Module may fail.
(4)
Since PDP module is controlled by high voltage, all voltage should be discharged
immediately after the power is turned off.
(5)
PDP module generates heat during operation. Heatproof design (radiation and
ventilation) should be considered from design stage. If the PDP module is used out of the
specified temperature range, it can result in a defect.
(6)
The ventilation design in your system should have a back-cover that is able to prevent
moisture and dust from getting into the inside of the electric circuit, because the Module
has high-density electric parts with high-voltage. If the driver circuit has condensation or
dusts, it may cause a short circuit or dielectric breakdown.
(7)
If an excessive stress (more than specified absolute maximum ratings in the voltage,
current, temperature etc.) is applied to the PDP module, it could cause a serious damage.
Do not use the module out of the ratings.
(8)
Recommended usage condition of PDP module is limited to the general usage. Within
this range, the electrical characteristics of all components are guaranteed.
Semiconductors should be used within specified usage range. Usage out of the range will
result in decrease of reliability and defects in devices. If the usage or operating condition
is out of specification specified on the data sheet, it will be not covered from the
guaranteed range. If you were to use the product in the environment not stated in the list,
you should consult with SAMSUNG SDI prior to the usage.
(9)
When the PDP module shows fixed pattern, there are possibilities of having the image
retention (the difference in brightness between turned-on and turned-off portion of screen
due to the different temperature and discharge) and image sticking (the difference in
brightness due to phosphor deterioration). To ensure the screen performance, we suggest
using the visual display area of PDP module and performing the following methods.
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A.
If the customer is required to use the fixed pattern, reduce the maximum brightness
as low as possible, change the position of the displayed area or display the screen
saver or moving picture periodically.
B.
If possible, change the displayed color to equalize the total displayed time for each
cell.
(10)
In system design and evaluation process, you should consider the maximum brightness
level (image retention and image sticking).
(11)
The PDP screen is displayed by image data signals and synchronized signals. If noise
interferes with the signals, the PDP screen could be unstable. Thus, when you design, you
should take measures to minimize the affects of noise
(12)
For preventing from occurring condensation that consists of small drops of water which
form when warm water vapor in the air touches a cold surface such as a panel glass
moved from cold condition, the module need to be left in the room temperature for
minimum 8 hours in box condition before use.
(13)
The customer has to consider their packing box to prevent from occurring condensation
during delivery to the End User from their packing material design stage.
(14)
SAMSUNG SDI PDP module is a product for the computer, office automation, other
office supplies, industry and communication, measurement devices, personal and home
appliances. However, if you need to use the PDP module in particular situations, such as
defective or abnormal operations can directly affect human life, injuries and damages in
property could be caused, and high level of reliability is required (aerospace equipments,
nuclear control systems, vehicle controls, life-supporting medical devices, etc.), you
should consult with SAMSUNG SDI beforehand. SAMSUNG SDI will not take any
responsibility for the problems and defects occurred in the course of usage without prior
approval of SAMSUNG SDI
(15)
Based on the requirements of the safety standard (UL, EN etc.), be sure to add the filter
that come up to the impact test to the glass plate
□
Notice to the operation and handling of the Module
(1)
To prevent defect or failure, please check the cable connections and power-supply
condition before power-on.
(2)
The Module is controlled by high voltage. Not only during operation but also
immediately after power-off, do not disconnect or reconnect the Module's connector
because it may result in failure. If you need to disconnect or reconnect, you have to wait
at least one minute after power-off.
(3)
The Module is equipped with various protection circuits that automatically stop the
Module operation, if an interface signal or the power voltage becomes abnormal during
operation. If the Module stops suddenly during operation, please check the conditions of
input signal or power source before restarting.
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(4)
For the protection of the circuit, if an abnormal situation is occurred, the high output
voltage will be shut down by (watching) the internal input voltage (Vs/ Va/ Vcc). In this
case, the Module power resetting is necessary to recover. There are also fuses in the Vs
and Va power supply system to prevent smoking and firing by the excessive current. The
protecting function of the address driver of keeping a supervisory device for the internal
current is provided in the Va power supply system. Therefore, the number of sub-frames
decreases to a proper value when the Ia current exceeds a constant value occasionally.
(5)
If an abnormal situation such as disconnecting of the input connector occurs, this Module
will be on stand-by, which the supply of high output voltage is stopped even if an
external power is being supplied. If a normal signal is inputted after this, normal
operation state, operations can be restarted again by re-inputting a normal signal.
However, it is necessary to rest the Module power when tVH and/or tHV are less than
the minimum value provided in the specification
(6)
To ensure reliable operation of the Module and to protect it from overheating, do not
wrap or cover it with a cloth or like a sheet during power-on period. Also, do not place
the Module in a confined space or any other places of poor ventilation.
(7)
If you continue to watch the naked screen (without filter glass) for a long time, your eyes
could be fatigued. We recommend you rest your eyes occasionally. However, according
to the information currently available, watching PDP module for a long time does not
cause a direct harm to your eyes.
(8)
The screen is controlled with the display-data signals and synchronized signals. If noise
interferes with those signals, the screen could become unstable and, in some case, would
cause a failure. Do not place any equipment that generates excessive EMI/RFI noise near
the interface cable of the Module, and keep the cables as short as possible.
(9)
Be careful not to break the glass panel when you handle the Module. Also, when
handling the Module, you must wear gloves or other hand protection to prevent injuries
that can occur in case when the glass panel is broken.
(10)
The glass panel section and drive circuit section of the Module are closely connected and
they function as a pair. If the Module is arbitrarily recombined, restructured, or
disassembled, SDI will not be responsible for the function, quality, or operational
integrity of the modified Module. Do not recombine, restructure, or disassemble it. (Only,
the Module for A/S is allowed to be recombined, restructured, or disassembled.)
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(11)
To avoid a possible electric shock, you must make sure that the power supply voltage of
Module is turned off before cleaning. To clean the module’s glass panel, apply water or a
natural detergent to a piece of soft cloth or gauze, and wring the cloth tightly before
wiping the screen. Make sure that no water comes in contact with the connecting
terminals on the side of the glass panel. Do not use chemical solvents, such as paint
thinner or benzene, to clean the glass panel.
(12)
The drive circuit section of Module uses C-MOS integrated circuits that must be
protected from static electricity. Therefore, when transporting or delivering the Module,
be sure to put the Module in an antistatic bag. When handling the Module, take adequate
grounding precautions to prevent static electricity.
(13)
When delivering or transporting the Module, you must take special precautions because
excessive vibration or shock should not be applied to it. If the Module is dropped, or (if)
excessive vibration/shock is applied, the glass panel of the Module may be broken and
the drive circuit may be damaged. The packing for delivering or transporting should be
made with strict instructions.
(14)
The information and schematics shown in this specification are just examples of display
applications; it does not mean that they must be applied to your device for the actual use.
SAMSUNG SDI does not take any responsibility for the infringement of patent or any
other intellectual rights arising from the use of the information or schematics in the
document.
(15)
If any part or technology of the product described in this specification become subject to
restrictions on export or any related laws or regulations, a prior permission is required
before exporting.
(16)
The PDP module uses semiconductor devices. Since semiconductors are very sensitive to
static electricity, the following requirements should be conformed during delivering,
transferring and handling the PDP module: Remove the static electricity on your body by
wearing the earth-ring which must be connected to the ground through high resistor
(about 1M Ohm). It is recommended to wear the conductive clothes and shoes, use
conductive floor mats, and take other measures to minimize the static electricity. All the
equipments and tools must be connected to the ground and protected from static
electricity. When you deliver or transfer the PDP module, always use anti-static bag.
(17)
If any device that can generate the high-voltage is located nearby the PDP module, it
could cause an abnormal operation. In such a case, you should take a countermeasure to
prevent against static electricity and discharges.
(18)
If the PDP module is exposed to corrosive gases or contacted to oil, it could cause
chemical reactions and give unfavorable effects on the devices. If you intend to use the
PDP module under such conditions, you must consider the ways to avoid exposure or to
protect the PDP module before using it.
(19)
The PDP module is not designed to endure radiation or cosmic radiation. Users must
install the proper shielding.
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(20)
The PDP module uses thermo-plastic devices. Since these devices are easy to be damaged,
do not use the PDP module nearby inflammable substances. If they are burnt, poisonous
gas will be emitted.
(21)
To ensure the normal operation of the PDP module, the recommended operating range
should be required. The electrical properties of the PDP module are guaranteed only
when it is used within the recommended operating range. The PDP module must be used
within the range at all time. If you use it out of the range, it could give adverse effects on
its reliability or cause defects.
(22)
Flexible cables connect electrodes on the panel glass and PCBs. Thus, do not apply too
much stress such as shock, vibration, pressure, or bending, to the surface of panel glass,
PCBs and flexible cables.
(23)
If there is no special notice, the contents of this specification describe the product with
the initial parameters after shipment.
(24)
Even if the panel glass is cleaned before shipping, there is a possibility of particle
remained on the panel. In this case, remove it prior to the usage. When you clean the
surface of the panel glass, use a piece of soft cloth with detergent to wipe off. Do not use
any chemical substances such as acid, alkali or organic detergent.
(25)
The Module is composed of various kinds of materials such as glass, metals and plastics.
A qualified service technician is required for the disposal of the Module.
.
□
Notice to the storage of the Module
(1)
When storing the Module, you must select an environmentally controlled place. Avoid any
environment in which the temperature or humidity exceeds the specification values. If you
are storing it for a long period of time, we recommend that you place the Module together
with a dehumidifying agent, such as silica gel, in a moisture-proof bag and keep it in an
environmentally controlled place.
(2)
If the module is stored for a long time, the discharge might not take place smoothly. In
this case, aging approximately for minimum 2 hours with a full white pattern is suggested.
Do aging once in every 6 months.
(3)
Do not place the PDP module in the environment with a rapid temperature change in order
to avoid the condensation inside of the module.
(4)
Do not open the packages at dusty place or the place where corrosive gases exist.
(5)
Only qualified person can transfer the PDP module with a forklift or crane.
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□
Notice to the repairing and fixing of the Module
The PDP module is a product made with various tests and adjustments hence, repairing and
fixing of PDP module is not allowed to conduct at customer’s place. The issue must be handled
separately from the specifications.
□
Notice of the Module performance
The Module is the newest display device utilizing the gas discharge technology and digital signal
processing technology, and its performances are mostly similar to those of CRT. However, some
display performances of the PDP module are different from the CRT's. Please consider the
following notices when you watch the screen.
(1)
There is (a) slight Neon luminance shown outside of the effective display area on the
glass panel. Conceal these parts so that it may not be seen on the display surface.
(2)
Depending on the type and time of usage, there may be a slight change in the Luminance
and color. There may be an increase of both X-value and Y-value by 0.05 at the
maximum in chromaticity. In this case, adjust it using the external data signal.
(3)
Because the Module uses phosphor to emit a light, the phosphor, like a CRT, will be
deteriorated in proportion to the display signal and Luminance settings. If the same
pattern is displayed continuously (fixed display) for an extended period of time, the
Luminance of that area will be decreased over non-lit areas due to the fact that the
discharge surface will be more activated comparing to the other areas.
(4)
When the Vsync signal timing becomes shorter right after the changing of Vsync
frequency (e.g. from 50
Vsync signal of the changed frequency will be disregarded and the screen will be
interrupted for 1 frame period in maximum.
(5)
Because the Module is a digital processing display device, this Module is equipped with
the Error diffusion technology and a Duplicated Sub-Frame method to display the
grayscale and false contour improvement. However, you may sometimes find a color
false contour, especially in human facial contour, in moving picture due to the difference
of display performance comparing to the TV-tube.
(6)
If the Module displays some video test patterns that are mostly used in a laboratory or
inspection process of the manufacturing facilities, you may find the following subjects.
But these subjects should not be recognized in the failure or defects because the display
performance of the Module is equipped with Error diffusion technology and Duplicated
Sub-Frame method (for PAL) based on digital processing technique.
(a) Linearity in the grayscale test pattern
If the PDP module displays the grayscale test pattern (e.g. white color Luminance
is gradually changed horizontally or vertically) in a screen, you may find the
disparity of Luminance at adjacent grayscale patterns. This behavior is caused by
㎐ to 60 ㎐ ) depending on the Multi-Vsync function, an initial
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SAMSUNG SDI Corporation Plasma Display Panel
duplicated sub-frame condition (for PAL), display load correction and electroad
dependency.
(b) Color contouring and dithering at the stationary picture
If the stationary picture such as a human face or the like is shown in the screen,
you may feel some unstable noise at the contour area. This behavior is called the
color contouring or dithering, and is caused by the error diffusion condition,
display load correction and electroad dependency.
(7)
If the Module is operated under inadequate conditions or harsh environment, the screen
may become unstable or noisy. This instability is mostly related to ambient temperature,
air pressure, input signal instability (include signal noise), input power voltage and strong
magnetic field such as MRI/NMR application or superconducting magnet application.
Please do not apply the Module to inadequate conditions or harsh environment mentioned
above.
□
PDP DESIGN GUIDELINES AGAINST CORROSIVE GASES/HIGH HUMIDITY
During the PDP development stage, some materials which may generate corrosive gas(es) or
ions such as sulfur, sodium, and chlorine, etc must not be allowed to use in the modules. If
the material mentioned above is used or located close to the address terminals, chemical
reaction may occur and cause the modules to fail.
If customer wishes to use some materials due to unavoidable cause, then safe gap between
address terminals and the material(s) which may generate corrosive gas(es) is minimum
5mm or customer must keep or deliver PDP always in room temperature and room humidity
state at any cases.
It is a mandatory guide line to protect the modules from corrosive gases or ions. If some
material contains sulfur, sodium (natrium) and chloride, then Samsung SDI strongly
suggests customer to keep the guidelines.
The weight of material containing sulfur must be no more than 300ppm.
The analysis of the sulfur weight is based on the normalized "ICP-AES" method.
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