SAMSUNG S50HW-YD04 Specification
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FOR MESSRS: DATE : July 25, 2007
CUSTOMER’S SPECIFICATIONS
126.9cm(50 Inch) Wide Plasma Display Module
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(Approval)
MODEL : S50HW-YD04
(NTSC/PAL)
* This specification will be approved by both Customer and Samsung SDI Co.,Ltd.
* Please return one of this specifications with your signature for approval.
Proposed by: Approved by:
Signature
Signature .
Vice President Sung Do, Kim
PDP Quality Innovation Team,
PDP Division, Samsung SDI Co., LTD
CONFIDENTIAL
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SamsungSDI Corporation Specification Plasma Display
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No. Date Description Of Changes Rev. No Approval
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Revision History
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CONTENTS
1 DESCRIPTION..........................................................................................................5
2 FEATURES ................................................................................................................ 5
3 PRODUCT NAME AND MODEL NUMBER........................................................5
4 FUNCTION OUTLINE.............................................................................................5
5 BLOCK DIAGRAM..................................................................................................6
6 DISPLAY CHARACTERISTICS............................................................................7
6.1
6.2
GENERAL SPECIFICATION.......................................................................................7
6.1.1 Opto-Electric Specifications........................................................................................... 7
GAMMA CHARACTERISTICS ....................................................................................7
7 MECHANICAL PERFORMANCE.........................................................................8
7.1
7.2
MECHANICAL SPECIFICATIONS ..............................................................................8
MECHANICAL TEST METHOD.................................................................................9
8 ENVIRONMENTAL PERFORMANCE ..............................................................10
8.1
8.2
OPERATION ...........................................................................................................10
STORAGE ...............................................................................................................10
9 INTERFACE SIGNAL SPECIFICATION...........................................................11
9.1
9.2
9.3
9.4
9.5
9.6
INTERFACE CONNECTION DIAGRAM ....................................................................11
SIGNAL DEFINITION AND FUNCTION ....................................................................11
9.2.1 8 Bit Definition ............................................................................................................. 11
9.2.2 10Bit Definition ............................................................................................................ 12
9.2.3 12Bit Definition ............................................................................................................ 12
9.2.4 13Bit Definition ............................................................................................................ 13
LVDS CONNECTOR PIN ASSIGNMENTS ...............................................................13
ELECTRICAL CHARACTERISTICS..........................................................................14
9.4.1 Absolute Maximum Ratings.......................................................................................... 14
9.4.2 Electrical Characteristics............................................................................................. 14
VIDEO SIGNAL INTERFACE TIMING SPECIFICATIONS..........................................15
I2C INTERFACE CONDITION .................................................................................17
9.6.1 Basic Specifications.......................................................................................................... 17
9.6.2 I2C Ready Signal.............................................................................................................. 17
9.6.3 Data Validity .................................................................................................................... 17
9.6.4 Start & Stop Condition ..................................................................................................... 17
9.6.5 Acknowledge..................................................................................................................... 17
9.6.6 7-Bit Addressing for Device address ................................................................................ 18
9.6.7 16-Bit Mode ...................................................................................................................... 18
9.6.8 Data Transfer Sequence (Write)....................................................................................... 18
9.6.9 Data Transfer Sequence (Read) ....................................................................................... 19
9.6.10 Interface Circuit Diagram .............................................................................................. 19
9.6.11 I2C Bus Timing Specifications ....................................................................................... 20
10 ADDRESS MAP.......................................................................................................21
10.1 ADDRESS MAP .......................................................................................................21
10.2 DETAILS OF SETTINGS...........................................................................................22
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INPUT POWER VOLTAGE SPECIFICATIONS ...............................................23
11
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11.1 ELECTRICAL CHARACTERISTIC OVERVIEW FOR PDP MODULE VOLTAGES .....23
11.2 ELECTRICAL CHARACTERISTIC OVERVIEW FOR IMAGE VOLTAGES ..................23
11.3 OUT DIMENSION FOR REFERENCE ........................................................................23
11.4 POWER APPLYING SEQUENCE...............................................................................24
11.5 PIN ASSIGNMENT OF CONNECTORS FOR POWER SUPPLY .....................................28
11.6 MECHANICAL OUT DRAWING...............................................................................29
12 ABEL.........................................................................................................................30
12.1 LABEL TYPE ..........................................................................................................30
12.1.1
12.1.2
12.1.3
12.1.4
Label for Product ..................................................................................................... 30
Label for Operating Voltages................................................................................... 30
Caution/Warning Label............................................................................................ 31
Label for PANEL Serial Number ............................................................................. 31
12.2 LABEL LOCATION ..................................................................................................31
13 PACKING.................................................................................................................33
13.1 PACKING DIMENSION AND PARTS LIST ................................................................33
13.2 PACKING ASSEMBLY DRAWING ............................................................................33
14 RELIABLITY ..........................................................................................................34
14.1 EXPECTED SERVICE LIFE......................................................................................34
14.1.1
14.1.2
Definition.................................................................................................................. 34
Test condition and life time ...................................................................................... 34
14.2 DISCLAIMER ..........................................................................................................34
15 WARNING / CAUTION / NOTICE ......................................................................35
15.1 WARNING...............................................................................................................35
15.2 CAUTION ................................................................................................................36
15.3 NOTICE ..................................................................................................................37
16 ADDITIONAL SPECIFICATIONS.......................................................................43
16.1 OPTO-ELECTRIC SPECIFICATIONS .......................................................................43
16.2 ENVIRONMENTAL PERFORMANCE ........................................................................43
16.3 CELL DEFECTS ......................................................................................................43
16.3.1
16.3.2
Classification............................................................................................................ 43
Specifications ...........................................................................................................43
APPENDIX.......................................................................................................................45
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1 DESCRIPTION
This model is a 50-inch wide full color plasma display module with a resolution of
1,366(H)× 768(V) pixels. The display module includes the Plasma Display Panel(PDP),
the Panel driving electronics and the Logic Controller.
2 FEATURES
x Wide aspect ratio(16:9) 50inch diagonal display screen. The display area is 1106.48
wide and 622.08㎜ high.
x Slim and light weight. The display module is 63.6㎜ in depth and weights only
approx.24.5㎏ include power supply.
x 549755.81 million colors(13Bit), 68719.47 million colors(12Bit), 1073.7 million
colors(10Bit), or 16.77 million colors(8Bit) combination of R,G and B digital data.
x High brightness, High contrast, Wide viewing angle. The screen has a white peak
brightness of typical 950cd/㎡ , contrast of typical 8,000:1 at 60Hz. And a viewing angle
of greater than 160° comparable to those of CRTs.
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㎜
3 PRODUCT NAME AND MODEL NUMBER
x Product name : 50-inch Full Color Plasma Display Module (Abbreviation : PDP module)
x Model number : S50HW-YD04
4 FUNCTION OUTLINE
x The plasma display Module has an APC(Automatic Power Control) function which
restricts power consumption within the certain value with regard to each display load
ratio.
x The plasma display Module is operated by following digital video signals; Vertical
synchronous signal, Horizontal synchronous signal, DLCK and 8bits/10bits/12bits/13bits
data signal of each R,G, and B color. All signals are based on LVDS level.
x The plasma display Module is operated at 50Hz or 60Hz frame rate. An external frame
rate conversion is required in order to display the other formats.
x The PDP module requires several types of input voltage; voltage for LOGIC control
board, Y-driver board, X-driver board and address buffer board.
x The plasma display Module is operated at progressive signal only. An external
progressive scan conversion is required in order to display the other formats.
x The plasma display Module requires rated 100~240V, 50~60Hz of input power voltage.
Maximum input voltage rating is AC 90~264V.
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5 BLOCK DIAGRAM
LOGIC CONTROL
R-Data
DATA_R
8,10,12,13Bits
8,10,12,13Bits
8,10,12,13Bits
8Bits
G-Data
DATA_G
8Bits
B-Data
DATA_B
8Bits
DCLK
DCLK
VSYNC
Vsync
HSYNC
Hsync
DEN
Enable
LVDS
Interface
Input Data P rocessor
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Disp lay
DRAM
Data
Data Controller
Timing Controller
Driver
Timing
Driver
Scan
Timing
Driver
Row
Generator
YPulse
DRIVER CI RCUIT & PANEL
1366×768 Pixels
1366×3×768 Cells
Colum n D river
Generator
XPulse
Vcc
Vset Vsc
R e fe re n c e
-3V3 : Voltage for Logic Control
-Vcc : Voltage for FET driver
-Va : Voltage for address pulse
-Vs : Voltage for sustain pulse
-Vsc : Voltage for scan pulse
-Ve : Voltage for X ramp pulse
-Vset : Voltage for Y ramp pulse
Figure-1. Block Diagram of PDP module
3V3
VsVa
Ve
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㎡
㎡
±
±
SamsungSDI Corporation Specification Plasma Display
Module
6 DISPLAY CHARACTERISTICS
6.1 General Specification
6.1.1 Opto-Electric Specifications
ITEM Condition 60Hz 50Hz Unit
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Peak Brightness 1% white window
Full White Brightness Full white
1
DRCR
Power Consumption Full white
Viewing Angle2 Full white 160 160 Degree
Sound Pressure Noise Level 1m, F/White, 50~8kHz 32 32 dBA
Tvsync margin
1% white window
Min : 900
Typ : 950
Min : 120
Typ : 150
Min :3000:1
Typ :8,000:1
Typ : 420
Max : 462
2
Min : 900
Typ : 950
Min : 120
Typ : 150
Min :4000:1
Typ :5000:1
Typ : 420
Max : 462
2
6.2 Gamma characteristics
The PDP module is normally applied to the 2.2 gamma curve.
cd/
cd/
-
W
Hz
Figure 2 - Normalized Gamma Curve
1
DRCR : Dark Room Contrast Ratio.
2
It is the angle that meets 50% brightness level from center on full white pattern.
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7 MECHANICAL PERFORMANCE
7.1 Mechanical Specifications
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Outer Dimension
Width
Heigh t
Thickness
Weight Approximatly 24.5kg
1,184 ± 2
700 ± 2
63.8 +2 -0
㎜
㎜
㎜
Figure 3 – Mechanical Dimension of Front Side
Figure 4 - Mechanical Dimension of Rear Side
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7.2 Mechanical Test Method
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Frequency 10 ~ 55 Hz
Vibration
Shock
1
Stroke
2
Acceleration
Sweep Rate 1 Octave/min
X,Y direction 0.35 mm
Z direction 0.175 mm
X,Y direction less than 20G
Z direction less than 10G
Duration Time 11 ms
The directions of X-, Y- and Z-axis are as shown in Figure5. The positive X direction is
towards the left-side in the front view (to the right side in rear view); the positive Y and
Z are up ward and front-to-rear direction respectively.
Figure5 – Test directions
1
Vibration test shall be done for 30min every direction(x,y,z)
2
Shock test shall be done 6 times every direction(x,y,z)
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ć
ć
℃
SamsungSDI Corporation Specification Plasma Display
Module
8 ENVIRONMENTAL PERFORMANCE
8.1 Operation
ITEM
Temperature 5 ~
Humidity
8.2 Storage
ITEM Rating
Temperature
Humidity 5 ~ 85% RH
Air Pressure 307 ~ 1013 hPa
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Rating
Recommended Absolute maximum
1
20 ~ 70% RH 20 ~ 80% RH
40ć 0 ~
-20
~ 70℃
60ć
1
PDP Module shall not show condensation.
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9 INTERFACE SIGNAL SPECIFICATION
PDP Module uses an LVDS interface for the signal input. It is defined as like below.
For details, refer to the data sheets published by the LVDS transmitter IC maker.
9.1 Interface Connection Diagram
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NOTE Do not connect or disconnect the LVDS connector when the system power is on.
Otherwise, the LVDS interface IC could be damaged.
The length of connecting LVDS cable between image board and logic board is
recommended not to be longer than 25.0cm.
9.2 Signal Definition and Function
A video signal (display data signal and control signal) is converted from parallel data to
serial data with the LVDS transmitter and further converted into four sets of differential
signals before input to this PDP module. These signals are transmitted seven times
faster than dot clock signals. The dot clock signal is converted into one set of
differential signals.
The LVDS signal definition and function are as follows in Italic:
9.2.1 8 Bit Definition
Symbol I/O Function Remarks
RxIN0- I LVDS signal
RxIN0+ I
RxIN1- I LVDS signal
RxIN1+ I
LVDS1
SDA I/O I2C serial data 3.3V CMOS
SCL I Clock signal for SDA 3.3V CMOS
I2C_READY O I2C enable signal 3.3V CMOS
RxIN2- I LVDS signal
RxIN2+ I
RxIN3- I LVDS signal
RxIN3+ I
RxCLKin- I LVDS signal
RxCLKin+ I
Display Data Signal:
R0, R1, R2, R3, R4, R5, G0
Display Data Signal:
G1, G2, G3, G4, G5, B0, B1
Display Data Signal:
B2, B3, B4, B5, Hsync, Vsync, DEN
Display Data Signal:
R6, R7, G6, G7, B6, B7
Dot Clock Signal:
CLK
LVDS signal
LVDS signal
LVDS signal
LVDS signal
LVDS signal
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9.2.2 10Bit Definition
Symbol I/O Function Remarks
RxIN0- I LVDS signal
RxIN0+ I
RxIN1- I LVDS signal
RxIN1+ I
LVDS1
LVDS2
SDA I/O I2C serial data 3.3V CMOS
SCL I Clock signal for SDA 3.3V CMOS
I2C_READY O I2C enable signal 3.3V CMOS
RxIN2- I LVDS signal
RxIN2+ I
RxIN3- I LVDS signal
RxIN3+ I
RxCLKin- I LVDS signal
RxCLKin+ I
RxIN4- I
RxIN4+ I
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Display Data Signal:
R2, R3, R4, R5, R6, R7,G2
Display Data Signal:
G3, G4, G5, G6, G7, B2, B3
Display Data Signal:
B4, B5, B6, B7, Hsync, Vsync, DEN
Display Data Signal:
R8, R9, G8, G9, B8, B9
Dot Clock Signal:
CLK
Display Data Signal:
R0, R1, G0, G1, B0, B1
LVDS signal
LVDS signal
LVDS signal
LVDS signal
LVDS signal
LVDS signal
LVDS signal
9.2.3 12Bit Definition
Symbol I/O Function Remarks
RxIN0- I LVDS signal
RxIN0+ I
RxIN1- I LVDS signal
RxIN1+ I
LVDS1
LVDS2
SDA I/O I2C serial data 3.3V CMOS
SCL I Clock signal for SDA 3.3V CMOS
I2C_READY O I2C enable signal 3.3V CMOS
RxIN2- I LVDS signal
RxIN2+ I
RxIN3- I LVDS signal
RxIN3+ I
RxCLKin- I LVDS signal
RxCLKin+ I
RxIN4- I LVDS signal
RxIN4+ I
RxIN5- I LVDS signal
RxIN5+ I
Display Data Signal:
R4, R5, R6, R7, R8, R9, G4
Display Data Signal:
G5, G6, G7, G8, G9, B4, B5
Display Data Signal:
B6, B7, B8, B9, Hsync, Vsync, DEN
Display Data Signal and Control Signal:
R10, R11, G10, G11, B10, B11
Dot Clock Signal:
CLK
Display Data Signal:
R2, R3, G2, G3, B2, B3
Display Data Signal:
R0, R1, G0, G1, B0, B1
LVDS signal
LVDS signal
LVDS signal
LVDS signal
LVDS signal
LVDS signal
LVDS signal
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uU
ZX
uUZWGuU
uUX
SamsungSDI Corporation Specification Plasma Display
Module
9.2.4 13Bit Definition
Symbol I/O Function Remarks
RxIN0- I LVDS signal
RxIN0+ I
RxIN1- I LVDS signal
RxIN1+ I
LVDS1
LVDS2
SDA I/O I2C serial data 3.3V CMOS
SCL I Clock signal for SDA 3.3V CMOS
I2C_READY O I2C enable signal 3.3V CMOS
RxIN2- I LVDS signal
RxIN2+ I
RxIN3- I LVDS signal
RxIN3+ I
RxCLKin- I LVDS signal
RxCLKin+ I
RxIN4- I LVDS signal
RxIN4+ I
RxIN5- I LVDS signal
RxIN5+ I
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Display Data Signal:
R5, R6, R7, R8, R9, R10, G5
Display Data Signal:
G6, G7, G8, G9, G10, B5, B6
Display Data Signal:
B7, B8, B9, B10, Hsync, Vsync, DEN
Display Data Signal and Control Signal:
R11, R12, G11, G12, B11, B12, R0
Dot Clock Signal:
CLK
Display Data Signal:
R3, R4, G3, G4, B3, B4, G0
Display Data Signal:
R1, R2, G1, G2, B1, B2, B0
LVDS signal
LVDS signal
LVDS signal
LVDS signal
LVDS signal
LVDS signal
LVDS signal
9.3 LVDS Connector Pin Assignments
PIN No PIN NAME PIN No PIN NAME PIN No PIN NAME
1 GND
2 GND
3 Rx0- 13 GND 23 Rx44 Rx0+ 14 GND 24 Rx4+
5 GND 15 RxCLK- 25 N.C.
6 GND 16 RxCLK+ 26 GND
7 Rx1- 17 N.C. 27 SCL
8 Rx1+ 18 N.C. 28 GND
9 Rx5- 19 Rx3- 29 SDA
10 Rx5+ 20 Rx3+ 30 GND
NOTES:
1. CN2006 connector is located in Logic Board.
2. Pin to Pin pitch of connector CN2006 is 0.625㎜.
3. Pin numbering order : right to left view from component side of Logic Board.
.
11 Rx2- 21 GND
12 Rx2+ 22 I2C_READY
Y
G
31 N.C.
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9.4 Electrical Characteristics
9.4.1 Absolute Maximum Ratings
Parameter Condition Symbol Ratings Unit
LVDS
3.3V CMOS
9.4.2 Electrical Characteristics
Common conditions : Ta =25℃, Vcc = 3.3V
Parameter Symbol Conditions Min. Typ. Max. Unit
High Level Input
Voltage
LVDS
I2C
Low Level Input
Voltage
Input current Iin
Input Capacitance Vin - - - 8
Output Voltage
Output Current Iol - - - 10
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RxIN0-/+, RxIN1-/+,
Rx
IN2-/+, RxIN3-/+,
RxIN4-/+, RxIN5-/+,
RxCLKin-/+
SCL, SDA
I2C_READY
Vth VCM=1.2V - - 100
Vtl VCM=1.2V -100 - -
Vih 0.5×Vcc - 4.1 VInput Voltage
Vil -0.5 - 0.3×Vcc V
Voh Ioh = 8
Vol - - - 0.4 V
Common conditions : Ta = 25℃, Vcc = 3.3V
Input Voltage Vi -0.3~3.6 V
Input Current Ii -10~10
Input Voltage Vi -0.3~3.6 V
Output Voltage Vo -0.3~3.6 V
VIN=
+3.6V/GND
㎃
- - ±10.0
2.4 - - V
㎂
㎷
㎷
㎂
㎊
㎃
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