Samsung S1T8825X01-R0B0 Datasheet

PRELIMINARY ( VER.2.1 )
1.1GHZ DUAL PLL S1T8825
INTRODUCTION
16TSSOP0044
The S1T8825 is a high performance dual frequency synthesizer with two integrated high frequency pre-scalers for RF operation up to 1.1 GHz. The S1T8825 is composed of modulus pre-scalers providing 64 and 66, no dead-zone PFD, selectable charge pump current, selectable power down mode circuits, lock detector output, and loop filters time constant switch. It is fabricated using the ASP5HB Bi-CMOS process and is available 16-TSSOP with surface mount plastic packaging. Serial data is trans­ferred into the S1T8825 via three-wire interface (CK, DATA, EN).
FEATURES
Two systems for receiver and transmitter
Very low operating current consumption: Icc = Typ. 5.5mA @ 3.0V
Low operating power supply voltage : 2.2 ~ 5.5V ( 200MHz ~ 550MHz Operating )
2.7 ~ 3.6V ( 550MHz ~ 1.1GHz Operating )
Modulus pre-scaler: 64 / 66
No dead-zone PFD
Colpitts type local oscillation
Selectable charge pump current
Selectable power down mode
TSSOP 16-pin package (0.65 mm pitch)
ORDERING INFORMATION
Device Package Operating Temperature
+S1T8825X01-R0B0 16TSSOP0044 30 °C to + 85 °C
+: New Product
APPLICATIONS
Cordless telephone systems
Portable wireless communications (PCS)
Wireless Local Area Networks (WLANs)
Other wireless communication systems
1
PRELINIMARY( VER.2.1 )
S1T8825 1.1GHZ DUAL PLL
BLOCK DIAGRAM
1
Fin1
2
V
CC
CP1
3
4
GND
5
LD
6
CK
7
DATA
8
EN
PIN CONFIGURATION
Pre_Amp 1/2
Charge
Pump
Phase
Detector
Lock
Detector
Control
Circuit
2
6
Prescaler
1
32, 33
Buffer
Channel 1
Program-
able
Divider
17 12
Prescaler
1
32, 33
Buffer
Channel 2
Program-
able
Divider
Reference
Divider
1/2 Pre_Amp 1615Fin2
V
CC
2
Charge
Pump
Phase
Detector
Switch
Local
OSC
1/2
Buffer
14
CP2
13
12
11
10
9
GND
SW
OSCI
OSCO
BO
Fin1
V
CC
CP1
GND
LD
CK
DATA
EN
1
2
3
4
KB8825
5
6
7
8
S1T8825
16TSSOP
16
15
14
13
12
11
10
Fin2
V
CC
CP2
GND
SW
OSCI
OSCO
9
BO
2
PRELIMINARY ( VER.2.1 )
1.1GHZ DUAL PLL S1T8825
PIN DESCRIPTION
Pin No. Symbol I/O Description
1 Fin1 I Input terminal of channel 1 RF signal. 2, 15 Vcc Power supply voltage input. PIN2 and PIN15 are connected together. 3 CP1 O Output terminal of channel 1 charge pump. Charge pump is constant current output
circuit, and output current is selected by input serial data. 4, 13 GND Terminal of GND. PIN4 and PIN13 are connected together. 5 LD O Output terminal of lock detection. It is the open drain output. 6 CK I Input terminal of clock. 7 DATA I Input terminal of data. 8 EN I Input terminal of enable signal. 9 BO O Output terminal of buffer amplifier. The signal of local oscillation is output through the
buffer amplifier. 10 OSCO O Output terminal of local oscillation signal. 11 OSCI I Input terminal of local oscillation signal.
In case of external input, connecting it to this terminal. 12 SW O Switch-over terminal for the time constant of loop filter. It is an open drain output.
If you dont switch the time constant of loop filter, general output is available. 14 CP2 0 Output terminal of channel 2 charge pump. Charge pump is a constant current output
circuit, and the output current is selected by input serial data. 16 Fin2 I Input terminal of channel 2 RF signal.
ABSOLUTE MAXIMUM RATINGS
Characteristic Symbol Value Unit
Power Supply Voltage Vcc 6 V Power Dissipation P Operating temperature T Storage temperature T
Take care ! ESD sensitive device
D OPR STG
600 mW
30 — + 85 °C
55 — +150 °C
3
PRELINIMARY( VER.2.1 )
S1T8825 1.1GHZ DUAL PLL
ELECTRICAL CHARACTERISTICS
(Ta = 25°C, VCC = 3V, unless otherwise specified)
Characteristic Symbol Test Conditions Min. Typ. Max. Unit
Operating power supply voltage
Operating current consumption
Standby current I
V
I
Fin1=Fin2= 200MHz ~ 550MHz 2.2 3.0 5.5 V
CC
Fin1=Fin2= 550MHz ~ 1.1GHz 2.7 3.0 3.6 V Fin1=Fin2=1.1GHz/ -5dBm input 3.5 5.5 7.5 mA
CC
Standby mode 0 10 µA
SB
Fin operating frequency Fin Fin1 = Fin2 = 5dBm 200 1100 MHz
Vcc=2.2V 15 0
Fin1 = Fin2 = 200MHz
Vcc=3.0V 15 0 Vcc=5.5V 10 0 Vcc=2.2V 15 0
Fin input sensitivity Fin
Fin1 = Fin2 = 550MHz
Vcc=3.0V 15 0
dBm
Vcc=5.5V 10 0 Vcc=2.7V 10 0
Fin1 = Fin2 = 1.1GHz
Vcc=3.0V 10 0 Vcc=3.6V 10 0
OSCI operating frequency F
osc
V
= 0dBm, sinewave
Fin
5 - 25 MHz
Vcc = 2.2V 10 0 5
OSCI input voltage
Serial data input high voltage (CK, DATA, EN)
Serial data input low voltage (CK, DATA, EN)
Charge pump output current
Charge pump leakage I
V
V
V
I
CP1
I
CP2
I
CP3
I
CP4
CPL
f
= 10MHz
osc
Vcc = 3.0V 10 0 5 Vcc = 5.5V 0 - 5
osc
f
osc
= 20MHz
Vcc = 2.2V 10 0 5 Vcc = 3.0V 10 0 5 Vcc = 5.5V 5 0 5
V
V
IH
IL
= 2.2 to 5.5V
CC
V
= 2.2 to 5.5V
CC
CC
0.4
- V
0.4 V
CP1 = 0, CP2 = 0 VCP = 1.5 V ± 100 µA CP1 = 1, CP2 = 0 VCP = 1.5V ± 200 µA CP1 = 0, CP2 = 1 VCP = 1.5V ± 400 µA CP1 = 1, CP2 = 1 VCP = 1.5V ± 800 µA Standby mode, Vcp = 1.5V −1 +1 µA
dBm
4
PRELIMINARY ( VER.2.1 )
1.1GHZ DUAL PLL S1T8825
FUNCTIONAL DESCRIPTIONS
SERIAL DATA INPUT AND TIMING
CK (Pin6), DATA (Pin7), EN (Pin8) terminals in S1T8825 are used for MCU serial data interface (MSB: 1st input data; LSB: Last input data). Serial data controls the programmable reference divider, programmable divider (CH1), programmable divider (CH2), and control latch separately by means of group code. Binary serial data is entered via the DATA pin.
One bit of data is shifted into the internal shift register on the rising edge of the clock. When EN pin is high, stored data is latched. The three terminals, CK, DATA, and EN, contain Schmitt trigger circuits to keep the data from errors caused by noise, etc.
< Notice >
1. When power supply of S1T8825 is disconnected, CLK, DATA, EN port from MCU should be pulled low.
2. When power goes up first, R counter data should be entered earlier than N1 and N2 counter data.
3. When power goes up first, control data should be entered earlier than N1 and N2 counter data.
0.2us
0.1us
0.2us
LSB MSB
0.1us 0.2us
0.2us
DATA
EN
CK
1us 0.2us
MSB
N1 (R1) N2 (R2) N3 (R3) N16 (R11) N17 (R12) GC2 GC1
Figure 1.
NOTE: Start data input with MSB first
SERIAL DATA GROUP AND GROUP CODE
The S1T8825 can be controlled through 4 kinds of group selection. Each group is identified by selective a 2-bit group code given below.
Serial Bits Group Location
GC1 (LSB) GC2 (LSB-1)
0 0 Control Latch 0 1 Ch 1 N Latch 1 0 Ch 2 N Latch 1 1 OSC R Latch
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