SAMSUNG PDP4294, PDP4294SMS, PDP4294X, PDP4298ED1XSMS, PL42P3 Service manual & schematics

...
PLASMA DISPLAY TV
Chassis : D54B(N) Model: PL42P3SX/STR
PLASMA DIAPLAY TV CONTENTS
Specifications
Alignment and Adjustments
Exploded View and Parts List
Circuit Description
Troubleshooting
Schematic Diagrams
1.
2.
3.
4.
5.
6.
7.
ELECTRONICS
© Samsung Electronics Co., Ltd. JUL. 2003
Printed in Korea
AA82-00814A
This Service Manual is a property of Samsung Electronics Co.,Ltd.
Any unauthorized use of Manual can be punished under applicable
International and/or domestic law.
Specifications
Samsung Electronics 1-1
1. Specifications
MODEL
Display
Remote Control
Display
Remote Control
Screen Size
Voltage
Power Consumption
Number of Pixels
ANTENNA input
AUDIO Input
AUDIO Output
VIDEO Input
Dimensions
Weight
SPN4235
1027(W) x 79(D) x 630(H) mm / 40.43(W) x 3.11(D) x 24.82(H) inches
54(W) x 31.5(D) x 220(H) mm / 2.13(W) x 1.24(D) x 8.66(H) inches
31 Kg / 68.34 lbs (37.6Kg ; 82.89 lbs with stand)
150g (Including batteries) / 0.33lbs
107 Cm / 42 Inches
AC 120V, 60Hz
330 Watts
852(H) X 480(V)
VHF, UHF (75unbalanced)
VIDEO / S-VIDEO
COMPONENT 1
COMPONENT 2
PC (RGB)
DVI
10W + 10W (8Ω)
Subwoofer (500mv RMS at 1KHz)
VIDEO
S-VIDEO
COMPONENT 1 - 480i / 480p / 720p / 1080i
COMPONENT 2 - 480i / 480p / 720p / 1080i
RGB : D-SUB 15P
DVI
1-2 Samsung Electronics
MEMO
Alignment and Adjustments
Samsung Electronics 2-1
2. Alignment and Adjustments
2-1 Service Mode
2-1-1 SERVICE MODE Entry Method (General Transmitter)
For the General Transmitter
1. Turn the power off and set to stand-by mode.
2. Press the buttons of the transmitter in this order; Mute-1-8-2-Power to turn the set on.
3. The set turns on and enters service mode.
* If you fail to enter service mode, repeat steps 1 and 2 above.
2-1-2 Initial DISPLAY State of SERVICE MODE
2-1-2(A) OSD DISPLAY
2-1-2(B) B
utton Operations in SERVICE MODE
1. UPD64083 : COMB-FILTER
2. VPC3230(M) : MAIN VCD
3. VPC3230(S) : SUB VCD
4. FLI2200 : DEINTERLACER
5. ASI500 I : SCALER MAIN / OSD
6. ASI500 II : SCALER PIP
7. DNIe : PICTURE ENHANCER
8. CXA2151HD : COMPONENT MUX
9. AD9883 : A/D CONVERTER
10.LOGIC : PDP DRIVER
11.TP LOG-ASI : TEST PATTERN
12.OPTION TM_ALS42N02_001
13. RESET 02-12-10 09H
Menu Joystick UP/DOWN Joystick (LEFT/RIGHT)
Displays all menus Cursor move to select items Enable to increase and decrease the data of the selected items
SERVICE MAIN
Alignment and Adjustments
2-2 Samsung Electronics
2-1-3 Factory Data by Mode
2-1-3(A) UPD64083 : TV-AV
ITEM
VAPGAIN
VAPINV
YPFP
YPFG
4
16
3
9
TV/VIdeo/S-Video/Component1,2(SD)
4
16
3
9
4
16
3
9
4
16
3
9
Component1,2(HD) PC DVI
ITEM
CONTRAST
BRIGHTNESS
PEAKING
CORING
LUMA DELAY
HPLL SPEED
YUV CONTRAST
YUV BRIGHTNESS
YUV SATCB
YUV SATCR
YUV TINT
SATURATION
TINT
TV/VIdeo/S-Video/Component1,2(SD)
43
27
5
0
255
1
29
68
42
42
3
2000
32
43
27
5
0
255
1
29
68
42
42
3
2000
32
Component1,2(HD) PC DVI
2-1-3(B) VPC3230 : TV-COMP
43
27
5
0
255
1
29
68
42
42
3
2000
32
43
27
5
0
255
1
29
68
42
42
3
2000
32
Alignment and Adjustments
Samsung Electronics 2-3
2-1-3(C) VPC3230(S) TV COMP
2-1-3(D) FLI2200 : TV-COMP
ITEM
PIP CONTRAST
PIP BRIGHTNESS
YUV CONTRAST
YUV BRIGHTNESS
LUMA DELAY
H POSITION
V POSITION
TV/VIdeo/S-Video/Component1,2(SD)
43
27
29
68
255
0
0
Component1,2(HD) PC DVI
43
27
29
68
255
0
0
43
27
29
68
255
0
0
43
27
29
68
255
0
0
ITEM
Y CLAMP
C CLAMP
Y DELAY
C DELAY
MOTION DETECT
TV/VIdeo/S-Video/Component1,2(SD)
0
512
4
11
48
Component1,2(HD) PC DVI
0
512
4
11
48
0
512
4
11
48
0
512
4
11
48
Alignment and Adjustments
2-4 Samsung Electronics
2-1-3(E) ASI500 I : ALL (EXCEPT SUB CONT/BRIGHT)
ITEM
R CONTRAST
G CONTRAST
B CONTRAST
R BRIGHTNESS
G BRIGHTNESS
B BRIGHTNESS
TEXT ALPHA
TEXT THRESHOLD
FILTER ML
FILTER MR
FILTER FR
FILTER MC
FILTER UC
FILTER LC
FILTER YPASS
R GAMMA
G GAMMA
B GAMMA
H POSITION
V POSITION
H SIZE
V SIZE
OVERSCAN B
OVERSCAN G
OVERSCAN R
TV/VIdeo/S-Video/Component1,2(SD)
32
32
32
0
0
0
1
7
0
0
0
16
0
0
0
32
32
32
0
0
0
0
63
63
63
Component1,2(HD) PC DVI
32
32
32
0
0
0
1
7
0
0
0
16
0
0
0
32
32
32
0
0
0
0
63
63
63
32
32
32
0
0
0
1
7
0
0
0
16
0
0
0
32
32
32
0
0
0
0
63
63
63
32
32
32
0
0
0
1
7
0
0
0
16
0
0
0
32
32
32
0
0
0
0
63
63
63
Alignment and Adjustments
Samsung Electronics 2-5
2-1-3(F) ASI500 II : ALL
ITEM
PIP R CONT
PIP G CONT
PIP B CONT
PIP R BRIGHT
PIP G BRIGHT
PIP B BRIGHT
PIP FILTER LC
PIP FILTER ML
PIP FILTER MR
PIP FILTER UC
TV/VIdeo/S-Video/Component1,2(SD)
32
32
32
0
0
0
0
0
0
0
Component1,2(HD) PC DVI
32
32
32
0
0
0
0
0
0
0
32
32
32
0
0
0
0
0
0
0
32
32
32
0
0
0
0
0
0
0
2-1-3(G) DNIe : ALL (EXCEPT SUB BRIGHT/CONT)
ITEM
SUB BRIGHT
SUB CONT
NR SCALE MAX
NR SCALE MIN
DE GAIN COR
DE GAIN CLIP
CE UPPER
CE CUTOFF
CE GAIN
WTE Y THRE
WTE C THRE
SYNC MODE
PATT SEL
TV/VIdeo/S-Video/Component1,2(SD)
0
0
52
18
3
60
240
64
48
230
2
1
0
Component1,2(HD) PC DVI
0
0
48
16
3
60
240
64
48
230
2
1
0
0
0
48
16
3
60
240
64
48
230
2
1
0
0
0
48
16
3
60
240
64
48
230
2
1
0
Alignment and Adjustments
2-6 Samsung Electronics
RED CONPENSA
BLUE CONPENSA
WTE GAIN
RAST VSIZE
RAST HSIZE
SHARP OFFSET
616
616
58
1023
895
0
616
616
58
1023
895
0
616
616
58
1023
895
0
616
616
58
1023
895
0
ITEM
GAIN-SEL
CR GAIN
CB GAIN
YG GAIN
TV/VIdeo/S-Video/Component1,2(SD)
1
7
7
1
1
7
7
1
Component1,2(HD) PC DVI
2-1-3(H) CXA2151HD : COMP-PC
1
7
7
1
1
7
7
1
2-1-3(I) AD9883 : COMP-PC
ITEM
R GAIN
G GAIN
B GAIN
R, CR OFFSET
G, Y OFFSET
B, CB OFFSET
AUTO COLOR
TV/VIdeo/S-Video/Component1,2(SD)
142
142
142
60
48
64
-
Component1,2(HD) PC DVI
142
142
142
60
48
64
-
142
142
142
54
54
54
-
142
142
142
54
54
54
-
AUTO COLOR : Automatic white balance adjustment in pc mode and component(HD) mode.
Alignment and Adjustments
Samsung Electronics 2-7
2-1-3(J) LOGIC : ALL (EXCEPT DRIVE/CUTOFF)
ITEM
R DRIVE
G DRIVE
B DRIVE
R CUTOFF
G CUTOFF
B CUTOFF
GAMMA
GTS SET
ERD MODE
RANDOM NOISE
DIFF FILTER
APC
APC SET
APC VALUE
ACTIVE VPOS
ACTIVE HPOS
VSYNC POS
HSYNC POS
VSYNC WIDTH
HSYNC WIDTH
TV/VIdeo/S-Video/Component1,2(SD)
140
130
120
0
0
0
1
0
2
0
1
1
0
127
12
19
3
32
2
12
Component1,2(HD) PC DVI
140
130
120
0
0
0
1
0
2
0
1
1
0
127
12
19
3
32
2
12
140
130
120
0
0
0
1
0
2
0
1
1
0
127
12
19
3
32
2
12
140
130
120
0
0
0
1
0
2
0
1
1
0
127
12
19
3
32
2
12
Alignment and Adjustments
2-8 Samsung Electronics
ITEM
LOG PATTERN
LOG HIGH LEVEL
LOG LOW LEVEL
ASI COLOR BAR
TV/VIdeo/S-Video/Component1,2(SD)
0
255
0
0
Component1,2(HD) PC DVI
2-1-3(K) TP LOG-ASI : ALL
0
255
0
0
0
255
0
0
0
255
0
0
2-1-3(L) OPTION : ALL
ITEM
PIX SHIFT
SHIFT TEST
PIX NUMBER
SHIFT LINE
SHIFT TIME
NUMBER RANGE
LINE RANGE
COUNTRY
TEMP PROTECT
DNIe DEMO
DNIe THROUGH
VIDEO MUTE
IRC AFN
LANGUAGE
CUSTOMER
TUNER
PILOT HIGH
PILOT LOW
RESET
TV/VIdeo/S-Video/ Component1,2(SD)
0
0
1
1
4
4
4
0
0
0
0
10
0
0
0
1
21
16
-
Component1,2(HD) PC DVI
0
0
1
1
4
4
4
0
0
0
0
10
0
0
0
1
21
16
-
0
0
1
1
4
4
4
0
0
0
0
10
0
0
0
1
21
16
-
0
0
1
1
4
4
4
0
0
0
0
10
0
0
0
1
21
16
-
Adjustment
0:OFF 1:RF,Video,S-Video,Component1,2 2:PC 3:ALL
0:minute 1:second
Number of pixels that shift left/right
Number of lines that shift up/down
Time set during shift test
Shift range
Shift range
0:Korean 1:America 2:Japan
Not used
0:OFF 1:ON
0:Not through 1:Through
Unit:100mese
0:General American mode
1:Military American mode
0:English 1:French 2:Spanish
0:CE 1:VMB
0:1 TUNER 1:2 TUNER
Stereo mono boundary value
Stereo mono boundary value
Customer settings reset
Alignment and Adjustments
Samsung Electronics 2-9
Alignment and Adjustments
2-2 WHITE Balance Coordinates
2-2-1 SPN4235 White Balance Adjustment
1. W/B Adjustment is required for the following four modes: DVI DTV PC RF
2. Adjustment Method (DVI, DTV, PC : VG828, RF : Adjust RF signals to match the Toshiba pattern (in-house signal)
! Adjust the target set by adjusting the panel logic and the video DNIe adjustment register in
register in order to determine the referential W/B of the panel with a DVI input, which
is the full digital path.
@ For DTV adjustment, adjust the adjustment register of AD9883 to align the DTV signal
to the DNIe and logic panel value which was fixed with a DVI adjustment so that they are in effect considered to be the same signals. (At this time, do not adjust the gain of
AD9883
the Highlight W/B does not need to be adjusted since its deviation falls
within valid distribution range.)
# PC adjustment is same as DTV adjustment. (The offset can be applied to the values
obtained through DTV adjustment. However, additional adjustment is required for Y, Cb, and Cr of DTV since PC processes R, G, and B signals.)
$ RF adjustment is performed with the Toshiba pattern (in-house signal) and differs
from the VG828 signals in the above three modes. Hence, it should be performed with the same method of ! DVI adjustment.
Thus, Micom saves the W/B data separately for each memory mode of the block
(See the block diagram given below) during W/B adjustment.
Micom can memorize the four modes separately. However, under the current adjustment guidelines, DTV and PC are memorized with the same value during DVI adjustment and RF is memorized with a separate value.
Adjustment Reg
Adjustment Reg
Memory mode
level level
Memory mode
Adjustment Reg
Memory mode
Alignment and Adjustments
2-10 Samsung Electronics
2-2-2 White Balance Coordinates by Mode
PedestalLevel Low Light
measure point
DVI
DTV COMPONENT (480P, 720P,1080i
x 285 285 290 285
H/L
y 290 290 305 300
Y(fL) 32.0 33.0 17.6 33.0
x 285 285 290 285
L/L
y 295 290 300 295
Y(fL) 1.3 1.2 1.0 1.4
= PatternUsed in Adjustment : 10 Steps Gray scalepattern
High Light
measure point
)
PC VIDEO
Alignment and Adjustments
Samsung Electronics 2-11
2-3 Voltage Adjustment
Turning the variable resistor(VR) adjusts voltage.
T:TestPoint
VR: Variable Resistor
SMPS
N805
N806
N812
T(VS)
VR4
VSET
T(VSCAN)
T(VSET)
T(VA)
T(VG) VR3
D5V
VR6
VSCAN
VR1
VS
T(STB_5V)
CN801
VR7
CN802
VA
VR5
VE
CN803
OUTPUT Voltage(V)
VA
VSCAN(VSC)
VS
VE
VSET
D5V
STB_5V
VG
See the labels attached on the base chassis.
+5V
+5V
+15V
VR2 Vstb
T(VE)
CN804
CN800S
2-12 Samsung Electronics
MEMO
Exploded View & Parts List
Samsung Electronics 3-1
3. Exploded View & Parts List
3-1 PL42P3SX/STR
No Code No Description;Specification Q’ty Remark S.N.A
1 BN96-00135L ASSY COVER P-FRONT;42P3,HIPS,HB,GRY,DGM1 1 M0001 1-1 BN64-00071M CABINET FRONT;42P3,HIPS,HB,GRY,DGM1262+S 1 CIS3 S.N.A 1-2 BP64-00177A BADGE-BRAND;ALL,AL,T1.5,70,11.3,BLK,SILI 1 T0057 S.N.A 1-3 BP64-00045B KNOB CONTROL;P3,ABS,HB,GRY,SVM3012 1 T0022 S.N.A 1-4 BN64-00074B WINDOW-REMOTE;42P3S,PMMA,,,,,,CLEAR 1 S.N.A 2 BN94-00494B ASS’Y PCB MISC-CONTROL;SPN4235,D54B,ALEX 1 T0562 3 6003-001026 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR 3 T0081 S.N.A 4 BN64-00122A SCREEN-EMI,FILTER;FILTER,42P3,984*584,T3 1 T0054 5 BN61-00142A BRACKET-FILTER,TOP;42P3S,AL5052,T1.2 1 S.N.A 6 BN61-00245D BRACKET-FILETER SIDE L;AL5052,42P3,T1.2 1 S.N.A 7 BN61-00309C BRACKET-FILETER SIDE R;AL5052,42P3,T1.2 1 S.N.A 8 BN61-00143A BRACKET-FILTER,BOT;42P3S,AL5052,T1.2 1 S.N.A 9 6003-001026 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR 8 T0081 S.N.A 10 BN61-00141A HOLDER-MODULE;42P3,AL,DIECASTING 4 S.N.A 11 6003-001026 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR 8 T0081 S.N.A 12 AA60-00110G SPACER-FILTER;42P3,P/U FROM,560,5,6 1 S.N.A 13 AA60-00110H SPACER-FILTER;42P3,P/U FROM,960,5,6 1 S.N.A 14 BN96-00709A ASSY PDP P-MODULE;M3,S42SD-YD03,D54A,S2. 1 T0044 15 6006-001126 SCREW-ASS’Y MACH;WSP,PH,+,M5,L12,NI PLT, 4 EL013 16 BN96-00137A ASSY COVER P-STAND BASE;42P3S,AL 5052,T1 1 T0144 16-1 BN61-00221A BRACKET-STAND;42P3,SECC,T3.0 1 M0115 S.N.A 16-2 BN64-00107A DECORATION-STAND;42P3,AL 5052,T1.0 1 S.N.A 16-3 BN67-00066A STAND RACK-TOP;42P3,BLK 1 S.N.A 16-4 BN67-00067A STAND RACK-BAR;42P3,DIE CASTING 2 S.N.A 16-5 BN73-00029A RUBBER-FOOT;TR42PND,CR RUBBER,T4.0 6 S.N.A 16-6 6006-001112 SCREW-ASS’Y MACH;WP,PH,+,M8,L16,ZPC(BLK) 8 EL013 16-7 6003-001020 SCREW-TAPTITE;RH,+,B,M4,L10,ZPC(YEL),SWR 8 T0081 S.N.A 17 BN96-00249A ASSY PDP P-SMPS;,SPD-50P3H,D57A,50HD,445 1 T0046 18 BN96-00256A ASSY PDP P-PBA,X MAIN;LJ92-00635A,SPD-42 1 T0143 19 BN96-00257A ASSY PDP P-PBA,Y MAIN;LJ92-00636A,SPD-42 1 T0037 20 BN96-00710A ASSY PDP P-PBA,L MAIN;M3,S42SD-YD04,42SD 1 T0037 23 BN96-00313B ASSY COVER P-BACK SUB;PS42P3S,AL5052 T1. 1 T0008 24 BN94-00451Z ASSY PCB MISC-2 TUNER DIGITAL;SPN4235X/X 1 M0165 25 BN94-00421A ASSY PCB MISC-2 TUNER ANALOG;SPD-50P3H,D 1 M0166 26 BN96-00314B ASSY COVER P-BACK;PS42P3S,AL5052 T1.2,DG 1 T0001 26-1 BN63-00529A COVER-BACK;42P3H,AL 3031,T1.2 1 T0112 S.N.A 26-2 BN61-00202A BRACKET-HANDLE;42P3S,AL5052,T1.5,DGM-S81 2 S.N.A 27 BN96-00286C ASSY MISC P-BRACKET TERMINAL;P3,U.S.A 1 S.N.A
You can search for the updated part code through ITSELF web site. URL : http://itself.sec.samsung.co.kr
Electrical Parts List
Samsung Electronics 4-1
4-1 ASSY BOARD & PARTS LIST FOR SERVICE
4 Electrical Parts List
Electrical Parts List
4-2 Samsung Electronics
DESCRIPTION SPECIFICATION
ASSY PDP P-MODULE BN96- 00325A M3,S42SD- YD03,D54A,S2.0,1015x 613x60.3x ,SD 852x480,NTSC/PAL,42INCH,ALEXANDER
ASSY PDP P-PBA,L MAIN BN96- 00430A M3,S42SD-YD04,,42SD S2.0,79mmlogic board,LJ 92-00641A
NO CODE NO
!
ASSY PDP P-PBA,L BUFF(E) BN96-00253A ,SPD-42P3 ,D54A,42INCH,ALEXANDER ,SD,SDI CODE LJ 92-00632A
@
ASSY PDP P-PBA ,L BUFF(F) BN96-00254A ,SPD-4 2P3,D54A,42INCH,ALEXANDER ,SD,SDI CODE LJ92-00633A
#
ASSY PDP P-PBA,L BUFF(G) BN96-00255A ,SPD-42P3,D54A,42INCH,ALEXANDER ,SD,SDI CODE LJ92-00634A
$
ASSY PDP P-PBA ,X MAIN BN96-00256A ,S PD -42P3,D54A,42INCH,ALEXANDER ,SD,SDI CODE LJ92-00635A
%
ASSY PDP P-PBA ,Y MAIN BN96-00257A ,S PD -42P3,D54A,42INCH,ALEXANDER ,SD,SDI CODE LJ92-00636A
ASSY PDP P-PBA,Y BUFF(UP) BN96- 00258A ,SPD-42P3,D54A,42INCH,ALEXANDER ,SD,SDI CODE LJ92-00637A
^
&
00259A ,SPD-42P3,D54A,42INCH,ALEXANDER ,SD,SDI CODE LJ92-00638A 96-
ASSY PDP P-PBA,Y BUFF(DOWN) BN
*
00249A ,SPD-50P3H,D57A,50HD,445*245,42MM_MAX,90V~264V,NTSC,50INCH,ALEX ANDER,SEMCO 96-
ASSY PDP P-SMPS BN
(
ASSY PCB MISC-DIGITAL BN94- 00420A SP D- 50P3H,D57A
)
ASSY PCB MISC-ANALOG BN94-00421A SPD-50P3H,D57A
AS SY PCB MISC-CONTROL BN94-00494B SPN4235,D54B
2
1
,35x19.5x9.0mm,-,-
WML200/300/420/500, EN,FR,GE
PL42P3S,ENG,S/W120G,A4
PL42P3S,CHI,S/W120G,A4
PL42P3S,ES,S/W120G,A4,P99
BN68-00361A
BN68-00430A
BN68-00468A
BN68-00431A
SCREEN-EMI,FILTER BN64-00122A FILTER,42P3,984*584,T3.0,0.1ohm,T47%
REMOCON BN59-00347A ,TM63,ALEX ANDER,46,G6671B,EX,SAMSUNG
CBF-IF(ANTENNA CABLE) BN39-00333A D54A/SPD-4 2P3S,1P,UL1354,3000MM,UL,BLK,RF-RF,SJ02-01- 241,CORE
LEAD CONNECTOR(SPEAKER CABLE) BN39-00315A D54A/SPD-42P3S,UL1007#24,UL/CSA,2P,2000MM,#24,SME- 00014,STRIP,BK,1007#24
ACCESSORY
ACCESSORY
ACCESSORY
CBF POWER CORD AA39-10004E -, KJP120/KJC303,SVT 3/18AWG,1.
ACCESSORY
RE-FERRITE 3301-001110 ZZ CO
MANUAL-GUIDE
ACCESSORY
ACCESSORY
MANUAL USERS
MANUAL USERS
ACCESSORY
ACCESSORY
ACCESSORY MANUAL USERS
Electrical Parts List
Samsung Electronics 4-3
ASSY COVER FRONT
1 M0001 BN90-00388Y ASSY COVER FRONT;PL42P3SX/STR,D56A S.N.A
..2 CCM 6001-000578 SCREW-MACHINE;TH,+,M3,L8,ZPC(YEL),SWRCH1 ..2 CCM 6001-000578 SCREW-MACHINE;TH,+,M3,L8,ZPC(YEL),SWRCH1 ..2 T0081 6003-001026 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR S.N.A ..2 T0081 6003-001026 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR S.N.A ..2 T0081 6003-001026 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR S.N.A ..2 T0081 6003-001026 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR S.N.A ..2 T0081 6003-001026 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR S.N.A ..2 T0081 6003-001026 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR S.N.A ..2 T0081 6003-001026 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR S.N.A ..2 T0081 6003-001026 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR S.N.A ..2 T0081 6003-001026 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR S.N.A ..2 EL013 6006-001035 SCREW-ASS’Y MACH;WSP,PH,+,M3,L8,ZPC(YEL) S.N.A ..2 EL013 6006-001035 SCREW-ASS’Y MACH;WSP,PH,+,M3,L8,ZPC(YEL) S.N.A ..2 EL013 6006-001035 SCREW-ASS’Y MACH;WSP,PH,+,M3,L8,ZPC(YEL) S.N.A ..2 EL013 6006-001112 SCREW-ASS’Y MACH;WP,PH,+,M8,L16,ZPC(BLK) ..2 EL013 6006-001121 SCREW-ASS’Y MACH;WSP,PH,+,M4,L25,ZPC(BLK ..2 EL013 6006-001126 SCREW-ASS’Y MACH;WSP,PH,+,M5,L12,NI PLT, ..2 BN61-00141A HOLDER-MODULE;42P3,AL,DIECASTING S.N.A ..2 BN61-00244D BRACKET-FILETER TOP ASSY;AL5052,42P3,T1. S.N.A ...3 AA60-00110H SPACER-FILTER;42P3,P/U FROM,960,5,6 S.N.A ...3 BN61-00142A BRACKET-FILTER,TOP;42P3S,AL5052,T1.2 S.N.A ...3 BN72-00339H SPONGE-EMI;42P3S,AL FOIL,1.5,10,950 S.N.A ..2 BN61-00245D BRACKET-FILETER SIDE L;AL5052,42P3,T1.2 S.N.A ...3 AA60-00110G SPACER-FILTER;42P3,P/U FROM,560,5,6 S.N.A ...3 T0069 AA63-60122K SPACER-FELT;SPD-42P3S,FELT,L60,D20,T0.35 S.N.A ...3 BN61-00144A BRACKET-FILTER,SIDE;42P3S,AL5052,T1.2 S.N.A ...3 BN72-00324F SPONGE-EMI;42P3,SHIELD-FORM,T8.0,L20,D20 S.N.A ...3 BN72-00339J SPONGE-EMI;42P3S,AL FOIL,1.5,10,556 S.N.A ..2 BN61-00246D BRACKET-FILETER BOT ASSY;AL5052,42P3,T1. S.N.A ...3 AA60-00110H SPACER-FILTER;42P3,P/U FROM,960,5,6 S.N.A ...3 T0069 AA63-60122K SPACER-FELT;SPD-42P3S,FELT,L60,D20,T0.35 S.N.A ...3 T0069 AA63-60122L SPACER-FELT;42P3,L895,D17,T0.35 S.N.A ...3 BN61-00143A BRACKET-FILTER,BOT;42P3S,AL5052,T1.2 S.N.A ...3 BN72-00339H SPONGE-EMI;42P3S,AL FOIL,1.5,10,950 S.N.A ..2 BN61-00309C BRACKET-FILETER SIDE R;AL5052,42P3,T1.2 S.N.A ...3 AA60-00110G SPACER-FILTER;42P3,P/U FROM,560,5,6 S.N.A ...3 BN61-00144A BRACKET-FILTER,SIDE;42P3S,AL5052,T1.2 S.N.A ...3 BN72-00324E SPONGE-EMI;42P3,SHIELD-FORM,T8.0,L40,D20 S.N.A ...3 BN72-00339J SPONGE-EMI;42P3S,AL FOIL,1.5,10,556 S.N.A ...3 T0069 AA63-60122K SPACER-FELT;SPD-42P3S,FELT,L60,D20,T0.35 S.N.A ..2 BN72-00324J SPONGE-EMI;42P3,SHIELD-FORM,T0.1,L300,D5 S.N.A ..2 BN72-00324Q SPONGE-EMI;50P3H,SHIELD-FORM,0.1,55,150 S.N.A ..2 BN72-00342A SPONGE-CONTROL;50P3H,SPONGE,,8,15,200,,V S.N.A ..2 M0001 BN96-00135L ASSY COVER P-FRONT;42P3,HIPS,HB,GRY,DGM1 ...3 T0102 AA73-00005B RUBBER-CAP;FLAT,PRJ,SILICONE RUBBER,WHIT ...3 CIS3 BN64-00071M CABINET FRONT;42P3,HIPS,HB,GRY,DGM1262+S S.N.A ...3 BN64-00074B WINDOW-REMOTE;42P3S,PMMA,,,,,,CLEAR S.N.A ...3 T0022 BP64-00045B KNOB CONTROL;P3,ABS,HB,GRY,SVM3012 S.N.A ...3 T0057 BP64-00177A BADGE-BRAND;ALL,AL,T1.5,70,11.3,BLK,SILI S.N.A ..2 T0144 BN96-00137A ASSY COVER P-STAND BASE;42P3S,AL 5052,T1 ...3 EL013 6006-001112 SCREW-ASS’Y MACH;WP,PH,+,M8,L16,ZPC(BLK) ...3 M0115 BN61-00221A BRACKET-STAND;42P3,SECC,T3.0 S.N.A ...3 BN64-00107A DECORATION-STAND;42P3,AL 5052,T1.0 S.N.A ...3 BN67-00066A STAND RACK-TOP;42P3,BLK S.N.A ...3 BN67-00067A STAND RACK-BAR;42P3,DIE CASTING S.N.A ...3 T0081 6003-001020 SCREW-TAPTITE;RH,+,B,M4,L10,ZPC(YEL),SWR S.N.A ...3 BN73-00029A RUBBER-FOOT;TR42PND,CR RUBBER,T4.0 S.N.A ..2 CCM 6001-001786 SCREW-MACHINE;TH,+,M4,L8,ZPC(BLK),SWRCH1 S.N.A ..2 CCM 6001-001786 SCREW-MACHINE;TH,+,M4,L8,ZPC(BLK),SWRCH1 S.N.A ..2 CCM 6001-001786 SCREW-MACHINE;TH,+,M4,L8,ZPC(BLK),SWRCH1 S.N.A ..2 T0102 AA73-00005B RUBBER-CAP;FLAT,PRJ,SILICONE RUBBER,WHIT
ASSY COVER REAR
1 M0002 BN90-00389C ASSY COVER REAR;SPN4235X/XAA S.N.A
..2 BN96-00286C ASSY MISC P-BRACKET TERMINAL;P3,U.S.A S.N.A ...3 BN61-00318A BRACKET-TERMINAL;50P3H,AL 5051,T1.0 S.N.A ...3 BN72-00325A SPONGE-EMI,ANALOG;42P3,SHIELD-FORM,T0.5, S.N.A ...3 BN72-00326A SPONGE-EMI,DIGITAL;42P3,SHIELD-FORM,T0.5 S.N.A ...3 BN72-00337C SPONGE-EMI-BACK;63P3,SHIELD-FORM,1,10,15 S.N.A ...3 BN72-00337L SPONGE-EMI;50P3H,SHIELD FORM,1.0,10.0,55 S.N.A ...3 BN72-00337M SPONGE-EMI;50P3H,SHIELD FORM,1.0,10.0,54 S.N.A ...3 BN72-00337K SPONGE-EMI;50P3H,SHIELD FORM,1.0,10.0,12 S.N.A ..2 T0001 BN96-00314B ASSY COVER P-BACK;PS42P3S,AL5052 T1.2,DG ...3 BN61-00202A BRACKET-HANDLE;42P3S,AL5052,T1.5,DGM-S81 S.N.A ...3 T0112 BN63-00529A COVER-BACK;42P3H,AL 3031,T1.2 S.N.A ...3 BN64-00126A INLAY-SHIELD;42P3,PC SHEET V2,T0.3,BLK S.N.A ...3 T0256 BN64-00143B DECORATION-BACK;SPD-42P3H,PC+ABS,5V S.N.A ...3 CCM 6001-001786 SCREW-MACHINE;TH,+,M4,L8,ZPC(BLK),SWRCH1 S.N.A ..2 T0008 BN96-00313B ASSY COVER P-BACK SUB;PS42P3S,AL5052 T1. ...3 T0069 AA63-60122Q SPACER-FELT;P3,FELT,L65,,,,T0.5,D30, S.N.A ...3 BN61-00319A BRACKET-POWER;50P3H,SECC,T1.5 S.N.A ...3 BN63-00530A COVER-BACK,SUB;42P3H,AL 5051,T1.2 S.N.A ...3 BN72-00324M SPONGE-EMI;50P3H,SHIELD-FORM,,0.1,15,60, S.N.A ...3 BN72-00324N SPONGE-EMI;42P3,SHIELD-FORM,,T4.0,D20,L3 S.N.A ...3 BN72-00324P SPONGE-EMI;42P3,SHIELD-FORM,,T1.5,D4,L18 S.N.A
ASSY P/MATERIAL
1 BN92-00553B ASSY P/MATERIAL;SPD-42P3H S.N.A
..2 AA60-40006A PIN-STAPLE;AUTO,33X17.8X2.4,H18,33X17.8X S.N.A ..2 AA61-20285A HOLDER-BOX;3456,PP,-,-,-,WHT,VO S.N.A ..2 AA63-10007C BAND-PP;W18,CLEA,1G S.N.A ..2 6902-000007 BAG PE;HDPE/NITRON/HDPE,T0.015/T0.5/T0.0 S.N.A
ASSY ACCESSORY
1 M0016 BN92-00747M ASSY ACCESSORY;PL42P3SX/STR,D54B, ,NTSC S.N.A
..2 T0121 3301-001110 CORE-FERRITE;ZZ,35x19.5x9.0mm,-,­..2 CIS 4301-000103 BATTERY-ALKALINE;1.5V,750mAH,AAA,10.5x44 ..2 6902-000018 BAG PE;LDPE,T0.1,W280,L400,GRY,8,2- S.N.A ..2 T0077 AA39-10004E CBF POWER CORD;-,KJP120/KJC303,SVT 3/18A ..2 AA68-40004B CARD WARRANTY;,PERU,W/P(150)/2P,A5,4 S.N.A ..2 SPK BN39-00315A LEAD CONNECTOR;D54A/SPD-42P3S,UL1007#24, ..2 BN39-00333A CBF IF;D54A/SPD-42P3S,1P,UL1354,3000MM,U ..2 BN69-00428A BOX-ACCESSORY;PDP,CB SW-1,E,YEL,KSD-21,5 S.N.A ..2 T0074 BN59-00377B REMOCON;TM77,ALEXANDER,49,SVM-3012,EX ..2 CIS BN68-00505A MANUAL USERS;PL42P3S,ENG,A4,D54B S.N.A ..2 CIS BN68-00506A MANUAL USERS;PL42P3S,ES,A4,D54B S.N.A 1 BN92-00760B ASSY LABEL;PL42P3SX/STR,D54B,NTSC S.N.A 1 BN92-00892B ASSY BOX;PL42P3SX/STR S.N.A
Level Loc. No Code No. Description ; Specification Remark Level Loc. No. Code No. Description ; Specification Remark
4-2 PL42P3SX/XAO
4-4 Samsung Electronics
MEMO
Circuit Operation Description
Samsung Electronics 5-1
5. Circuit Description
5-1 BLOCK DIAGRAM
B’d
X Driver
B’d
Y Driver
PDP PANEL
852x480 Pixels
Row
Driver
X-P ulse
Generator
852x3x480 Cells
Y-P ulse
Generator
Column Driver
POWER B’d
Power Supply
Source
AC Power
(110/220V)
MAIN
Tuner
SUB
Tuner
S/W
Audio
ANAL OG B’d
Video
Processor
Filter
Comb
Data
Display
Driver
Timing
DRAM
Scan
Driver
Timing
Data
controller
Timing
clock:
controller
clock:
60MHz
20MHz
40MHz
DIGITAL B’d
er
Deinterlac
Image
Enhancer
Video
Decoder
Scalar
Image
TMDS
Receiver
A/D
Converter
LOGIC B’d
Data
Input
Processor
clock:
27MHz
LVDS
Micom
Circuit Operation Description
5-2 Samsung Electronics
5-2 WIRE DIAGRAM
Circuit Operation Description
Samsung Electronics 5-3
5-3 POWER SUPPLY
5-3-1 Block Diagram
(+ 95V)
85
(+ 110V)
78V
MAG-AMP
Circuit Operation Description
5-4 Samsung Electronics
5-3-2 Circuit Description
1. Outline (PDP42inch SMPS)
Considering various related conditions, the switching regulator with good fficiency and allowing for its small size and light weight was used as the power supply for PDP 50inch (Alexander), VS requiring high power consumption used Asymmetrical Half Bridge converter and flyback converter and other high volt­age (VSCAN, VSET, VE) used DC/DC converter. To comply with the international harmonics standards and improve the power factor, active PFC(Power Factor Correction) was used to rectify AC input into +400V DC output, which in turns used as input to the switching regulator.
2. INPUT
The power supply shall be capable of supplying full rated output power over free voltage ranges that are rated 100 VAC -240 VAC RMS nominal. Operating voltage : 90 VAC - 264 VAC
The power supply must be able to start up under peak loading at 90V AC. The power supply shall auto­matically recover from AC power loss. (Note that nominal voltages for test purposes are considered to be with +/- 1.0V of nominal).
STD_5V is a SELV standby voltage that is always present when AC mains voltage present.
3. OUTPUT
This power supply is 15 output switching power supply for PDP 42inch(Alexander). The output voltage, and current requirements for continuous operation are stated below. (table 1)
Table1. Specifications of Output Power Supplies for PDP SMPS
Output Name
VS
VA
VSCAN
VSET
VE
VG
D12V
A12V
D6V
A6V
D5V
D3.3V
12V AMP
VT
STD_5V
Output Voltage
+75V ~ 100V (89V)
+65V ~ 80V (78V)
+65V ~ 100V (75V)
+80V ~ 10V (95V)
+100V ~ 120V (110V)
+15V
+12V
+12V
+6V
+6V
+5V
+3.3V
+12V
+33V
+5V
Output Current(Max)
4.5A
0.6A
0.1A
0.1A
0.1A
1.5 A
0.1A
0.3A
0.1A
0.1A
1.0A
4.5A
1.7A
0.003A
0.6A
Using in PDP driving
Sustain Voltage of Drive Board
Address Voltage of Drive Board
Driving Voltage of Fet
IC Driving Voltage of Logic Board
Amp Voltage of Audio Board
Stand-by for Remote Control
Circuit Operation Description
Samsung Electronics 5-5
1) Over voltage Protection
SMPS has an over voltage detection circuit as well as a circuit which keeps a constant level of voltage.
It is designed so that when an Over Voltage occurs in any part it does not affect another output part.
SMPS cuts off Over Voltage in latch mode. The following tagle gives te Over Voltage protection specifications.
Table2. Over voltage Protection.
Parameter
VS(85V)
VA(75V)
D6V
D3.3V
Min
100 ~
94 ~
8.2 ~
4.7 ~
Unit
V
V
V
V
2) Short Circuit and Over current Protection.
Short-circuit of the output terminal is defined as an output impedance that is less than 300mohm.
For a given SMPS, when a VS output is short-circuited, the SMPS stops operation. Even if a short-circuit occurs between the main output and the STD_5V, the SMPS does not fail. When the short-circuit is cleared, it will operate normally again. Even if a short_circuit occurs when the SMPS is operating within the range presented in Chapter 3, it will not cause a malfunction to the parts or the PCB patterns.
The following table gives Over Current protection specifications.
Table3. Over Current Protection.
Parameter
VS(85V)
VA(75V)
12V
6V
D3.3V
Min
~
~
~
~
~
Unit
A
A
A
A
A
Circuit Operation Description
5-6 Samsung Electronics
4. Function of Board
! Remote Control
Using a 250V/10A relay. The board makes remote control available.
@ Free Voltage
The Board is designed so that the input voltage can be used within 90VAC to 264VAC.
# Improvement of power factor
The SMPS has a power-factor compensation circuit so that the power-factor can be more than 0.9.
$ Protection
The SMPS has circuits which protect the product from over current, over voltage and short-circuit.
5. Part Block Diagram and Part Function.
! AC-DC Converter
The AC/DC Converter converts AC input into DC voltage using a power-factor enhancement circuit.
It is designed to not only enhance the power-factor but also suppress noise. It also becomes the input for other constant voltage parts.
Picture 1. PFC Drive FET(2SK2372) Drain pulse
Circuit Operation Description
Samsung Electronics 5-7
Picture 2. PFC Drive FET(2SK2372) Gate pulse
- Oscillator Frequency Oscillator Frequency is determined by the values of Rt and Ct in the circuit. These values also determine the oscillation wave tilt and the off time of frequency. Osillation frequency is obtained using the following formula.
k
In the SMPS circuit, the oscillation frequency is as follows:
f
osc =
t
RAMP
f
osc =
1
RAMP
t
=CtxRtx0.51
1
= 59.417kHz
22 20 051.**.nF
( R59 : 1/8W 20K ) , Ct( C14 : MLCC 222 )
R
t
Circuit Operation Description
5-8 Samsung Electronics
@ Auxiliary Power Supply
The auxiliary power supply supplies power to the remote control for activating the Micom. It operates anytime the power cord is connected to a power source and the Micom is in stand-by mode. The output in this state is called Stand-By voltage. When the ON signal is activated from the remote control, the main power supply of the SMPS starts operation.
Picture 3. Standby flyback Pulse.
# Implementation of Sustain Voltage
As the main part of a SMPS for PDP, sustain voltage must supply a high power, 85V/5.0A. To comply with the specification, the Asymmetrical Half Bridge converter method was used. At the output stage two 85V converters are connected parallel for high efficiency and reduction of sys­tem size against a single 85V converter.
Circuit Operation Description
Samsung Electronics 5-9
Picture 4. VS Drive FET(SPW17N80C3) Drain pulse
Picture 5. VS Drive FET(SPW17N80C3) Gate pulse
Circuit Operation Description
5-10 Samsung Electronics
- PWM SECTION (Pulse Width Modulator) The PWM component of ML4824 is used. There are some items you should pay attention to. The PWM component is synchronized with the PFC component mentioned above.
In Current Mode Operations, a PWM wave is induced via a current detection resistor or current transformer and indicates the current that flows through the output terminal.
$ DC-DC Converter
Input to VSCAN, VSET and VE are included in the VS component.
Picture 6. VSET Pulse
Picture 7. VE Pulse
Circuit Operation Description
Samsung Electronics 5-11
Picture 8. VSCAN Pulse
Picture 9. VA Main Pulse
% Output (VA,Multi Outputs) Pulse
Circuit Operation Description
5-12 Samsung Electronics
Picture 10. Multi Outputs Main Pulse
Circuit Operation Description
Samsung Electronics 5-13
5-3-3 Connector Pin Assingnment
CN801( D-ANAL OG )
CN802( D- DIGITAL )
CN803( LOGIC )
NO OUT PUT SYM
1 +6V 2 RT N 3 +12V 4 RT N 5 +12V 6 +12V 7 RT N 8 RT N 9 +33V
10 RT N
CN804( SX )
NO
1 +5.0V D5V
OUTPUT SYM
A6V
A12V
12VAMP 12VAMP
RTN_AMP RTN_AMP
VT
NO
10 +5V STD_5V 11 THER_D
NO
OUT PUT SYM 1 +6V 2 RTN 3 +3.3V D3 .3 V 4 +3.3V D3 .3 V 5 RTN 6 RTN 7 +12V D12V 8 PS_ON 9 RTN
CN805( SY ) OUTPUT SYM
1 +5.0V D5V
D6V
NO
1 +3.3V D3.3V 2 +3.3V D3.3V 3 RTN 4 RTN 5 +5V D5V 6 RTN 7 8 9 VS_ON
10 RT N
OUTPUT SYM
I2C
2
I
CN806,812( BUFFER )
NO
1 +75V VA
OUTPUT SYM
C
2 +15V VG 3 RT N 4 RT N 5 +110V VE 6 RT N 7 RT N
8 9
NO
1 AC L 2 AC N
+85V +85V
CN800(AC I NPUT )
INPUT SYM
VS VS
2 +15V VG 3 RT N 4 +75V VSCAN 5 RT N 6 +60V VSET 7 RT N
8 9 +85V VS
10 +85V VS
RTN
2 +75V VA 3 N.C 4 RTN 5 RTN
CN807,808, 809, 810,811 ( FAN )
NO
OUTPUT SYM 1 +12V D1 2V 2 RTN 3 FAN_D
Circuit Operation Description
5-14 Samsung Electronics
5-3-4 Power Supply Systematic Diagram and Wiring Diagram
245
Xboard
INLET
D- ANALOGD- DIGITAL
PDP 42inch
ALEXANDER 42"(PSPD441F01A)
LOGIC
445
YBoard
Buffer
FAN
Circuit Operation Description
Samsung Electronics 5-15
5-3-5 Power Supply Layout
CN800
CN804
PRIMARY
SECONDARY
HS1HS2HS3
T3S
CN801
T1S
T2S
T8S
T4S
A6V , A12V, 12V AMP, VT
D3. 3 V, D5V
CN803
VS
STD_5V
VA
VEVSCA N
CN802
T6S
D3 . 3 V, D 6 V, D12 V
CN812
D12V
CN811
CN807
CN808
CN809
CN810
VSET
T5S T7S
D5V , V G
CN805
CN806
Circuit Operation Description
5-16 Samsung Electronics
5-3-6 Trouble Shooting
Nor mal
Nor mal
Power ON
STD_5V
PFC
Abnormal
Abnomal
Chec k the IC2,D28
!
Chec k th e IC1,Q1 ,Q2
@
VA
Nor mal
Nor mal
Abnormal
VS
Multi
Abnormal
Che c k t he IC35
Abnormal
Chec k the IC7
Chec k th e Q6 ,Q8
VSCAN
VE,VSE T
Nor mal
ChecktheOtherboard(ImageBoardorDriverBoard)orCable.
Abnormal
Che ck the IC16,IC17,IC18
Circuit Operation Description
Samsung Electronics 5-17
5-3-7 Component Spec
Q1,Q2
Q6,Q8 2SK2372 500V,25A NEC VS FET
IC1 ML4824IP-1 FAIRCHILD PFC,PWM Combo IC
IC2 ICE2A280 800V,2A INFINEON V5SB SwitchingIC
SPW47N60S5 600V,47A INFENEON PFC Switching FET
IC16
IC17 VE Switching IC
IC18 VSCAN Switching IC
IC7
IC35 VA switching IC
IC14 PQ1CG203FZ 40V,3.5A SHARP D5V chopper regulator
BD1,BD3 D15XB60 600V,15A SHINDENGEN Bridge Diode
D10 RHRP1560 600V,15A FAIRCHILD PFC Diode
D41,D42 KCF16A60 600V,16A NIHON INTER VS Output Diode
D28 D2S4M 40V,2A SHINDENGEN V5SB Output Diode
D37 KCF16A60 600,16A NIHON INTER VA Output Diode
1L0380R 800V,3A FAIRCHILD
KA1M0880B 800V,8A FAIRCHILD
VSET Switching IC
Multi Switching IC
D209 D10LC20U 200V,10A SHINDENGEN 12VAMP Output Diode
D203 D10LC20U 200V,10A SHINDENGEN A12V,D12V Output Diode
D205 MBR20100CT 100V,20A GS A6V,D6V Output Diode
D301 MBR20100CT 100V,20A GS D3.3V Output Diode
D201 BYV38 1kV,2 A TELEFUNKEN VT Output Diode
D202 D10LC20U 200V,10A GS VG Output diode
RL2S G2R-1A DC5V DC5V OMRON RELAY
RL3S G2R-1A DC24V DC24V OMRON RELAY
Circuit Operation Description
5-18 Samsung Electronics
5-4 Driver Circuit
5-4-1 Driver Circuit Overview
5-4-1(A) What is The Definition of Drive circuit?
It is a circuit generating an appropriate pulse (High voltage pulse) and then driving the panel to implement images in the external terminals (X electrode group, Y electrode group and address electrode), and this high voltage switching pulse is generated by a combination of MOSFET’s.
5-4-1(B) Panel Driving Principles
In PDP, images are implemented by impressing voltage on the X electrode, Y electrode and address elec­trode, components of each pixel on the panel, under appropriate conditions. Currently, ADS (Address & Display Separate: Driving is made by separating address and sustaining sections) is most widely used to generate the drive pulse. Discharges conducted within PDP pixels using this method can largely be classi­fied into 3 types, as follows:
(1) Address discharge : This functions to generate wall voltage within pixels to be lighted by addressing
information to them (i.e., impressing data voltage)
(2) Sustain discharge : This means a display section where only pixels with wall voltage by the address
discharge display self-sustaining discharge by the support of such wall voltage. (Optic outputs realiz­ing images are generated.)
(3) Erase discharge : To have address discharge occur selectively in pixels, all pixels in the panel must
have the same conditions (i.e., the same state of wall and space electric discharges). The ramp reset discharge section, therefore, is important to secure the drive margin, and methods most widely used to date include wall voltage controlling by ramp pulse.
Circuit Operation Description
Samsung Electronics 5-19
5-4-1(C) Types and Detailed Explanation of Drive Discharges
(1 ) Sustaining discharge
Sustaining discharge means a self-sustaining discharge generated by the total of the sustaining pulse voltage (usually, 160~170V) alternately given to X and Y electrodes during the sustaining period and the wall voltage that varies depending upon pixels' previous discharge status. It is operated by the memory function (through this, the current status is defined by previous operation conditions) AC PDP basically possesses. That is, when there is existing wall voltage in pixels (in other words, when pixels remain ON), the total of wall voltage and a sustaining voltage to be impressed subsequently impresses a voltage equal to or above the discharge start voltage, thereby generating discharge again, but when there is no existing wall voltage in pixels (in other words, when pixels remain OFF), the sus­taining voltage only does not reach the discharge start voltage, thus causing no discharge. The sustain­ing discharge is a section generating actual optic outputs used in displaying images.
(2) Address discharge
This means a discharge type generated by the difference between positive voltage of the address elec­trode (normally 70~75V determined by supplied Va voltage + positive wall charge) and the negative potential of Y electrode (supplied GND level voltage + negative wall charge). The address discharge serves to generate wall voltage in pixels where images are to be displayed (that is, discharge is to be generated) prior to the sustaining discharge section. Namely, pixels with wall voltage by the address discharge will generate sustaining discharge by the following sustaining pulses.
(3) Erase discharge
The purpose of resetting or erase discharge is to make even wall voltage in all pixels on the panel. Wall voltage, which may vary depending upon the previous sustaining discharge status, must be made even. That is, wall voltage generated by the sustaining discharge must surely be removed, by making discharges and then supplying ions or electrons. Wall voltage can be removed by making dis­charges and then setting a limitation on time for opposite polarity charging of the wall voltage or gen­erating weak discharge (Low voltage erasing) to supply an appropriate quantity of ions or electrons and keep polarities from being charged oppositely. The weak discharge (Low voltage erasing) meth­ods, which have been known to date, can largely be into two types: 1) the log pulse adopted by most companies including F Company, and 2) the ramp pulse adopted by Matsushita. In both two methods, impression is made with a slow rising slope of the erasing pulse. Because the total of the existing wall voltage and a voltage on the rising pulse must be at least the drive start voltage to generate dis­charges, external impressed voltage is adjusted based on the difference in wall voltage between pixels. And, weak discharge is generated because of a small impressed voltage.
Circuit Operation Description
5-20 Samsung Electronics
5-4-1(D) Drive Board Block Diagram
! Y
@ X
Picture. Drive Y-Board
Picture. Drive X-Board
LOGIC Signal Input
LOGIC Signal Buffer
FET Gate Driver
Recovery
Switching
Switching
Recovery circuit
Main
3.3V
15V
85V
Power Input
Vset
Switching
70V
79V
Vscan
Switching
LOGIC Signal Input Power Input
LOGIC Signal Buffer
FET Gate Driver
5V
15V
85V
Reovery
Switching
Main
Switching
Ve
Switching
Recovery circuit
110V
Circuit Operation Description
Samsung Electronics 5-21
# Required elements for operating the drive board
1. Power
- Supplied from the power board. Optimized value may differ slightly from the following value.
a) Vs : 85V - Sustain b) Vset : 60V ~70V - Y Rising Ramp c) Ve : 110V - Ve bias d) Vscan : 70V ~80V - Scan bias e) Vdd : 3.3V - Logic signal buffer IC f) Vcc : 15V - FET Gate drive IC
2. Logic Signal
- Supplied from the logic board
- Gate signal of each FET
Circuit Operation Description
5-22 Samsung Electronics
5-4-1(E) Drive Circuit’s Operational Block Diagra m
- Functions of Boards
X Electrode Terminals
(Upper)
Y-Buffer
X Drive Board
Sustain Pulse
Ve bias
(Energy Recovery)
Y Drive Board
Sustain Pulse
Rising Ramp Pulse
(Energy Recovery)
Vscan Pulse
Falling Ramp Pulse
Y-Buffer (Lower)
COF
(6 block)
Y Electrode Terminals
Circuit Operation Description
Samsung Electronics 5-23
! X Board
Connected to the X terminals on the panel. Maintains
1) the sustain voltage waveforms(including ERC) and
2) the Ve bias during scan time
@ Y Board
Connected to the Y terminals on the panel. Maintains
1) the sustain voltage waveform(including ERC)
2) the Vscan bias, and generates
3) the Y rising/falling ramp waveform.
# Y Buffer Board(Upper, Lower)
Applies the scan waveform to the Y terminals. Consists of two boards, the upper and lower board. In preparation for the SD level, four scan driver IC
S (STMicroelectronics’s STV7617:64 or STV7610A:963
outputs). When a single scan occurs, 7COFS are required.
$ COF
Utilizes the Va pulses on the address electrodes to form an address discharge by using the differences between the beamed pulses occurring on the Y electrodes. It is manufactured in the COF form. Each COF consists of data drive ICs (STMicroelectronics’s STV7610A: 96 outputs). When a single scan occurs, 7 COFs are required.
Circuit Operation Description
5-24 Samsung Electronics
5-4-2 SPECIFICATION OF DRIVE PULSES
5-4-2(A) DRIVE PULSES
Xsustain
pulse
Ysustain
pulse
Y scan
pulse
Addr e ss
pulse
Vs Ve
Y falling
Ra mp
Y rising
Ra mp
Circuit Operation Description
Samsung Electronics 5-25
5-4-2(B) FUNCTIONS OF PULSES
! Y rising ramp pulse
When an external voltage of about 390V~400V is applied on the Y electrode during the Y Rising Ramp time and each gap voltage reaches the discharge sparkover voltage, a weak discharge begins. While the weak discharge is maintained, negative wall charges are accumulated on the Y electrode and posi­tive wall charges are accumulated on the X and address electrodes, respectively.
@ Y Fallimg ramp pulse
During Y rising ramp period, weak-discharge begins when external voltage of about 390V~400V is impressed to Y electrode, and each gap voltage is equal to discharge start voltage. Sustaining the weak-discharge, positive wall charge is accumulated in X electrode and address electrode, and nega­tive wall charge is accumulated in Y electrode of the entire panel.
# Y Scan Pulse
Also referred to as Beam Pulse. Selects the Y electrodes line by line. During this process, the Vscan is called Scan Bias Voltage. About 70V are applied to the electrode line to which Vscan voltage was applied, and the 0V (GND) voltage is applied to the other electrodes. However, since all negative charges are accumulated on the Y electrodes due to the application of ramp pulses and positive wall charges are accumulated on the address electrodes, the cells to which address pulses (70V~75V) are applied have more voltage than the discharge sparkover voltage and thus generate address dis­charges. Since the beam pulse and the data pulse should be applied one line at a time, the PDP address time is therefore very long.
$ 1st Sustain Pulse
The Sustain Pulse always starts from the Y electrode, because positive wall charges are formed on the Y electrodes when an address discharge occurs. Since the wall charge formed by an address discharge is usually less than the wall charge formed by a sustain discharge, the first discharges have a low strength and are stabilized after 5~6 discharges, though it may differ depending on the structure of the electrodes and the environmental conditions. Hence, the reason to maintain the first sustain-pulses for a long time is to form a stabilized first discharge and generate as many wall charges as it possibly can.
Circuit Operation Description
5-26 Samsung Electronics
5-4-2(C) PRINCIPLES OF FET’S OPERATION AND HIGH VOLTAGE SWITCHING
u FET’s operation principles
u FET’s high voltage switching principles
(1) With no signal impressed on G1, FET1 gets
open-circuited, and with signal impressed on G2, FET2 gets short-circuited, thereby causing GND to be outputted to output terminals.
(2) With signal impressed on G1, FET1 gets short-
circuited, and with no signal impressed on G2, FET2 gets open-circuited, thereby causing 180V to be outputted to output terminals.
(1) With signal impressed on the gate (Positive voltage),
FET gets short-circuited (a conducting wire of zero (0) resistance); and
(2) With no signal impressed on the gate (GND), FET gets
open-circuited (a non-conducting wire of resistance).
Circuit Operation Description
Samsung Electronics 5-27
5-4-2 (D) DRIVER CIRCUIT DIAGRAM
Vs
Ve
Yscan
Xs
XrYs
Xe
Ysp
Panel
Xp
XgYl
Xf
Xl
Vcc_F
Xc
Vcc
Ysc_c
Vscan
Vs
Vset
Yh Xh
Yr
Yrr
Ramp
Yp
Ramp
Yf
Yg
Yfr
Ramp
Yc
Vcc_F
Yer
Vcc
Circuit Operation Description
5-28 Samsung Electronics
5-4-2(E) DRIVER BOARD CONNECTOR LAYOUT
Power
Signal
Panel
Panel
Panel
Circuit Operation Description
Samsung Electronics 5-29
Panel
Panel
Power
Panel
Panel
Panel
Signal
Panel
Circuit Operation Description
5-30 Samsung Electronics
5-4-2(F) DRIVER BOARD TROUBLESHOOTING
! Y Buffer
- To check whether the Y buffer is operating normally, first check the operational status of the Y Main.
- Disconnect the connectors from the Y Main and Y buffer.
- Then check the line between OUTL and OUTH using a diode (diode ccheck) and ensure that the forward voltage falling is between 0.4V~0.5V.
- Also, the resistance between the two terminals should be more than several k ohms.
T
Circuit Operation Description
Samsung Electronics 5-31
@ Y Main
- Connect the Y Main to the Y buffer and apply power. Ensure that at least one of the OUT1~8 values of the Y buffer is the same as one of the values shown on Attachment 1.
OUT1
OUT2
Circuit Operation Description
5-32 Samsung Electronics
# X
- Ensure that the TPOUT outputs on the X board match those in Attachment 2 when the power is applied.
Attachment # 1
Y Output Waveform
Circuit Operation Description
Samsung Electronics 5-33
Ensure that one scan pulse is output!
Y Output Waveform (200us/div, 100V/div)
Circuit Operation Description
5-34 Samsung Electronics
Attachment # 2
X Output Waveform
X Output Waveform (100us/div, 100V/div)
Circuit Operation Description
Samsung Electronics 5-35
5-5 Logic part
5-5-1 Description of the Logic Board
5-5-1(A) 42” SD S2.0 Board Layout
Logic Main Board
Logic E-buffer Logic F-buffer Logic G-buffer
Circuit Operation Description
5-36 Samsung Electronics
5-5-1 (B) Chart of Logic Board Signal Flow
Circuit
Losic Power
Signal
Video Signal
Video Signal
Data R,G,B - 8 bit for each color
component H,V SYNC - 1 bit for
each component
Circuit Operation Description
Samsung Electronics 5-37
Name
LVDS Connector
Operation LED
I2C Connector
256k
Y Connector
X Connector
CN401(E-Address Buffer Connector)
CN402(F-Address Buffer Connector)
CN403(G-Address Buffer Connector)
Power Connector
Power Fuse
Receives LVDS-encoded RGB,H,V,DATAEN, and DCLK input from
video board.
Shows whether the Sync and Clock signals are entering the logic board normally. (Normal status: blinks once every second)
Connects the key scan board which checks and adjusts the 256K data.
EEPROM which saves the gamma table, APC table, drive waveform timings and
other options.
Outputs the Y drive board control signals.
Outputs the X drive board control signals.
Outputs the address data and control signals to the E-buffer board.
Outputs the address data and control signals to the F-buffer board.
Outputs the address data and control signals to the G-buffer board.
Receives the power input (5V) for the logic board.
Fuse attached to the power input part (5V) of the logic board.
Function
NO
1
2
3
4
5
6
7
8
9
10
11
5-5-1 (C) Name of the Major Parts of the Logic Board and Terminology
5-5-1 (D) description of Logic Board
The Logic Board consists of the logic main board, which processes video signals and generates and outputs the address driver output signals and the XY drive signals, and the buffer board, which buffers the address driver output signals and transmit them to the address driver IC (COF Module).
Circuit Operation Description
5-38 Samsung Electronics
5-5-2 Waveform in Normal Operation
When the PDP set and the logic board operate normally, the operation status LED indicator shown in Figure 1 blinks once per second. If the set has a problem, visually check the LED status and replace the board if any error is found. If you need to detect and check errors, follow the directions given in the Attachment: “Logic Board Inspection Procedure”.
Logic Board
Logic Main
Buffer Board
E Buffer board F Buffer board
G Buffer board
Function
- Processes video signals (WL, error diffusion, APC).
- Outputs address driver control signals and data signals to the buffer board.
- Outputs XY drive board control signals. Transmits data and control signals to the bottom left COF.
Transmits data and control signals to the bottom center COF. Transmits data and control signals to the bottom right COF.
Remarks
Circuit Operation Description
Samsung Electronics 5-39
5-5-3 Troubleshooting
There are several reasons an error can occur on to the logic board. The following flow charts show solutions to many problems.
5-5-3(A) No Screen Display Output
5-5-3(B) Screen Error
Check the power inputs.
NO
Check the detailed waveforms. (Need to switch to the internal pattern)
YES
Check the operational status of the LED indicators.
Replace the 256K EEPROM and check again.
Check the internal patterns.
Check the detailed waveforms. (Refer to the Inspection Procedure attached.)
NO
Check the power cable connections.
YES
Check the fuse.
Check the inductor on the power terminal.
Check the operational status of the LED indicators.
Replace the 256K EEPROM
Check the video board.
and check again.
YES
Check the internal patterns.
Screen error of a specific COF block.
Check the detailed waveforms (Refer to the Inspection
Check the buffer board.
Procedure attached.)
Circuit Operation Description
5-40 Samsung Electronics
Terminology
1. 42” SD S2.0 Logic Main Board 1-1 Main Board
Applies video signals to the PDP by signaling to the X and Y drive boards and the logic E, F, and G buffers.
2. 5V, 3.3V 2-1 5V : Voltage that passes through the logic main board and is applied to the logic buffer. 2-2 3.3V : Main power that is supplied to the logic main board.
Preparations for Inspection
1. Testing the device/instrument: Measurement instruments should be used to finish calibration. 1-1 Inspection Table: Should supply both 110V and 220V power. It should have sufficient space to accom
modate all measurement instruments and samples. 1-2 Oscilloscope: Should have more than 2 channels. The frequency should be 500MHz. 1-3 Power Supply: One linear power supply that has the capacity for more than 5V/3A should be
prepared for supplying the main power. It should have a current limit function so that it can prevent
over current due to abnormal operation of the samples. 1-4 Logic Main Board: Perform testing on an inspection target board with TEST PROM.
2. Additionally, prepare needed measuring tools such as Vernier calipers and a multimeter.
Preparations for Inspection
1. Inspection Method & Procedure and Acceptance Determination
2. Sample Status: The package of samples should arrive covered when delivered directly from the manufacturer.
3. Inspection Items: On the Inspection Record Sheet record the measurement results of the waveforms specified on Attachment 1 : TEST POINT.
4. Inspection Procedure
4-1 Inspect the width and length of the logic buffer board by using Vernier calipers, which have been
calibrated. Determine compliance to the specifications by referring to the numbers and drawings below. Record the inspection result on the Inspection Record Sheet.
4-2 Inspect the type, location and installation orientation of the connectors and record the results on the
Inspection Record Sheet.
4-3 Visually inspect the soldering state of the ASS’Y Y. First, inspect the omitted part slots on the mounting
surface and the short-circuits on the various ICS and connector pins, and then inspect the short-circuits on th opposite side. When the visual inspection is finished, record the inspection results on the Inspection Record Sheet.
Circuit Operation Description
Samsung Electronics 5-41
4-4 Board Drawings and Appearance
1) Logic Main Board
Figure 1. Appearance of the Logic Main Board
Figure 2. Connecting probe 1 of the oscilloscope
4-5 Logic Main Board Switch Operation
1) Internal Pattern: Set SW2001 No.2, and 4 to OFF(DOWN), No.3 to ON(UP).
2) External Pattern: Set SW2001 No.2, and 4 to ON(UP), No.3 to OFF(DOWN)/
Manipulate the switches to the internal pattern for board inspection.Ignore SW201 No.1.
4-6 Board Inspections
1) All logic main boards should be completely inspected.
2) Visually inspect the part-soldering state of the entire board.
3) Set the instruments for waveform inspection. ! When a linear power supply is used, set the output voltages to 5V or 3.3V in advance.
When a SMPS is used, ensure that the output voltages are 5V or 3.3V.
@ Set the oscilloscope to 4ms/div and 2V/div.
Connect PROBE 1 as shown in the following figure and set it to TRIGGER. Perform the test by capturing the waveforms from each point with PROBE 2.
GND1
TP13
GND1
TP13
Circuit Operation Description
5-42 Samsung Electronics
4) Perform waveform inspection Inspection: Inspect each board separately.
! Place the logic main boards on the inspection table so that they do not touch each other.
Install the TEST PROM and check the SW2001 setting.
@ Connect CN803 of the logic main board to the linear power supply (or SMPS).
(Use a 10-pin connector cable.) Make sure to connect when the linear power supply (or SMPS) turned off.
# Turn on the linear power supply and apply 5V and 3.3V power to the logic main board.
Then, check whether the LD2001 LED indicator, located at the top left of the board, blinks about
once per second.
If the LED indicator blinks too fast or is not lit up, it indicates tat the logic board is not operating
normally.
$ Measure each waveform on the board and compare to the waveforms on Attachment 1. % Finish the inspection and turn the linear power supply (or SMPS) off. ^ After completing the inspection, set the SW2001 switch to the external pattern.
Circuit Operation Description
Samsung Electronics 5-43
signal for trigger (TP13) peak to peak level:3.3V
TP04,VSYNC peak to peak level:3.3V Frequency:60Hz
5-5-4 SD S2.0 Logic Board Waveforms
Oscilloscope settings: 4.0ms/div, 2V/div
signal for trigger (TP13) peak to peak level:3.3V
TP05,HSYNC peak to peak level:3.3V
1
2
Circuit Operation Description
5-44 Samsung Electronics
3
4
signal for trigger (TP13) peak to peak level:3.3V
CN101(6),DATAEN peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
AR2042~AR2047 Terminal DATA peak to peak level:3.3V
Circuit Operation Description
Samsung Electronics 5-45
5
6
signal for trigger (TP13) peak to peak level:3.3V
CN101(6),Xf peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
CN101(8),Xr peak to peak level:3.3V
Circuit Operation Description
5-46 Samsung Electronics
7
8
signal for trigger (TP13) peak to peak level:3.3V
CN101(10),Xc peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
CN101(12),Xp peak to peak level:3.3V
Circuit Operation Description
Samsung Electronics 5-47
9
10
signal for trigger (TP13) peak to peak level:3.3V
CN101(14),Xg peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
CN101(16),Xe peak to peak level:3.3V
Circuit Operation Description
5-48 Samsung Electronics
11
12
signal for trigger (TP13) peak to peak level:3.3V
CN121(8),Xs peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
CN201(4),Yfr peak to peak level:3.3V
Circuit Operation Description
Samsung Electronics 5-49
13
14
signal for trigger (TP13) peak to peak level:3.3V
CN201(6),Yg peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
CN201(8),Y1 peak to peak level:3.3V
Circuit Operation Description
5-50 Samsung Electronics
15
16
signal for trigger (TP13) peak to peak level:3.3V
CN201(10),Yrr peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
CN201(12),Ys peak to peak level:3.3V
Circuit Operation Description
Samsung Electronics 5-51
17
18
signal for trigger (TP13) peak to peak level:3.3V
CN201(14),Yp peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
CN201(6),Ysp peak to peak level:3.3V
Circuit Operation Description
5-52 Samsung Electronics
19
20
signal for trigger (TP13) peak to peak level:3.3V
CN201(18),Ysc peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
CN201(20),Yc peak to peak level:3.3V
Circuit Operation Description
Samsung Electronics 5-53
21
22
signal for trigger (TP13) peak to peak level:3.3V
CN201(22),Yr peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
CN201(24),Yf peak to peak level:3.3V
Circuit Operation Description
5-54 Samsung Electronics
23
24
signal for trigger (TP13) peak to peak level:3.3V
CN201(26),Ysc_c peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
CN201(30),TSC peak to peak level:3.3V
Circuit Operation Description
Samsung Electronics 5-55
25
26
signal for trigger (TP13) peak to peak level:3.3V
CN201(32),STB peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
CN201(34),LE peak to peak level:3.3V
Circuit Operation Description
5-56 Samsung Electronics
27
28
signal for trigger (TP13) peak to peak level:3.3V
CN201(36),CLK peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
CN201(38),SIA peak to peak level:3.3V
Circuit Operation Description
Samsung Electronics 5-57
29
30
signal for trigger (TP13) peak to peak level:3.3V
CN201(40),SIB peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
AR2009(1,2,3),POL peak to peak level:3.3V
Circuit Operation Description
5-58 Samsung Electronics
31
32
signal for trigger (TP13) peak to peak level:3.3V
AR2009(4), AR2008(1,2),STB peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
AR2010(2,3,4), BLK peak to peak level:3.3V
Circuit Operation Description
Samsung Electronics 5-59
33
34
signal for trigger (TP13) peak to peak level:3.3V
AR2008(3,4), AR2007(1), SCLK_1 peak to peak level:3.3V Frequency:20MHz
signal for trigger (TP13) peak to peak level:3.3V
AR2007(2,3,4), SCLK_2 peak to peak level:3.3V Frequency:20MHz
Circuit Operation Description
5-60 Samsung Electronics
35
36
signal for trigger (TP13) peak to peak level:3.3V
U2013(2),DATA peak to peak level:3.3V
signal for trigger (TP13) peak to peak level:3.3V
U2014(2),DATA peak to peak level:3.3V
Circuit Operation Description
Samsung Electronics 5-61
37
signal for trigger (TP13) peak to peak level:3.3V
AR2011~AR2034 [Do not inspect the waveforms for AR2012(1), AR2015(1), AR2016(4), AR2017(4), AR2025(1), AR2026(4), AR2031(1), AR2030(4), AR2032(3), AR2033(2), and AR2034(3)] peak to peak level:3.3V
Circuit Operation Description
5-62 Samsung Electronics
1
2
5-5-5 42” SD S2.0 LOgic Buffer Board Waveforms
Oscilloscope settings: 4.0ms/div, 2V/div
Since the 80-pin connectors have the same pin-outs, the same inspection is applied for all 80-pin connectors. The output voltage of PROBE 2 should be 5V for inspection.
signal for trigger (TP13) peak to peak level:3.3V
EC1,EC2,EC3,FC4, GC5,GC6,GC7(16, 30,54,68),POL peak to peak level:5V
signal for trigger (TP13) peak to peak level:3.3V
EC1,EC2,EC3,FC4, GC5,GC6,GC7(9~ 14,23~28,47~52, 61~67),DATA peak to peak level:5V
Circuit Operation Description
Samsung Electronics 5-63
3
4
signal for trigger (TP13) peak to peak level:3.3V
EC1,EC2,EC3,FC4, GC5,GC6,GC7(20, 34,58,72),STB peak to peak level:5V
signal for trigger (TP13) peak to peak level:3.3V
EC1,EC2,EC3,FC4, GC5,GC6,GC7(15, 29,53,67),BLK peak to peak level:5V
Circuit Operation Description
5-64 Samsung Electronics
5
6
signal for trigger (TP13) peak to peak level:3.3V
EC,EC2,EC3,FC4, GC5,GC6,GC7(19,
57),SCLK_1 peak to peak level:5V Frequency:20MHz
signal for trigger (TP13) peak to peak level:3.3V
EC1,EC2,EC3,FC4, GC5,GC6,GC7(33,
72),SCLK_2 peak to peak level:5V Frequency:20MHz
Circuit Operation Description
Samsung Electronics 5-65
5-6 Video Circuit Part
5-6-1 Block Diagram
5-6-1(A) Analog Board IC & Signal Block Diagram
Circuit Operation Description
5-66 Samsung Electronics
5-6-1(B) Digital Board IC & Signal Block Diagram
FROM SMPS
CN802
CLOCK Signal
TOLOGIC
I C603
I C103
Z86129
CN101
CVBS
IC101
VPC3230
IC104
FLI2200
Y/Pb/Pr
20.25M
CN102
Y/C
IC402
81V04160
I C105
K4S643232E
CN103
Y/Pb/Pr/ H/V
14.3181M
IC401
VPC3230
20.25M
I C703
BA7657
I C801
74HC4052
DVI, D-SUBL/R
S-VHSY/C
R/G/B/H/V
S-VHSL/R
JA803
S-VIDEO/VIDEO
Audio input(L/R)
JA101
S-VIDEO
D-SUBL/ R
PC
JA801
Audio input(L/R)
JA701
D-SUB
DIGITAL Signal
CN601
ANALOG Signal
CRYSTAL
PCB
FROM
CONTROL
CN111
DS90C385
I C602
K4S643232E
DNIe
IC601
K4S643232E
29LV160T
I C202
I C604
K4S641632E
I C203
ICIC502
K4S643232E
ASI500
ICIC503
K4S643232E
IC201
SDA6001
CN11 0
IC705
AD9883
IC702
SiI169
6M
DVI L/R
DVI
JA802
Audio input(L/R)
DVI
JA702
JA302
RS-232
Circuit Operation Description
Samsung Electronics 5-67
5-6-2 Inspections on Major ICs
1. SDA6001 (IC201) - MICOM
(1)
Check whether the proper power is supplied. (3.3v, 2.5V)
(2) Check whether the No.73 Reset pin’s output is High. (3) Check I
2C-BUS (I2C 1 : pins 98 and 99, I2C 2 : pins 100 and 101).
(4) Check whether the inputs/outputs between SDA6001 and MEMORY (IC203, IC205) are normal. (5) Check whether the 6-MHz clock is connected to pins 108 and 109.
2. VPC3230 (IC101, IC401)
Check when the input mode is set for TV, S-Video, Component1,
or 2 (SD-level)
(1) Check whether the proper power is supplied. (3.3V, 2.5V) (2) Check whether the No.15 Reset pin’s output is High. (3) Check I
2
C-BUS (pin 13 and 14). (4) Check whether the output clock of LLC1 (pin 28) is 13.5MHz. (5) Check the output on H SYNC (pin 56) andV SYNC (pin 57). (6) Check the digital data outputs.
3. 81V04160 (IC402)
Check the PIP operations when the input mode is for TV, S-Video,
Component1, or 2 (SD-level)
(1) Check whether the proper power is supplied. (3.3V) (2) Check the digital data inputs and outputs.
4. FLI2200 (IC104) - DEINTERLACER
Check when the input mode is for TV, S-Video,
Component 1, or 2 (SD-level)
(1) Check whether the proper power is supplied. (3.3V, 2.5V) (2) Check wheter the No.48 Reset pin’s output is High. (3) Check I
2C-BUS (pins 47 and 48).
(4) Check whether the data inputs are normal.
VPC_CLK (pin 40) : 13.5 MHz, VPC_HSYNC (pin 3) : 15.75 KHz, VPC_VSYNC (pin 4) : 60Hz
(5) Check whether the data outputs are normal.
FLI_CLK (pin 117) : 27 MHz, FLI_HSYNC (pin 92) : 31.5 KHz, VPC_VSYNC (pin 91) : 60Hz
(6) Check whether the inputs and outputs between FLI2200 and MEMORY (IC105) are normal.
5. CXA2151Q (ANALOG BOARD IC101) - COMPONENT S/W & SYNC SEPARATION
Check when the input mode is for Component 1, or 2 (HD-level), and PC.
(1) Check whether the proper power is supplied. (5V) (2) Check I
2C-BUS (pins 56 and 57).
(3) Check whether the video input signals (pins 43, 48, 54) and the H (pin 30) and V (pin 31)
input signals are normal.
(4) Check whether the data outputs are normal.
Y, Pb, Pr (pins 25, 26, 27), COMP_H (pin 22) : 45 KHz (for 720p), COMP_V (pin 23) : 60Hz
Circuit Operation Description
5-68 Samsung Electronics
6. AD9883 (IC705) - A/D CONVERTER Check when the input mode is for Component 1 or 2 (HD-level) and PC.
(1) Check whether the proper power is supplied. (3.3V) (2) Check I
2C-BUS (pins 56 and 57).
(3) Check whether the video input signals (pins 43, 48, 54) and the H (pin 30) and
V (pin 31) input signals are normal.
(4) Check whether the data outputs are normal.
R, G, B digital data outputs (RW708~RW713), ASI_SUB_H (pin 66) : 45KHz (for 720P), ASI_SUB_V (pin 64) : 60Hz, ASI_SUB_CLK (pin 67)
7. SII169CT100 (IC702) - TMDS RECEIVER
Check the when the input mode is for DVI.
(1) Check whether the proper power is supplied. (3.3V) (2) Check whether the power down pin’s (pin 2) output is High. (3) Check whether the DVI inputs are normal. (4) Check whether the data outputs are normal.
R, G, B digital data outputs (RW701~RW706), DVI_HSYND (pin 48), DVI_VSYNC (pin 47), DVI_CLK (pin 44), DVI_DE (pin 46)
8. ASI500 (IC501) - SCALER
(1) Check whether the proper power is supplied. (3.3V, 2.5V) - Since it is BGA IC, measure the
R or C parts on the power terminals.
(2) Check whether the inputs and outputs between ASI500 and MEMORY (IC502, IC503)
are normal.
(3) Check whether the outputs of FLI2200, AD9883, and SII169CT100 are input into ASI500
are normal.
(4) Check whether the data outputs are normal.
R,G,B digital data outputs (RW501~RW506), MN_IN_H (RW507), MN_IN_V (RW507), MIN_IN_CLK (RW507)
9. DNIe (IC601) - PICTURE ENHANCER
(1) Check whether the proper power is supplied. (3.3V, 2.5V) (2) Check whether the Reset pin’s output is High. (pin 74) (3) Check I
2C-BUS (pins 1 and 2)
(4) Check whether te outputs of ASI500 are input into DNIe normally.
(Digital R, G, B and HSYNC, VSYMC, CLK)
(5) Check whether the data outputs are normal.
R, G, B digital data outputs (RW602~RW607), OUT_HSYNC (pin 10), OUT_VSYNC (pin 9), OUT_CLK (pin 12)
10. DS90C385 (IC603) - LVDS TRANSMITTER
(1) Check whether the proper power is supplied. (3.3V) (2) Check wether the power down pin’s (pin 32) output is High. (3) Check whether the outputs of DNIe are input into DS90C385 normally. (4) Check whether the LVDS data outputs are normal.
Troubleshooting
Samsung Electronics 6-1
6. Troubleshooting
6-1 Entirely no screen (Main Body)
Connect the set to a power source.
Power on.
Normal
Measure the SMPS
output voltage.
Normal
Check the Logic
outputs.
Abnormal
Abnormal
Abnormal
Check SMPS CN801 and
802 outputs
Abnormal
Check the SMPS
AC inputs.(CN800S)
Normal
Replace the SMPS.
Replace the Logic board.
Normal
Abnormal
Replace the video board.
Replace the SMPS fuse.
Normal
Check the X-board
outputs.
Normal
Check the Y-board
outputs.
Normal
Replace the Panel.
Abnormal
Replace the X-board.
Abnormal
Replace the Y-board.
6-2 Samsung Electronics
Alignment and Adjustments
6-2 Partly no screen (Main Body)
Power ON
No upper screen
No lower screen
No 1/7 vertical screen
Replace the upper Y buffer board.
Replace the lower Y buffer board.
Replace the corresponding
X buffer board.
No 1/2 vertical screen
No 3/4 vertical screen Replace the panel.
Replace the panel.
7. Schematic Diagrams
Samsung Electronics
Schematic Diagrams
7-1
7-1 ANALOG-1
TP01
TP02
TP03
TP04
TP05
TP06
TP07TP08
TP01
TP02
TP03
TP04
TP05
TP06
TP07
TP08
7-2 ANALOG-2
7-2
Schematic Diagrams
Samsung Electronics
Samsung Electronics
Schematic Diagrams
7-3
7-3 ANALOG-3
7-4
Schematic Diagrams
Samsung Electronics
7-4 ANALOG-4
Samsung Electronics
Schematic Diagrams
7-5
7-5 DIGITAL-1
TP09
TP10
TP11
TP15
TP13
TP14
TP12
TP09
TP10
TP11
TP12
TP13
TP14
TP15
7-6
Schematic Diagrams
Samsung Electronics
7-6 DIGITAL-2
Samsung Electronics
Schematic Diagrams
7-7
7-7 DIGITAL-3
7-8
Schematic Diagrams
Samsung Electronics
7-8 DIGITAL-4
Samsung Electronics
Schematic Diagrams
7-9
7-9 DIGITAL-5
TP16
TP17
TP18
TP16
TP17
TP18
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