SAMSUNG NP-Q70 System Schematic Diagram

SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
1
Table of Contents
D
Page. Page. Page. Page. Page. Page. Page.
TORINO 2
PCB Thinckness:1mm
Page. Page. Page. Page.
CPU :
C
Chip Set : Remarks :
INTEL MEROM INTEL 965GM & ICH8-M w/o INTEL AMT
2 SODIMMs
Page. Page. Page. Page. Page. Page. Page. Page. Page. Page.
Model Name :
TORINO 2
Page.
Page.
PBA Name :
MAIN
Page. Page.
PCB Code :
BA41-00727A / 728A
Page.3437 Page.
B
Dev. Step : Revision :
MP
1.1
Samsung
Page. 39
Page. Page.
T.R. Date :
2007.04.10
Page. Page. Page. Page. Page.
DRAW
CHECK
APPROVAL
Confidential
Page. Page.
-
A
4
-
-
3
Page. Page.
35 36
38
41 42 43 44 45 46 47 48Page. 49 50 51 52 53Page.
2
COVER OPERATION BLOCK DIAGRAM POWER DIAGRAM POWER SEQUENCE
DIAGRAM POWER RAIL CLOCK DISTRIBUTION BOARD INFORMATION
CLOCK GENERATOR (CK-505) MEROM THERMAL MONITOR CRESTLINE (965GM) DDR2 SODIMM (TOP) DDR2 SODIMM (BOTTOM) DDR2 TERMINATION DISCRETE GFX (NB8M-SE & GDDR3) ICH8-M LCD(LVDS) CONN. CRT CONN. HDD & ODD CONNECTOR MICOM LAN CONTROLLER (10/100M) ROBSON USB PORT, MDC CONN. & BLUETOOTH MINI CARD SOCKET (WLAN/HSDPA/WIBRO) CARDBUS CONTROLLER(1) & 4IN1 CARDBUS CONTROLLER(2) & 1394(4P) PCMCIA SOCKET AUDIO CODEC AUDIO AMP40Page. AUDIO JACK CHARGER P3.3V_AUX & P5V_AUX DDR2 POWER CPU VRM POWER P1.25V & P1.05V POWER GFX CORE & P1.5V POWER SWITCHED POWER POWER S/W, DMB, DEBUG & KEYBOARD CONN. LEDS & TOUCHPAD MOUNT HOLE TEST POINTS REVISION HISTORY
DRAW
CHECK
APPROVAL
MODULE CODE
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
4/10/2007
TITLE
MP
1.1
TORINO 2
COVER
CONTENTS
March 28, 2007 3:33:29 PM
1
SAMSUNG
PART NO.
BA41-00727/8A
154
PAGE
D
C
B
A
ELECTRONICS
OF
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
OPERATION BLOCK DIAGRAM
1
PCI
mPGA479M Socket-M
CPU
MEROM-4M
Page 9,10
1299 uFCBGA Type
GMCH
965GM/PM
CRESTLINE
Page 12~16
DMI X4
676 FCBGA Type
ICH
ICH8 - M
82801 HBM
Page 23~26
LPC
800MHz FSB
CHANNEL A 667/533 MHz
CHANNEL B 667/533 MHz
C-Link0
AZALIA
IDE SATA
SPI
CPU2_THERMDA/DC
(CeleronM:667MHz)
D
CLOCK
GENERATOR
CK-505
TFT_LCD
Page 8
12.1" WIDE
1280 X 800
Page 28
CRT
Page 29
GDDR3 128MB
K4J52324QC-BC14
C
LAN
Transformer
RJ45
3722-001822
1394
4pin
Page 38
MultiMedia Crad
6in1 B’d
Page 37
3301-001629
Page 38
Page 34
Discrete Gfx.
nVidia G3-64 Family
64bit
MS / SD / MMC / xD
NB8M-SE
IEEE1394
PCMCIA
Page 27
LOM
10/100M
Marvell
88E8039
Page 32,33
CardBus
Controller
RICOH R5C847
Page 37,38
PCI-E Lane2
LVDS VGA
PCI-E X16
PCI-E
USB2.0
Samsung
B
PCMCIA
Page 39
GOLAN / Kerdon
802.11abg/abgn
Page 36
Intel ROBSON
Page 33
HSDPA
/Wibro
Page 36
PCI-E Lane4
PCI-E Lane1 USB PORT 3
PCI-E Lane3 USB PORT 5 USB PORT 6
Confidential
SPI EEPROM
AT25080
Page 24
KBC
H8S - 2110B
Page 31
Space bar
Power S/W Sub-B’D
with MIO, LID S/W
THERMAL MONITOR
MAX6695
Page 11
AUDIO CODEC
2P
Page 18
On TOP B’D
MDC
Module
Page 35
ALC262
Page 40
RTC Batt.
HDD
2.5inch
SATA only
FAN CONTROL
Page 11
SODIMM1 (BOTTOM)
Audio AMP
D-Class
MAX9715
Page 41
Page 30
SODIMM0 (TOP)
MAX 2 GB
Page 17
MAX 2 GB
Page 18
EXTERNAL MIC
HEADPHONE
Internal MIC
Page 30
MASTER
ODD
RJ11
JACK
L
R
SPEAKER
D
C
B
KEYBOARD
A
PORT 0
USB (Right)
Page 35
4
PORT 1
USB (Back)
Page 35
DMB Module
PORT 2
Page 48
BLUETOOTH
PORT 4
Page 35
3
CAMERA
PORT 7
PS/2
SYNAPTICS
TOUCHPAD
A
DRAW
CHECK
APPROVAL
MODULE CODE
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE TITLE
4/10/2007
DEV. STEP
REV
LAST EDIT
MP
1.1
TORINO 2
MAIN
BLOCK DIAGRAM
March 28, 2007 3:33:29 PM
1
SAMSUNG
ELECTRONICS
PART NO.
BA41-00727/8A
254
PAGE
OF
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
POWER DIAGRAM
2
1
D
C
ICH8-M
B
A
ALWAYS ON
AC Adapter
19V
Battery DC
11.1V
RTC Battery
3V
VDC
P12.0V_ALW
SWITCHED POWER
MAX1999
P3.3V_MICOM
MICOM
P5.0V_ALW
S5 / S4 S3
Rail
+V*Always +V*AUX +V SUSPWR PWRON
State
Full On ON S3 ON S4 ON OFF H L S5 ON
ON ON ON OFF OFF OFF
4
OFF
KBC3_SUSPWR
P5.0V_AUX P5.0V
DDR2 Power VRM ICH8-M
P3.3V_AUX
ICH8M MDC MINICARD LOM
P1.8V_AUX
SODIMM (DDR II) 965GM
VRON
HH H
LL
H L
L
L L
KBC3_PWRON
ICH8-M
USB
CRT
Touchpad
MICOM
FAN
PCMCIA
HDD
P3.3V
965GM
Thermal Sensor R5C843
ICH8-M
BlueTooth
CK505 MICOM
LEDs LCD
SODIMM
MINICARD
HDD SPI
P2.5V
G7xM
P1.5V
MEROM 965GM ICH8-M
P0.9V
DDR II-Termination
P1.8V
NB8M-SE GDDR3
P1.25V
965GM ICH8-M
Samsung
P1.05V
MEROM 965GM ICH8-M
P1.2V
NB8M-SE
GFX_CORE
NB8M-SE
Confidential
3
KBC3_VRON
CPU_CORE
MEROM
S0
P1.05V P1.25V
P1.5V
P1.8V_AUX
P3.3V
GFX_CORE
P1.2V P2.5V P1.8V P3.3V
PRTC
P3.3V
P1.5V
P5.0V_AUX P3.3V_AUX
P5.0V
P1.05V P1.25V
P3.3V
CPU_CORE
P1.05V
P1.5V
P3.3V
P1.8V_AUX
P0.9V
P1.8V
2
Clock Gen.
3.3V Core
0.8V CPU IO
CPU
Vcc_CORE VCCP VCCA
Crestline GM/PM
1.05V MCHCore
1.05V FSB, PEG
1.05V DDRHSIO, DDRDLL
1.05V ME
0.7V~1.25V Vgfx
1.25V DPLL, DMI
1.25V MLINK, HPLL
1.5V VCCDTV/CRT
1.8V DDRIO
1.8V LVDSIO
3.3V TV/CRT IO, PXPBG
DDR2
3.3V SPD
1.8V VDDQ
0.9V Vref, Vtt
Discrete GFX
1.0V~1.1V VDD Core
1.2V PEX Core, IO, PLL
1.2V FBA PLL
1.2V Core Clock PLL Digital
2.5V Core Clock PLL Analog
2.5V VID PLL
1.8V FBVDDQ
1.8V LVDSIO
3.3V VDD3_3
3.3V DAC VDD
3.3V MIO VDDQ
GDDR3
1.8V VDDQ
0.9V VREF
RTC
VccRTC
LAN
VccLAN3_3 VccLAN1_05 VccGLAN3_3 VccGLAN1_5
CL
VccCL3_3 VccCL1_05 VccCL1_5
Resume
V5REF_Sus VccSus3_3 VccSus1_05 VccSus1_5
Core
V5REF Vcc3_3 Vcc1_05 Vcc1_5 VccDMI
DRAW
CHECK
APPROVAL
MODULE CODE
LDO
ICH8-M Base
1.05V AUX LDO
1.05V EP LDO
1.5V EP LDO
1.05V Sus LDO
1.5V Sus LDO
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
LAN100_SLP
INTVRMEN
4/10/2007
MP
1.1
P3.3V_AUX
P5.0V P3.3V
P3.3V_AUX
P3.3V_AUX
P5.0V
P3.3V
VDC
P5.0V
P3.3V_MICOM
P5.0V
P3.3V_AUX
P5.0V P3.3V
P3.3V
P5.0V
P5.0V P3.3V P3.3V P1.5V
P3.3V_AUX
P3.3V
P3.3V P1.5V
P3.3V
TITLE
LOM
HDD / ODD
5V
3.3V
SPI
3.3V VCC
Thermal Sensor
3.3V VCC
FAN
5V VCC
LCD
3.3V VDD 12V Inverter VDC
CRT
5V VCC
MICOM
3.3V VCC 5V VccB
MDC
3.3V VCC
AUDIO
5V AVDD
3.3V DVDD
Bluetooth
3.3V VCC
USB (2 Ports)
5V VCC
DMB
5V
3.3V
MINI CARD
3.3V
1.5V
3.3V AUX
CARDBUS
3.3V
1.8V (Internal VR)
DIAMOND
VDD AVDD
NAND FLASH
1.8V VCC
P3.3V_AUX
3.3V
CTRL_18
1.8V
CTRL12_25
2.5V
TORINO 2
MAIN
POWER DIAGRAM
March 28, 2007 3:33:29 PM
1
FET
FET
P3.3V
P3.3V_AUX
P3.3V_MICOM
PAGE
LEDS
3.3V SCL, NUM, CAP
3.3V WLAN
3.3V POWERON
3.3V ACIN
SAMSUNG
ELECTRONICS
PART NO.
BA41-00727/8A
354
D
C
B
A
OF
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
POWER SEQUENCE
2
Rev. 0.1
1
D
2) VDC
ALWAYS
POWER
POWER S/W
ONTOP B’D
C
P5V_AUX & P3V_AUX
MAX 1999
DDR2 POWER
SC486
B
P1.25V / P1.05V
ISL6227
GFX_CORE
SC470
3) P12V_ALWS
3) P5V_ALWS
3) MICOM_P3V
RST Circuit
4) KBC3_RST*
5) KBC3_CHKPWRSW*
6) KBC3_SUSPWRON
8) SUSPWRGD
11) KBC3_PWRON
13) VCCP_PWRGD
7) P3.3V_AUX
7) P5V_AUX
7) P1.8V_AUX
12) P0.9V
12) P1.25V
12) P1.05V
12) GFX_CORE
PRTC
ICH8-M
22) PLT3_RST*
INTVRMEN
EN
LAN100_SLP
EN
RTCRST#
CK_PWRGD
CPUPWRGD CL_RST#
PLTRST# PCIRST#
PRTC
1-1) PRTC_BAT 1-2) CHP3_RTCRST*
18) CLK3_PWRGD*
21) CPU1_PWRGDCPU
16) VCC_CORE
22) CL3_RST*
RES#
10ms Delay
99ms Delay
MICOM
7) P3.3V_AUX
7) P5V_AUX
* KBC3_LANRST# assert 100ms after LAN Power stable
9) KBC3_RSMRST*
20) KBC3_PWRGD
20) KBC3_PWRGDMCH
15) KBC3_VRON
10-1) CHP3_SLPS4*/S5* 10-2) CHP3_SLPS3*
17) VRM3_CPU_PWRGD
IMVP6 SC452
16) VCC_CORE
7) P1.05V_AUX
7) P1.5V_AUX
7) P1.5V_CL
7) P1.05V_CL
7) P1.05V_LAN
RSMRST# SLP_M# SLP_S3# SLP_S4# S4_STATE# SLP_S5# VRMPWRGD PWROK CLPWROK SUS_STAT#
Samsung
RTC
Battery
CLOCK
CK505
PWRGOOD
CPU
RESET#
23) CPU1_CPURST*
CPURST#
PWROK CLPWROK
CL_RST#
RSTIN#
GMCH
Discrete
GFX.
19) Clock Running
D
C
B
A
P1.5V
SC486
Switched
Power
Switched
Power
4
12) P1.5V
12) P5V
12) P3.3V
12) P2.5V
14) P1.8V
14) P1.2V
Confidential
DRAW
CHECK
APPROVAL
MODULE CODE
3
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
4/10/2007
TITLE
MP
1.1
TORINO 2
MAIN
POWER SEQUENCE
March 28, 2007 3:33:29 PM
1
SAMSUNG
PART NO.
PAGE
ELECTRONICS
BA41-00727/8A
OF
A
544
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
S5
3
Timing Diagram, no ME
S5
S0
S0
Rev. 0.2 Phil 2006-9-21
S0S3
2
S4 / S5
S3S3
S3
G3
1
D
C
B
A
VDC Px.xV_ALW P3.3V_MICOM ADT3_SEL KBC3_RST* KBC3_CHKPWRSW# KBC3_SUSPWRON Px.xV_AUX SUSPWRGD KBC3_LANLOWPWR# KBC3_RSMRST* CHP3_SLPS5* CHP3_SLPS4* CHP3_S4STATE* CHP3_SLPS3* CHP3_SLPM* KBC3_PWRON P5.0V / P3.3V / P1.5V P1.25V / P2.5V P0.9V P1.05V VCCP_PWRGD P1.8V / P1.2V KBC3_VRON VCC_CORE VRM3_CPU_PWRGD CLK3_PWRGD KBC3_PWRGD KBC3_PWRGDMCH
CL3_RST0* CHP3_SUSSTAT* PLT3_RST* PCI3_RST* CPU1_CPURST* SPI Signals CL0 (MCH-ICH) DMI BSEL[2:0] CHP3_CPUSTP* CHP3_PCISTP* CLK0_HOST_CPU CLK0_HOST_GMCH
4
>= 20ms
>= 16ms, ICH internal debounce
Due to Pull-up to P3.3V_AUX
>= 5ms
Due to enabled wake event, such as PWRBTN#
1 ~ 2 RTCCLK, Refer to D31:F0:A4h bits 5:3
Raise at the same time as SLPS4#
1 ~ 2 RTCCLK
Raise at the same time as SLPS3#
0 ~ 100ns
>= 99ms
Valid
1 ~ 2 RTCCLK
1 ~ 2 RTCCLK
1 ~ 2 RTCCLK
>= 0
>= 3ms
Samsung
>= 0s
32 ~ 38 RTCCLK
2 ~ 3 RTCCLK
>= 1ms
>= 1ms
<= 100us
soft strap read
MCH soft straps
Confidential
0 ~ 1ms
CPU_RST_DONE/ACK
BIOS Boot
BIOS Boot
Toggling (Valid)
Toggling (Valid)
Toggling (Valid)
SMM SLP_EN Write
Sx Entry Req
3
Prepare for ME off
2 ~ 4 RTCCLK
Sx Entry Ack
5 ~ 7 RTCCLK
L2 / L3
0 ~ 100ns after VRM3_PWRGD Low
2 ~ 10 RTCCLK
DRAW
CHECK
APPROVAL
MODULE CODE
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE TITLE
4/10/2007
DEV. STEP
REV
LAST EDIT
MP
1.1
MAIN
TIMING DIAGRAM
March 28, 2007 3:33:29 PM
TORINO 2
VDC Px.xV_ALW P3.3V_MICOM ADT3_SEL KBC3_RST* KBC3_CHKPWRSW# KBC3_SUSPWRON Px.xV_AUX SUSPWRGD KBC3_LANLOWPWR# KBC3_RSMRST* CHP3_SLPS5* CHP3_SLPS4* CHP3_S4STATE* CHP3_SLPS3* CHP3_SLPM* KBC3_PWRON P5.0V / P3.3V / P1.5V P1.25V / P2.5V P0.9V P1.05V VCCP_PWRGD P1.8V / P1.2V KBC3_VRON VCC_CORE VRM3_CPU_PWRGD CLK3_PWRGD KBC3_PWRGD KBC3_PWRGDMCH CPU1_CPUPWRGDCPU1_CPUPWRGD CL3_RST0* CHP3_SUSSTAT* PLT3_RST* PCI3_RST* CPU1_CPURST* SPI Signals CL0 (MCH-ICH) DMI BSEL[2:0] CHP3_CPUSTP* CHP3_PCISTP* CLK0_HOST_CPU CLK0_HOST_GMCH
SAMSUNG
PART NO.
PAGE
1
ELECTRONICS
BA41-00727/8A
D
C
B
A
545
OF
SAMSUNG PROPRIETARY
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
COM-22C-015(1996.6.5) REV. 3
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
CLOCK DISTRIBUTION
2
Rev. 0.1
1
D
CLK3_PWRGD
BSEL(2:0)
CK505
200 MHz
CLK0_HOST_CPU/CPU#
MEROM
CPU
BSEL
D
FSB
CPU_STP#
C
SEL_LCDCLK# PCI_STP#
B
Main PLL
SSC
48/96MHz
NO SSC
100MHz /33MHz
SSC
200 MHz
100 MHz
96 MHz
100 MHz
100 MHz
100 MHz
100 MHz CLK1_MCH3GPLL/3GPLL#
48 MHz
14.318 MHz
33 MHz
100 MHz
CLK0_HOST_GMCH/GMCH#
GMCH3_CLKREQ# CLK1_MCH3GPLL/3GPLL#
CLK1_DREFCLK/CLK#
CLK1_DREFSSC/SSC#
CLK1_27M CLK1_27M_SS
CLK1_PCIEGFX/GFX#
PCIE Ext. GFX.
X16 PEG
CLK1_PCIEICH/ICH# GMCH3_CLKREQ#
CLK3_USB48
CLK3_ICH14
CLK3_PCLKICH
MINIPCIE3_CLKREQ1 / 2#
Samsung
CLK1_MINIPCIE1 / 1#
HPLL MPLL
965GM / PM
3GPLL
DPLLA
DPLLB
Crestline
GMCH
X4 DMI
PCIEPLL
SATAPLL USBPLL
ICH8-M
32.768 KHz OSC
MINI CARD (WLAN)
333/266 MHz
333/266 MHz
333/266 MHz
333/266 MHz
RTC Clock
32.768 KHz
2801-003856
CLK1_MCLK0/0#
CLK1_MCLK1/1#
CLK1_MCLK2/2#
CLK1_MCLK3/3#
MDC3_BCLK
SPI3_CLK
17.86 / 31.25 MHz
HD 24 MHzAUD3_BCLK
667/533 MHz
ON B’D MEM
SODIMM #0
C
MDC
HD Audio
SPI
B
A
ITP_EN
14.318 MHz
2801-003730
4
14 MHz
OSC
100 MHz
100 MHz
100 MHz
Confidential
33 MHz CLK3_PCLKMICOM
33 MHz
33 MHz
CLK1_MINIPCIE2 / 2#
LAN3_CLKREQ# CLK1_PCIELOM/PCIELOM#
CLK1_PEXNAND/FEXNAND#
CLK3_PCLKCB
CLK3_DBGLPC
3
MINI CARD (HSDPA)
LAN PHY
ROBSON
MICOM
CARDBUS
DEBUG PORT
10 MHz 1394 Clock
24.576 MHz
2801-003898
25 MHz
2801-003892
OPTION
2
OPTION
DRAW
CHECK
APPROVAL
MODULE CODE
ZHOU JUN
GUO LEI
KEVIN LEE
4/10/2007
TITLE
MP
1.1
TORINO 2
MAIN
CLOCK DISTRIBUTION
March 28, 2007 3:33:29 PM
DATE
DEV. STEP
REV
LAST EDIT
SAMSUNG
PART NO.
PAGE
1
ELECTRONICS
BA41-00727/8A
OF
A
546
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
BOARD INFORMATION
2
1
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
D
PCI Devices
Devices Cardbus
IDSEL# AD25
REQ/GNT# 0
Interrupts E,F,G
Voltage Rails
VDC CPU_CORE P1.05V
GFX_CORE P1.8V_AUX
P0.9V
C
B
P1.8V P1.2V P1.5V
P2.5V P3.3V P5.0V
P3.3V_AUX P5V_AUX
PRTC_BAT P3.3V_MICOM P5.0V_ALW P12.0V_ALW
2
I C / SMB Address
Devices ICH8
SODIMM0 1010 000X SODIMM1 CK-505 (Clock Generator)
MICOM BATTERY
EMC2102(Thermal Sensor)
Primary DC system power supply (7 to 21V) Core voltage for Processor (1.308~1.068V) Processor System Bus(PSB) Termination (1.05V) GMCH & ICH8 Core Voltage Core voltage for NB8M-SE (1.0 ~ 1.1V)
1.8V power rail for DDR2 (off in S4-S5)
0.9V switched power rail (off in S3-S5)
1.8V power rail for GDDR3 (off in S3-S5)
1.2V switched power rail (off in S3-S5)
1.5V switched power rail (off in S3-S5)
2.5V switched power rail (off in S3-S5)
3.3V switched power rail (off in S3-S5)
5.0V switched power rail (off in S3-S5)
3.3V power rail (off in S4-S5)
5.0V power rail (off in S4-S5)
3.0V power rail (ALWAYS ON)
3.3V always on power rail for MICOM 5V power rail (Always On)
12V power rail (Always On)
Address Master
1010 010X 1101 001x
Master 0001 011X
0111 101X
Hex
­A0h
A4h D2h
­16h
7Ah
Bus SMBUS Master
-
­Clock, Unused Clock Output Disable
Samsung
SMBUS Master
­Thermal Sensor
USB PORT Assign
PORT NUMBER 0
1 2 3 4 5 6 7
ASSIGNED TO SYSTEM PORT A
SYSTEM PORT B DMB CARD MINIPCI-E BLUETOOTH WIBRO SIM CARD HSDPA CAMERA
Confidential
System Power States
A
CHP3_SLPS1* S1, Powered-On-Suspend(POS) : In this state, all clocks(except the 32.768KHz clock) are stopped.
CHP3_SLPS3* S3, Suspend-To-RAM(STR) : The system context is maintained in system DRAM, but power is shut off to non-critical circuits. CHP3_SLP4S* S4, Suspend-To-Disk(STD) : The Context of the system is maintained on the disk. All power is then shut off to the system except for the logic required to resume. CHP3_SLPS5* S5, Soft Off(SOFF) : System context is not maintained. All power is shut off except for the logic required to restart. A full boot is required when waking.
The system context is maintained in system DRAM. Power is maintained to PCI, the CPU, memory controller, memory, and all other criticial subsystems.
Note that this state does not preclude power being removed from non-essential devices, such as disk drives. During this state, CPU can be selected for either Deep Sleep or Deeper Sleep.
In Deeper Sleep, CPU voltage reduced in this state to reduce the leakage power. Memory is retained, and refreshes continue. All clocks stop except RTC clock. Externally appears same as S5, but may have different wake events.
4
3
Crystal / Oscillator
TYPE Crystal
Crystal Crystal Crystal Crystal
VID(6:0)
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FREQUENCY
32.768KHz 10MHz
14.318MHz
24.576MHz 25MHz
CPU Core Voltage Table
Active Mode
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
01
0
0 0
0
0
0
1
0
0
0
1 1
0
0
0
1
0 01
0
0
1
0 0
1
0
0
1
01
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
1
0
0
1
1
0 1
1
1
0
1
1
00
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
0
1
0
0
1
0 0
0
1
0
1
0 0
1
0 0
1
0
0
0
1
0
1
0
DPRSLPVR DPRSTP* PSI2*
2
Voltage
0
1.5000 V
0
0
1.4875 V
0
0
1
10
1.4750 V
0
1
0
1.4625 V
1
1
0
1.4500 V
0
0
1
1.4375 V
1 1
1
1.4250 V
0 101
1.4125 V
1
1
1
0
0
1.4000 V
0 0
0
1
1.3875 V
0
1.3750 V
1
0
0
1
1
1.3625 V
1.3500 V
0
1
0
1
1.3375 V
1
0
1.3250 V 1
1
0
1
1
1
1.3125 V
0
0
0
1.3000 V
1.2875 V
0
1
0
0
1
1.2750 V
0 0
1.2625 V
1
1
0
0
1.2500 V
1
0
1
1
1.2375 V
1
1
0
1.2250 V
1
1
1.2125 V
1
1
1 0
0
1.2000 V
0
1
0
1.1875 V
0
0
1
1.1750 V
0 0
1
1
1.1625 V
1
0
0
1.1500 V
1
1.1375 V
10
0
1
1
1.1125 V
1 0
1
1 0
1.1000 V
0
0
0
0
1
1.0875 V
0
1
0
1.0750 V
0
1
1
1.0625 V
0
0
1
1.0500 V
1
0
1
1.0375 V
1
0
1
1.0250 V
1
1
1
1
1
1.0125 V
Active 0 1 0 or 1
DRAW
CHECK
APPROVAL
MODULE CODE
DEVICE ICH8-M Real Time Clock
MICOM CLOCK-Generator Cardbus Controller LAN
IMVP-6
Active/Deeper Sleep Dual Mode Region
VID(6:0)
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
DPRSLPVR DPRSTP* PSI2*
ZHOU JUN
GUO LEI
KEVIN LEE
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0
0 0 0
01.1250 V 0 0 0 0 0 0 0 0 0
0 1
0
0
0
1
0
0
1
1
0
0
0
1
0
0
1
0
1
1
1
0
0 1
0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
DATE
DEV. STEP
REV
LAST EDIT
0
1
0
1
1
0
1 1
0
1 1
11
1
1
1
00
0
0
0
0
0
1
0 1
0
0
0
0
0
1
1
1
0
0
0
0
1
0
1 0
0
1
1
1
0
1
1
1
0
0
1
0
0
1
0
0
1
1 1
1
0
1
1
0
0
1
1
1
1
0
0
1
1
1 1
1
1
1
1
1
0
0
0
0
1
0
0
0
0
0
1
0 0
1
0
1
1
0
0
0
1
1
0
0
1
0
1
0
1
1
0
1
1
0
0
0
0
1 0.0750 V
1
0 0
1
0
1 1
1
1
0
0
1
0
1
1
1
1
0
1
1
11
0
1
1
1
1
1
1
0
0
0
0
0
0
Deeper Slp 1 0 0 or 1
4/10/2007
MP
1.1
USAGE
H8S/2110BV CK-505 1394 LAN
Voltage
1.0000 V
0.9875 V
0.9750 V
0.9625 V
0.9500 V
0.9375 V
0.9250 V
0.9125 V
0.9000 V
0.8875 V
0.8750 V
0.8625 V
0.8500 V
0.8375 V
0.8250 V
0.8125 V
0.8000 V
0.7875 V
0.7750 V
0.7625 V
0.7500 V
0.7375 V
0.7250 V
0.7125 V
0.7000 V
0.6750 V
0.6625 V
0.6500 V
0.6375 V
0.6250 V
0.6125 V
0.6000 V
0.5875 V
0.5750 V
0.5625 V
0.5500 V
0.5375 V
0.5250 V
0.5125 V
0.5000 V
TITLE
BOARD INFORMATION
Deeper Sleep/Extended Deeper Sleep Dual Mode Region
VID(6:0)
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1 1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1
1
1 1
1
1
1 1
1
1
1
1
1
1
1
1
1
1
1
1 1
1
1
1 1
1 1
1
1
1
*"1111111" : 0V power good asserted.
0
1
0
1
0
1
0
0
1 1 1 1
1 1 1 1 1
1 1 1 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
0
1
0
1
0
0
0
1
0
0
1
0
1
0
01
1
1
1
1
0
1 0
1
0
00
1
0
1 0
1
1
0 0
1
1
1
1
0
1
0 1
1
0
1 1
0
1
1
1
1
1
0
0
0
0 0
1
0
0 0
0
0
1
0
1
1
0
0
0
1
0
0
1
0
1
0
1
0
1
0
1
1
1
0
0
1
1
0
0
1
1
0
1
1
0
00.6875 V
1
1
1
0
0
1
1
0 0
1
1
1
1
1
0
1
1
1
1
1
0
0
0
0
1
0
0
0
0
1
0
1
0
0
1
1
0
0
0
1
0
1
0
1
0
0
1 1
1
1
0
0
010.0000 V
1
0
1
1
0
0
1
0
0
1
1
0
1
1
1
0
1
0
1
1
0
1
1
1
1
0
1
1
1
1
1
TORINO 2
MAIN
March 28, 2007 3:33:29 PM
PAGE
1
Voltage
0.4875 V
0.4750 V
0.4625 V
0.4500 V
0.4375 V
0.4250 V
0.4125 V
0.4000 V
0.3875 V
0.3750 V
0.3625 V
0.3500 V
0.3375 V
0.3250 V
0.3125 V
0.3000 V
0.2875 V
0.2750 V
0.2625 V
0.2500 V
0.2375 V
0.2250 V
0.2125 V
0.2000 V
0.1875 V
0.1750 V
0.1625 V
0.1500 V
0.1375 V
0.1250 V
0.1125 V
0.1000 V
0.0875 V
0.0625 V
0.0500 V
0.0375 V
0.0250 V
0.0125 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
SAMSUNG
ELECTRONICS
PART NO.
BA41-00727/8A
OF
D
C
B
A
547
C
2
3
D
1
A
SAMSUNG PROPRIETARY
B
4
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
P3.3V
D
TP15281
CLK3_FM48 CLK3_USB48 CPU1_BSEL0 CPU1_BSEL1 CPU1_BSEL2
CLK3_ICH14
CHP3_CPUSTP#
CHP3_PCISTP#
CLK3_PWRGD
CLK3_PCLKICH
CLK3_PCLKMICOM
SEL_LCDCLK#
0 1
CLK3_PCLKCB CLK3_DBGLPC
GMCH3_CLKREQ#
CHP3_SATACLKREQ#
CLK3_SMBCLK
CLK3_SMBDATA
Pin20
Pin21 DOT96#
DOT96
SRC0#
SRC0
Pin24 LCDCLK
27MHz
C771 100nF
37-B2 25-A2
10-C4
10-C4 13-A3 25-A2 25-D2 25-D2
25-B2
25-C3
31-B4
36-A4
49-B4 13-B4
25-B2
8-A2 18-B417-B4
Pin25 LCDCLK#
27MHz_SS
13-A3 13-A310-C4
17-C4 18-C48-A2
C767 100nF
C744
10000nF
6.3V
R189 R188 R190
R199 R200
R201 R192 R194 R196 R197
14.31818MHz
C273
0.033nF
Y500
12
2801-004518
Place 14.318MHz within 500mils of Clock chip
FSC
FSB
CPU
FSA
BSEL0
0 0 0 0 1 1 1 1
BSEL1
0 0 1 1 0 0 1 1
BSEL2
0 1 0 1 0 1 0 1
HOST CLK
266 MHz 333 MHz 200 MHz 400 MHz 133 MHz 100 MHz 166 MHz RSVD
4
C774
C770
10000nF
100nF
6.3V 1%
10K 1%
10K
33 5%
5%33
2.2K 5% 1%10K
33 5%
100
5%
33 33 5% 33 5%
5%
33
Samsung
C274
0.033nF
EXT_GFX
R195
R918
NO_STUFF
1%
1%
1%10K
10K
10K
INT_GFX
R191
R917
R193
NO_STUFF
PCI2 is multiple used as TME on IDTCV179 IDTCV179 P/N: 1205-003159
Confidential
SMB3_CLK
SMB3_DATA
U20 SLG8SP513
19
VDD_IO
33
VDD_SRC_IO1
43
VDD_SRC_IO2
52
VDD_SRC_IO3
56
VDD_CPU_IO
27
VDD_PLL3_IO
55
NC
TP15280
17
USB_FS_A
64
FSB_TESTMODE
TP15279
5
REF_FS_C_TEST_SEL
44
CPUSTOP#
45
PCISTOP#
TP15278
63
CLKPWRGD_PWRDN#
TP15277
14
PCIF_5_ITP_EN
TP15282
13
PCI_4_SEL_LCDCLK#
TP15275
12
PCI_3
TP15276
11
PCI_2
TP15272
10
PCI_1_CLKREQ_B#
8
PCI_0_CLKREQ_A#
7
SCL
6
SDA
TP15268
3
XTAL_IN
TP15269
2
XTAL_OUT
18
VSS_48
59
VSS_CPU
22
VSS_IO
15
VSS_PCI
26
VSS_PLL3
1
VSS_REF
30
VSS_SRC1
36
VSS_SRC2
49
VSS_SRC3
1205-003156
SMBUS Address "D2h"
P3.3V
R711
10K
TP1065
1
G
RHU002N06 Q506
35-C335-C127-C325-D2
35-C325-D2 27-C3 35-C1
S
D
3
2
1
G
S
D
3
RHU002N06 Q507
4
VDD_REF
16
VDD_48
9
VDD_PCI
23
VDD_PLL3
46
VDD_SRC
62
VDD_CPU
61
CPU0
60
CPU0#
58
CPU1_MCH
SRC10
SRC10#
SRC9
SRC9#
SRC8_ITP
SRC8#_ITP#
SRC6
SRC6#
SRC4
SRC4#
SRC2
SRC2#
CLK3_SMBCLK
CLK3_SMBDATA
57 40
39 41
42 37
38 54
53 51
50 48
47 34
35 31
32 28
29 24
25 20
21
TP16368
CPU1_MCH#
SRC11_CLKREQH#
SRC11#_CLKREQG#
SRC7_CLKREQF#
SRC7#_CLKREQE#
SRC3_CLKREQC#
SRC3#_CLKREQD#
LCDCLK_27M
LCDCLK#_27M_SS
SRC0_DOT96
SRC0#_DOT96#
P3.3V
R753
R754
10K
10K
8-C418-C4 17-C4
2
C932
0.33nF
C933
0.33nF
8-B418-B4 17-B4
3
INT_GFX
INT_GFX
EXT_GFX
EXT_GFX
INT_GFX
INT_GFX
EXT_GFX
EXT_GFX
2
C772
10nF
C742
C743
10nF
100nF
5%
0
R214 R213
R210 R211
R569
R208 R209
R751 R752
R206 R207
R750 R749
5%
0
0 0
NO_STUFF
0
0 0
301
0 0
0 0
CLK REQ A#
B# E# MiniCard(WLAN) F#
DRAW
CHECK
APPROVAL
MODULE CODE
1%301 1%
ZHOU JUN
KEVIN LEE
C768 100nF
GUO LEI
C766 100nF
R89 R88 R21 R93
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
Mapping SRC_2
SRC_4 SRC_6 SRC_8
DATE
DEV. STEP
REV
LAST EDIT
C769 100nF
10-D4 10-D4
12-B2 12-B2
35-C2 35-C2
25-C1 25-C1
33-B4 33-B4
32-D4 32-D4 32-C4 35-C4
35-C4 35-C4
13-C1 13-C1
24-B4 24-B4
13-C1 13-C1
20-B1 20-B1
13-C1 13-C1
20-A4 20-A4
0 1K 0 1K
Device SATA
GMCH
GbE LAN (100M: N/A)
4/10/2007
MP
1.1
MMZ1608S121AT B524
C773
10000nF
6.3V
CLK0_HOST_CPU CLK0_HOST_CPU#
CLK0_HOST_GMCH CLK0_HOST_GMCH#
CLK1_MINIPCIE2 CLK1_MINIPCIE2#
CLK1_PCIEICH CLK1_PCIEICH#
CLK1_PEXNAND CLK1_PEXNAND#
CLK1_PCIELOM CLK1_PCIELOM#
LAN3_CLKREQ# MINIPCIE3_CLKREQ1#
CLK1_MINIPCIE1 CLK1_MINIPCIE1#
CLK1_MCH3GPLL CLK1_MCH3GPLL#
CLK1_SATA CLK1_SATA#
CLK1_DREFSSCLK CLK1_DREFSSCLK#
CLK3_27M CLK3_27M_SS
CLK1_DREFCLK CLK1_DREFCLK#
CLK1_PCIEGFX CLK1_PCIEGFX#
P1.05V
TITLE
TORINO 2
MAIN
CLOCK GENERATOR
March 28, 2007 3:33:29 PM
3.3V to 1.2V Translation for G72M
SAMSUNG
PART NO.
PAGE
1
ELECTRONICS
BA41-00727/8A
OF
C
B
A
548
A
B
C
D
4
3
2
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
1
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
CPU SOCKET : MEROM
P1.05V
CPU500-1 MEROM-SOCKET
CPU1_A#(16:3)
CPU1_ADSTB0#
CPU1_A#(35:17)
CPU1_ADSTB1#
12-D1
12-C2
12-D1
12-C2
3 4 5 6 7 8 9 10 11 12 13 14 15 16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
1 / 4
J4
A3*
L5
A4*
L4
A5*
K5
A6*
M3 N2
N3 P5 P2
P4 P1 R1 M1
Y2 U5 R3
W6
U4 Y5 U1 R4 T5
T3 W2 W5
Y4
U2
V4 W3
AA4 AB2 AA3
V1
J1
L2
A7* A8* A9* A10* A11* A12* A13* A14* A15* A16* ADSTB0*
A17* A18* A19* A20* A21* A22* A23* A24* A25* A26* A27* A28* A29* A30* A31* A32* A33* A34* A35* ADSTB1*
0
ADDR GROUP
1
ADDR GROUP
CONTROL
ICH
ADS* BNR*
BPRI*
BR0*
DEFER*
DRDY*
DBSY*
IERR*
INIT*
LOCK*
RESET*
RS0* RS1* RS2*
TRDY*
HITM*
A20M*
FERR*
IGNNE*
STPCLK*
LINT0 LINT1
SMI*
REQ0* REQ1* REQ2* REQ3* REQ4*
HIT*
R37
56
H1 E2 G5
F1 H5
F21 E1
TP15292
D20 B3
H4 C1
F3 F4 G3 G2
G6 E4
A6 A5 C4
D5 C6 B4 A3
Samsung
K3 H2 K2 J3 L1
12-C2
CPU1_ADS# CPU1_BNR#
12-C2
12-C2
CPU1_BPRI# CPU1_BREQ#
12-C2 12-B2
CPU1_DEFER# CPU1_DRDY#
12-B2
CPU1_DBSY#
12-B2
24-C2
CPU1_INIT# CPU1_LOCK#
12-B2
CPU1_CPURST#
12-A2
12-B4
CPU1_RS0#
12-A2
CPU1_RS1#
12-A2
CPU1_RS2#
12-B2
CPU1_TRDY# CPU1_HIT#
12-B2
CPU1_HITM#
12-B2 24-C2
CPU1_A20M#
CPU1_FERR#
24-C2
24-C2
CPU1_IGNNE#
24-C2
CPU1_STPCLK#
24-C2
CPU1_INTR
24-C2
CPU1_NMI CPU1_SMI#
24-C2
CPU1_REQ#(4:0)
12-A2
0 1 2 3 4
CPU1_D#(15:0)
CPU1_DSTBN0# CPU1_DSTBP0#
CPU1_DBI0#
CPU1_D#(31:16)
CPU1_DSTBN1# CPU1_DSTBP1#
CPU1_DBI1#
12-D4
12-B2 12-B2 12-B2
12-D4
12-B2 12-B2 12-B2
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
CPU500-2 MEROM-SOCKET
2 / 4
E22
D0*
F24
D1*
E26
D2*
G22
D3*
F23
D4*
G25
D5*
E25
D6*
E23
D7*
K24
D8*
G24
D9*
J24
D10*
J23
D11*
H22
D12*
F26
D13*
K22
D14*
H23
D15*
J26
DSTBN0*
H26
DSTBP0*
H25
DINV0*
N22
D16*
K25
D17*
P26
D18*
R23
D19*
L23
D20*
M24
D21*
L22
D22*
M23
D23*
P25
D24*
P23
D25*
P22
D26*
T24
D27*
R24
D28*
L25
D29*
T25
D30*
N25
D31*
L26
DSTBN1*
M26
DSTBP1*
N24
DINV1*
DATA GRP 0
DATA GRP 2
DSTBN2* DSTBP2*
DATA GRP 1
DATA GRP 3
DSTBN3* DSTBP3*
D32* D33* D34* D35* D36* D37* D38* D39* D40* D41* D42* D43* D44* D45* D46* D47*
DINV2*
D48* D49* D50* D51* D52* D53* D54* D55* D56* D57* D58* D59* D60* D61* D62* D63*
DINV3*
Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22
AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20
CPU1_D#(47:32)
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
12-D4
12-B2 12-B2 12-B2
12-D4
12-B2 12-B2 12-B2
CPU1_DSTBN2# CPU1_DSTBP2# CPU1_DBI2# CPU1_D#(63:48)
CPU1_DSTBN3# CPU1_DSTBP3# CPU1_DBI3#
C
B
Confidential
A
DRAW
CHECK
APPROVAL
MODULE CODE
4
3
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
4/10/2007
TITLE
TORINO 2
MP
1.1
MAIN
MEROM(1)
March 28, 2007 3:33:29 PM
1
SAMSUNG
ELECTRONICS
PART NO.
BA41-00727/8A
954
PAGE
OF
COM-22C-015(1996.6.5) REV. 3
24
B
C
1
SAMSUNG PROPRIETARY
A
D
3
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CPU SOCKET : MEROM
D
P24
P21
VSS_137
VSS_135N4VSS_136
VCC_51 VCC_52 VCC_53 VCC_54 VCC_55 VCC_56 VCC_57 VCC_58 VCC_59 VCC_60 VCC_61 VCC_62 VCC_63 VCC_64 VCC_65 VCC_66 VCC_67 VCC_68 VCC_69 VCC_70 VCC_71 VCC_72 VCC_73 VCC_74 VCC_75 VCC_76 VCC_77 VCC_78 VCC_79 VCC_80 VCC_81 VCC_82 VCC_83 VCC_84 VCC_85 VCC_86 VCC_87 VCC_88 VCC_89 VCC_90 VCC_91 VCC_92 VCC_93 VCC_94 VCC_95 VCC_96 VCC_97 VCC_98 VCC_99
VCC_100
VSS_146
VSS_147
VSS_148
T4
T26
U21
P6
VSS_138P3VSS_139
VSS_140R2VSS_141
AE9 AF10 AF12 AF14 AF15 AF17 AF18 AF20 AF9 B10 B12 B14 B15 B17 B18 B20 B7 B9 C10 C12 C13 C15 C17 C18 C9 D10 D12 D14 D15 D17 D18 D9 E10 E12 E13 E15 E17 E18 E20 E7 E9 F10 F12 F14 F15 F17 F18 F20 F7 F9
VSS_143
VSS_144
VSS_145
T1
R5
T23
CPU_CORE
R22
VSS_142
R25
VSS_120 VSS_119 VSS_118 VSS_117 VSS_116 VSS_115 VSS_114 VSS_113 VSS_112 VSS_111 VSS_110 VSS_109 VSS_108 VSS_107 VSS_106 VSS_105 VSS_104 VSS_103 VSS_102 VSS_101 VSS_100
VSS_99 VSS_98 VSS_97 VSS_96 VSS_95 VSS_94 VSS_93 VSS_92 VSS_91 VSS_90 VSS_89 VSS_88 VSS_87 VSS_86 VSS_85 VSS_84 VSS_83 VSS_82 VSS_81 VSS_80 VSS_79 VSS_78 VSS_77 VSS_76 VSS_75 VSS_74 VSS_73 VSS_72 VSS_71 VSS_70 VSS_69 VSS_68 VSS_67 VSS_66 VSS_65 VSS_64 VSS_63 VSS_62 VSS_61
K1 J5 J25 J22 J2 H6 H3 H24 H21 G4 G26 G23 G1 F8 F5 F25 F22 F2 F19 F16 F13 F11 E8 E6 E3 E24 E21 E19 E16 E14 E11 D8 D4 D26 D23 D19 D16 D13 D11 D1 C8 C5 C25 C22 C2 C19 C16 C14 C11 B8 B6 B24 B21 B19 B16 B13 B11 AF8 AF6 AF25
C
B
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60
CPU_CORE
A10 A12 A13 A15 A17 A18 A20
AA10 AA12 AA13 AA15 AA17 AA18 AA20
AA7
AA9 AB10 AB12 AB14 AB15 AB17 AB18 AB20
AB7
AB9 AC10 AC12 AC13 AC15 AC17 AC18
AC7
AC9 AD10 AD12 AD14 AD15 AD17 AD18
AD7
AD9 AE10 AE12 AE13 AE15 AE17 AE18 AE20
K23
A7 A9
VSS_163
Y3
Y6
K26
VSS_121
VSS_122
VSS_123K4VSS_124
VCC_1 VCC_2 VCC_3 VCC_4 VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12 VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34 VCC_35 VCC_36 VCC_37 VCC_38 VCC_39 VCC_40 VCC_41 VCC_42 VCC_43 VCC_44 VCC_45 VCC_46 VCC_47 VCC_48 VCC_49 VCC_50
VSS_160
VSS_161
VSS_162
Y21
Y24
M25
L21
L24
L3
M22
VSS_130
VSS_125
VSS_126
VSS_127L6VSS_128M2VSS_129
CPU500-4
MEROM-SOCKET
4 / 4
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
V5
W1
W4
V22
V25
W23
W26
N23
N26
VSS_131M5VSS_132N1VSS_133
VSS_134
VSS_149
VSS_151
VSS_152
VSS_150
V2
U6
U3
U24
CPU500-3 MEROM-SOCKET
A22
TP15067 TP15063
TP15064 TP15065 TP15066
TP15073 TP15062
C183
10000nF
6.3V
AD26
AF26
A21
D24 AE6
D21 A24 B25
C21 B23 B22
AA1 U26 R26
AF7 AE7
C23 D25 C24
AF1 A26
AE2 AF3 AE3 AF4 AE5 AF5 AD6
D7 B5 E5
D6
C7
Y1
BCLK0 BCLK1
SLP* DPSLP* DPRSTP* DPWR* PWRGOOD PSI*
VID_6 VID_5 VID_4 VID_3 VID_2 VID_1 VID_0
PROCHOT* THRMDA THRMDC THERMTRIP*
BSEL2 BSEL1 BSEL0
GTLREF COMP3
COMP2 COMP1 COMP0
VCCSENSE VSSSENSE
TEST1 TEST2 TEST3 TEST4 TEST5 TEST6
H CLK
3 / 4
THERMAL
XDP/ITP SIGNALS
RSVD
Samsung
C110
C107
10000nF
6.3V
C104
10000nF
6.3V
10000nF
6.3V
CLK0_HOST_CPU
CLK0_HOST_CPU#
CPU1_SLP#
CPU1_DPSLP#
CPU1_DPRSTP#
CPU1_DPWR#
CPU1_PWRGDCPU
CPU1_PSI#
CPU1_VID(6:0)
IF PROCHOT* USED, 56ohm -> 68ohm
CPU2_THERMDA CPU2_THERMDC
P1.05V
CPU1_THRMTRIP#
CPU1_BSEL2
R148
CPU1_BSEL1
1K
CPU1_BSEL0
1%
CPU_CORE
R147
2K 1%
CPU1_VCCSENSE CPU1_VSSSENSE
COMP0,2(COMP1,3) should be connected with Zo=27.4ohm(55ohm) trace shorter than 1/2" to their respective Banias socket pins.
GTLREF : Keep the Voltage divider within 0.5" of the First GTLREF0 with Z0= 55 ohm trace
Minimize coupling of any switching signals to this net
CPU VRM side : 330uF X 6ea
C113
C112
10000nF
6.3V
10000nF
6.3V
C102
10000nF
6.3V 6.3V
8-C1 8-C1
12-B4 24-C2
12-B2 24-C2 45-B4 45-B4
CPU1_PROCHOT#
11-C2 11-C2
8-C4 13-A3
8-C4 13-A3
10-A3 45-B4 10-A3
C100
10000nF
24-C213-B1
P1.05V
TP16322
13-A38-C4
R136 R137 R132 R131
45-B4
C101
10000nF
6.3V
R36
56 1%
24-C213-B111-B3
NO_STUFF
NO_STUFF
R8 1K
6 5 4 3 2 1 0
54.9
54.9
27.4 1%
1KR7
1%
C182
10000nF
6.3V
1% 1%27.4 1%
CPU_CORE
C106
10000nF
6.3V
C105
10000nF
6.3V
C103
10000nF
6.3V
C180
10000nF
6.3V
C181
10000nF
6.3V
C111
10000nF
6.3V
C176
10000nF
6.3V
20mils
C179
10000nF
6.3V
100 1%
R149
Confidential
R150
45-B4 10-C4
1%100
VCCA_1 VCCA_2
VCCP_1 VCCP_2 VCCP_3 VCCP_4 VCCP_5 VCCP_6 VCCP_7 VCCP_8
VCCP_9 VCCP_10 VCCP_11 VCCP_12 VCCP_13 VCCP_14 VCCP_15 VCCP_16
PREQ* PRDY*
BPM3* BPM2* BPM1* BPM0*
TCK
TDO TMS
TRST*
DBR*
RSVD_1
RSVD_2
RSVD_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9 RSVD_10
10-C445-B4
B26 C26
K6 J6 M6 N6 T6 R6 K21 J21 M21 N21 T21 R21 V21 W21 V6 G21
AC1 AC2 AC4 AD1 AD3 AD4
TP15068
AC5 AA6
TDI
AB3 AB5 AB6
TP15072
C20 D2
F6 D3 D22 M4 N5 T2 V3 B2 C3
CPU1_VCCSENSE
CPU1_VSSSENSE
R151 R134
R135 R133
R38
25V
C4
10nF
P1.5V
P1.05V
27.4 150
40.2 475
0
C5
10000nF
6.3V
EC5 330uF
2.5V AL
1% 1%
5%
1%
Placed as close as possible to each of the four VCCA pins.
P1.05V
ITP3_SYSRST#
25-D2
AA11 AA14 AA16 AA19
AA22 AA25
AB11 AB13 AB16 AB19 AB26
AC11 AC14 AC16 AC19 AC21 AC24
AD11 AD13 AD16 AD19
AD22 AB23 AD25
AE11 AE14 AE16 AE19 AE23 AE26
AF11 AF13 AF16 AF19
AF21
A11 A14 A16 A19
A23 A25
AA2
AA5 AA8 AB1
AB4 AB8
AC3 AC6 AC8
AD2
AD5 AD8 AE1
AE4 AE8
AF2
A2
A4 A8
P1.05V
C109 100nF
C114
C108
100nF
100nF
CHECK BULK CAP USING IF IT DOUBLED
4
C99 100nF
C178 100nF
C177 100nF
A
DATEDRAW
CHECK
APPROVAL
MODULE CODE
3
2
ZHOU JUN
GUO LEI
KEVIN LEE
DEV. STEP
REV
LAST EDIT
4/10/2007
TITLE
TORINO 2
MP
1.1
MAIN
MEROM(2)
March 28, 2007 3:33:29 PM
1
SAMSUNG
PART NO.
PAGE
ELECTRONICS
BA41-00727/8A
OF
5410
SAMSUNG PROPRIETARY
B
A
4 1
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
D
COM-22C-015(1996.6.5) REV. 3
2
3
C
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
Thermal Monitor
R778
10K
R781
C806
P3.3V_AUX
R783
R777
10K
10K
0
0.47nF
C807
0.47nF
FAN5_VDD
FAN3_FDBACK#
R779
10K
31-B2
31-C2
25-C2
43-B1 10-C4
10-C4
TP16369
TP15152
C808
20-A1
20-A1
1
EXT_GFX
2.2nF
Place nearby Memory
FAN Control
Line Width = 20 mil
11-C3
11-C3
KBC3_THERM_SMDATA KBC3_THERM_SMCLK
THERM_ALERT# THERM_STP#
CPU2_THERMDC CPU2_THERMDA
GFX3_THERMDN GFX3_THERMDP
2
MMBT3904 Q505
3
P3.3V
R228
10K
J4 HDR-3P-SMD
1 2 3
4
MNT1
5
MNT2
3711-005853
C
B
P5.0V
C816
10000nF
6.3V
KBC3_PWRGD
FAN5_VDD
FAN3_FDBACK#
CPU3_THRMTRIP#
11-B2
11-B2
11-B3
TRIP_SET
3.3 * R2 / (R1 + R2) = (T - 75) / 21 So: T = 100’C
CPU1_THRMTRIP#
P3.3V_AUX
C804
C817 100nF
36-A431-C425-B2
P3.3V_AUX
TP15150
Samsung
24-C213-B110-C4
MMBT3904
C805
10000nF
100nF
6.3V
0
R780
R782
100K 1%
R773
56.2K 1%
P1.05V P3.3V
R785
2K 1%
TP16370
1
32
Q508
U507 EMC2102
1
VDD_3V
24
VDD_5V_1
27
VDD_5V_2
14
POWER_OK
TP16317
16
RESET#
TP16318
10
FAN_MODE
25
FAN_1
26
FAN_2
28
TACH
13
THERMTRIP#
TP16319
9
SHDN_SEL
11
TRIP_SET
8
NC_1
15
NC_2
21
NC_3
1209-001718
SMBUS Address "7A"
R784
10K
11-C3
SMDATA
SMCLK
ALERT#
SYS_SHDN#
DN1 DP1
DN2 DP2
DN3 DP3
CLK_SEL
CLK_IN
GND
THRM_PAD
CPU3_THRMTRIP#
22 23
19 12
2 3
4 5
6 7
17 18
20 29
TP15146
TP16316
Confidential
A
DRAW
CHECK
APPROVAL
MODULE CODE
4
3
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
4/10/2007
TITLE
TORINO 2
MP
1.1
MAIN
THERMAL MONITOR
March 28, 2007 3:33:29 PM
1
SAMSUNG
PART NO.
11 54
PAGE
ELECTRONICS
BA41-00727/8A
OF
C
1
2
COM-22C-015(1996.6.5) REV. 3
3
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
SAMSUNG PROPRIETARY
B
4
A
D
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
P1.05V
U13
U12
CPU1_D#(63:0)
P1.05V
R35
221 1%
TP16371
C98
R34
100
100nF
1%
nearby Pin C2
12-A4
GMCH1_HSWING
P1.05V
R529
1K 1%
R528
2K 1%
TP16372
C531 100nF
nearby Pin A9, B9
12-A4
GMCH1_HVREF
CPU1_CPURST#
CPU1_SLP#
GMCH1_HSWING
GMCH1_HVREF
9-C3 10-D4
12-C4
12-B4
9-C29-C1
P1.05V
R587 R588
R530
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
Samsung
53 54 55 56 57 58 59 60 61 62 63
TP15296
54.9
1%
TP15297
1%
54.9
TP15298
24.9
1%
Confidential
M10
W10
AD12
AE3 AD9 AC9
AC7 AC14 AD11 AC11
AB2
AD7
AB1
AG3
AH8
AJ14
AE9
AE11
AH12
AH5
AE7
AH13
N12
P13
AC6 AE2 AC5
AJ9
AJ5 AJ6 AJ7
AJ2 AE5 AJ3 AH2
E2 G2 G7
M6
H7 H3 G4 F3 N8 H2
N9 H5
K9
M2
Y8 V4
M3
J1 N5 N3
W6 W9
N2 Y7 Y9 P4
W3
N1
Y3
B6 E5
W1 W2
B3 C2
A9 B9
HD*_0 HD*_1 HD*_2 HD*_3 HD*_4 HD*_5 HD*_6 HD*_7 HD*_8 HD*_9 HD*_10 HD*_11 HD*_12 HD*_13 HD*_14 HD*_15 HD*_16 HD*_17 HD*_18 HD*_19 HD*_20 HD*_21 HD*_22 HD*_23 HD*_24 HD*_25 HD*_26 HD*_27 HD*_28 HD*_29 HD*_30 HD*_31 HD*_32 HD*_33 HD*_34 HD*_35 HD*_36 HD*_37 HD*_38 HD*_39 HD*_40 HD*_41 HD*_42 HD*_43 HD*_44 HD*_45 HD*_46 HD*_47 HD*_48 HD*_49 HD*_50 HD*_51 HD*_52 HD*_53 HD*_54 HD*_55 HD*_56 HD*_57 HD*_58 HD*_59 HD*_60 HD*_61 HD*_62 HD*_63
H_CPURST* H_CPUSLP*
H_SCOMP H_SCOMP*
H_SWING H_RCOMP
H_DVREF H_AVREF
P1.05V
270uF
EC8 330uF
2.5V AL
Place on the edge
4
C579
220nF 16V
C29
4700nF 10V
Place in cavity
C97
2200nF
3
U11
VTT_1
VTT_2
Host Data Bus
VCC_1
AT35
AT34
VTT_3
VTT_4U9VTT_5U8VTT_6U7VTT_7U5VTT_8U3VTT_9
VCC_2
VCC_3
AH28
U2
U504-1 LE88CLGM 1 OF 5
VCC Core
VCC_8
VCC_4
VCC_5
VCC_6
VCC_7
AJ31
AJ28
AK32
AC32
AC31
T13
T11
VTT_10U1VTT_11
VTT
VCC_9
VCC_10
AH32
AH31
AH29
T10
VTT_12
VTT_13
VTT_14T9VTT_15T7VTT_16T6VTT_17T5VTT_18T3VTT_19
VCC_11
VCC_12
VCC_13
R30
AF32
TP15295
TP15294
TP15293
T2
VTT_20R3VTT_21R2VTT_22
VTT LF
VTTLF_1A7VTTLF_2F2VTTLF_3
AH1
R1
Host Address Bus
H_ADSTB*_0 H_ADSTB*_1
H_DSTBN*_0 H_DSTBN*_1 H_DSTBN*_2 H_DSTBN*_3
16V 470nF 16V 470nF 16V
HA*_3 HA*_4 HA*_5 HA*_6 HA*_7 HA*_8
HA*_9 HA*_10 HA*_11 HA*_12 HA*_13 HA*_14 HA*_15 HA*_16 HA*_17 HA*_18 HA*_19 HA*_20 HA*_21 HA*_22 HA*_23 HA*_24 HA*_25 HA*_26 HA*_27 HA*_28 HA*_29 HA*_30 HA*_31 HA*_32 HA*_33 HA*_34 HA*_35
H_ADS*
H_BNR*
H_BPRI*
H_BREQ*
H_DEFER*
H_DBSY*
H_DPWR*
H_DRDY*
H_HIT*
H_HITM* H_LOCK* H_TRDY*
HPLL_CLK
HPLL_CLK*
H_DINV*_0 H_DINV*_1 H_DINV*_2 H_DINV*_3
H_DSTBP*0 H_DSTBP*1 H_DSTBP*2 H_DSTBP*3
H_REQ*_0 H_REQ*_1 H_REQ*_2 H_REQ*_3 H_REQ*_4
H_RS*_0
H_RS*_1
H_RS*_2
470nF
C28 C581 C175
J13 B11 C11 M11 C15 F16 L13 G17 C14 K16 B13 L16 J17 B14 K19 P15 R17 B16 H20 L19 D17 M17 N16 J19 B18 E19 B17 B15 E17 C18 A19 B19 N19
G12 H17 G20 C8 E8 F12
D6 C10 H8 K7
E4 C6 G10 B7
AM5 AM7
K5 L2 AD13 AE13
M7 K3 AD2 AH11
L7 K2 AC2 AJ10
M14 E13 A11 H13 B12
E12 D7 D8
2
0 1 2 3 4
DRAW
CHECK
APPROVAL
MODULE CODE
10-D4
9-C3 9-C4
9-B4 9-C3 9-C3 9-C3
9-C3 9-C3
9-C3
9-B3
9-B3 9-C3 9-C3
8-C1 8-C1
9-C2
9-B2 9-C1
9-B1
9-C2
9-B2 9-C1
9-B1
9-C2
9-B2 9-C1
9-B1
9-B3
9-C3 9-C3 9-C3
3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
ZHOU JUN
GUO LEI
KEVIN LEE
9-C4
CPU1_ADS# CPU1_ADSTB0# CPU1_ADSTB1# CPU1_BNR# CPU1_BPRI# CPU1_BREQ#
CPU1_DEFER# CPU1_DBSY# CPU1_DPWR# CPU1_DRDY#
CPU1_HIT# CPU1_HITM# CPU1_LOCK# CPU1_TRDY#
CLK0_HOST_GMCH CLK0_HOST_GMCH#
CPU1_DBI0# CPU1_DBI1# CPU1_DBI2# CPU1_DBI3#
CPU1_DSTBN0# CPU1_DSTBN1# CPU1_DSTBN2# CPU1_DSTBN3#
CPU1_DSTBP0# CPU1_DSTBP1# CPU1_DSTBP2# CPU1_DSTBP3# CPU1_REQ#(4:0)
CPU1_RS0# CPU1_RS1# CPU1_RS2#
DATE
4/10/2007
DEV. STEP
MP
REV
1.1
LAST EDIT
CPU1_A#(35:3)
TITLE
TORINO 2
MAIN
965GM(1)
March 28, 2007 3:33:29 PM
1
SAMSUNG
PART NO.
12 54
PAGE
D
C
B
A
ELECTRONICS
BA41-00727/8A
OF
C
4
1
A
SAMSUNG PROPRIETARY
B
3
D
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
COM-22C-015(1996.6.5) REV. 3
2
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
GFX1_RXP(15:0)
GFX1_RXN(15:0)
20-C4 20-B4
0
6
5
3
0
1
8
2
5
9
4
6
7
3
12
11
10
1
15
13
14
8
7
4
2
10914
12
11
0
100nFC572
15
13
C570 100nF
W41
AB50
Y40
AB51
J51
L51
TV VGA
LVDSMISC
TP16377
N47
PEG_RXN_0
PEG_RXN_1
PEG_RXN_2
K33
TP15305
1%
CRT_DDC_CLK
G35
CRT_DDC_DATA
F33
CRT_HSYNC
E33
CRT_VSYNC
H32
CRT_BLUE
G32
CRT_BLUE*
K29
CRT_GREEN
J29
CRT_GREEN*
F29
CRT_RED
E29
CRT_RED*
C32
CRT_TVO_IREF
M35
TV_DCONSEL_0
P33
TV_DCONSEL_1
E27
TVA_DAC
G27
TVB_DAC
K27
TVC_DAC
F27
TVA_RTN
J27
TVB_RTN
L27
TVC_RTN
C37
L_DDC_CLK
D35
L_DDC_DATA
E39
L_CTRL_CLK
E40
L_CTRL_DATA
K40
L_VDD_EN
J40
L_BKLT_CTRL
H39
L_BKLT_EN
G51
LVDSA_DATAN_0
E51
LVDSA_DATAN_1
F49
LVDSA_DATAN_2
G50
LVDSA_DATAP_0
E50
LVDSA_DATAP_1
F48
LVDSA_DATAP_2
D46
LVDSA_CLK*
C45
LVDSA_CLK
G44
LVDSB_DATAN_0
B47
LVDSB_DATAN_1
B45
LVDSB_DATAN_2
E44
LVDSB_DATAP_0
A47
LVDSB_DATAP_1
A45
LVDSB_DATAP_2
D44
LVDSB_CLK*
E42
LVDSB_CLK
L41
LVDS_IBG
L43
LVDS_VBG
N41
LVDS_VREFH
N40
LVDS_VREFL
H35
SDVO_CTRL_CLK
K36
SDVO_CTRL_DATA
G39
CLK_REQ*
G40
ICH_SYNC*
A37
TEST_1
R32
TEST_2
P1.05V
INT_GFX
INT_GFX
INT_GFX
INT_GFX
R113 R145 R130 R144
R129
EXT_GFX
0 0 0 0
0
VGA3_DDCCLK
VGA3_DDCDATA
VGA3_HSYNC VGA3_VSYNC
VGA3_BLUE
VGA3_GREEN
VGA3_RED
LCD3_EDID_CLK
LCD3_EDID_DATA
LCD3_VDDEN
LCD3_BKLTCTRL
LCD3_BKLTEN
LCD1_ADATA0# LCD1_ADATA1# LCD1_ADATA2#
LCD1_ADATA0 LCD1_ADATA1 LCD1_ADATA2
LCD1_ACLK#
LCD1_ACLK
SDVO_CTRL_DATA
GMCH3_CLKREQ#
GMCH3_ICHSYNC#
29-A4 29-A2
29-B4 29-B4 29-C4
29-C4
29-C4
0 ohm@Ext.Gfx.
28-C4 28-C4
28-D2 28-B4 28-C2
28-C4 28-C4 28-C4
28-C4 28-C4 28-C4
28-C4 28-C4
INT_GFX
INT_GFX
P3.3V
16-B1 8-C4 25-B2
R94
R198
R100
R104 R108 R107 R105
R92
R96
150 1% 150
1% 1%
150
1%1.3K
TP16219 TP16218
TP15306 TP15307
2.4K 0
475
20K
TP15308
1%
1%10K
Int. Gfx. Core Voltage
W49
AD44
T45
T50
PEG_RXN_3
PEG_RXN_4
RSVD_1
RSVD_2
A35
B37
AD40
U40
Y44
PEG_RXN_8
PEG_RXN_9
PEG_RXN_5
PEG_RXN_6
PEG_RXN_7
PEG_RXN_10
PEG_RXN_11
W13
W14
R20
T14
VCC_AXG_3
VCC_AXG_4
VCC_AXG_1
VCC_AXG_2
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
Y17
Y19
Y20
Y21
Samsung
Confidential
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_3
B34
B36
C34
BJ29
BJ20
BF23
BG23
J50
AG46
PEG_RXN_12
Y12
VCC_AXG_5
VCC_AXG_NCTF_29
Y23
RSVD_10
BK22
L50
AH49
AG45
AG41
PEG_RXP_0
PEG_RXN_13
PEG_RXN_14
PEG_RXN_15
AA20
AA23
AA26
AA28
AB24
AB29
AB21
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
Y24
Y26
Y28
Y29
AA16
AA17
AB16
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_20
RSVD_21
BF19
BE24
BK18
BC23
BD24
BH39
BH20
18-D419-B4
19-C4 17-D4
CPU1_BSEL0 CPU1_BSEL1
CPU1_BSEL2 MCH3_CFG(5) MCH3_CFG(9)
M47
PEG_RXP_1
PEG_RXP_2
AC20
VCC_AXG_12
VCC_AXG_13
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
AB19
RSVD_22
RSVD_23
BJ18
Y48
AC45
U44
T49
PEG_RXP_3
PEG_RXP_4
AC21
AC23
VCC_AXG_14
VCC_AXG_15
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
AC17
AC16
RVSD CFG
RSVD_24
RSVD_25
BK20
AW20
MEM1_BMA(14) MEM1_AMA(14)
8-C4
8-C4 10-C4
16-B1 16-B1
AC41
T41
W45
PEG_RXP_8
PEG_RXP_9
PEG_RXP_5
PEG_RXP_6
PEG_RXP_7
PEG_RXP_10
PEG_RXP_11
AC24
AC26
AC28
AC29
AD20
AD23
AD24
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
AF16
AF19
AC19
AD15
AD16
AD17
AH15
RSVD_26
RSVD_27
RSVD_28
RSVD_29
RSVD_30
RSVD_31
RSVD_32
J12
P36
P37
R35
N35
H10
AR12
10-C4 10-C48-C4
N45
AH47
AG49
AH45
AG42
PEG_TXN_0
PEG_RXP_12
PEG_RXP_13
PEG_RXP_14
PEG_RXP_15
PCIE GFX
U504-2 LE88CLGM
AA31
AH20
AH21
AH23
AD28
AF21
AF26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
2 OF 5
GFX VCC NCTF
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
AJ16
AJ17
AJ19
AK16
AH16
AH17
AH19
RSVD_36
RSVD_37
RSVD_38
RSVD_39
RSVD_33
RSVD_34
RSVD_35
AL36
AN13
AR37
AR13
AM36
AM37
AM12
R31 R33 R32
U39
AH24
AK19
C48
4
7
1
4
8
2
3
6
100nFC574
100nFC571
100nFC573
100nFC618
C567 100nF
C610 100nF
C564 100nF
W46
W38
U47
N51
R50
T42
Y43
PEG_TXN_1
AH26
VCC_AXG_30
VCC_AXG_NCTF_54
AL16
RSVD_40
D47
PEG_TXN_8
PEG_TXN_2
PEG_TXN_3
PEG_TXN_4
PEG_TXN_5
PEG_TXN_6
PEG_TXN_7
T17
T18
AD31
AJ20
AN14
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_NCTF_2
VCC_AXG_NCTF_1
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
AL17
AL19
AL20
AL21
AL23
AM15
RSVD_41
RSVD_42
RSVD_43
RSVD_44
RSVD_45
B44
B51
C44
D20
TP16379
TP16378
1%
1K
1%
1K
1%
1K
9
13
10
15
12
11
14
100nFC623
100nFC622
100nFC616
C615 100nF
C608 100nF
C609 100nF
C612 100nF
AD39
AC46
AC49
AC42
AH39
AE49
AH44
PEG_TXN_9
PEG_TXN_10
PEG_TXN_11
PEG_TXN_12
PEG_TXN_13
PEG_TXN_14
PEG_TXN_15
T25
U15
T23
T21
T22
U16
T19
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_6
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_9
VCC_AXG_NCTF_3
GFX VCC NCTFGFX VCC
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
AP16
AP15
AM16
AM19
AM20
AM21
AM23
CFG_3
CFG_4
CFG_5
CFG_6
CFG_0
CFG_1
CFG_2
F23
P27
C21
C23
N23
N27
N24
TP16373
1
2
3
0
4
100nFC576
100nFC578
100nFC575
C565 100nF
C566 100nF
M45
T38
T46
N50
R51
PEG_TXP_0
PEG_TXP_1
PEG_TXP_2
PEG_TXP_3
PEG_TXP_4
U17
U19
U20
U21
U23
U26
V16
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
AP17
AP19
AP20
AP21
AP23
AP24
AR20
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
J20
J23
L23
E23
C20
R24
G23
8
6
9
7
5
11
10
100nFC620
100nFC617
100nFC577
100nFC621
C568 100nF
C614 100nF
C613 100nF
C569 100nF
AD47
AC50
U43
V17
AR21
E20
AD43
W42
Y47
Y39
AC38
PEG_TXP_5
PEG_TXP_6
PEG_TXP_7
PEG_TXP_8
PEG_TXP_9
PEG_TXP_10
PEG_TXP_11
Y16
V19
V20
V21
V23
V24
Y15
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
V26
V28
V29
Y31
AR23
AR24
AR26
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
L35
L32
K23
N33
M20
M24
18
19
20
DRAW
CHECK
APPROVAL
MODULE CODE
13
12
15
14
100nFC619
C611 100nF
C641 100nF
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX5EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
AG39
AE50
AH43
PEG_TXP_12
PEG_TXP_13
PEG_TXP_14
PEG_TXP_15
PCIE GFXDMICLK
VCC_AXG_NCTF_24
MEPMNC
VCC_AXG_NCTF_83
16-C1
16-B1 16-B1
ZHOU JUN
DEV. STEP
GUO LEI
REV
KEVIN LEE
LAST EDIT
GFX1_TXN(15:0)
20-C4
GFX1_TXP(15:0)
20-D4
PEG_COMPI
PEG_COMPO
GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3
GFX_VR_EN
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
DPLL_REF_CLK
DPLL_REF_CLK*
DPLL_REF_SSCLK
DPLL_REF_SSCLK*
PEG_CLK
PEG_CLK*
CL_CLK
CL_DATA
CL_PWROK
CL_RST*
CL_VREF
PM_BM_BUSY*
PM_DPRSTP* PM_EXT_TS*_0 PM_EXT_TS*_1
PWROK
RSTIN*
THERMTRIP*
DPRSLPVR
NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8
NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16
MCH3_CFG(20:18) MCH3_CFG(16)
4/10/2007
MP
1.1
N43 M43
E35 A39 C38 B39
E36 AN47
AJ38 AN42 AN46
AM47 AJ39 AN41 AN45
AJ46 AJ41 AM40 AM44
AJ47 AJ42 AM39 AM43
B42 C42 H48 H47 K44 K45
AM49 AK50 AT43 AN49
AM50 G41
L39 L36 J36 AW49 AV20 N20 G36
BJ51 BK51 BK50 BL50 BL49 BL3 BL2 BK1 BJ1 E1 A5 C51 B50 A50 A49 BK2
TITLEDATE
P1.05V
TP15303
10K
100 1%
1%
R143
31-B4 25-C3 25-A3 24-C2 11-B3 10-C4
10K
1%
R99
R98
MCH1_CLVREF
TORINO 2
MAIN
965GM(2)
March 28, 2007 3:33:29 PM
123
R91
24.9 1%
25-D1 25-D1 25-D1 25-C1
25-D1 25-D1 25-D1 25-C1 25-D1 25-D1 25-D1 25-D1
25-D1 25-D1 25-D1 25-D1
25-C1 25-C1 31-C2 25-C1 13-B1
25-D2
24-C2 10-D4
18-C2 17-C2 31-C2
25-C245-C4
13-B1
DMI1_TXN0 DMI1_TXN1 DMI1_TXN2 DMI1_TXN3
DMI1_TXP0 DMI1_TXP1 DMI1_TXP2 DMI1_TXP3
DMI1_RXN0 DMI1_RXN1 DMI1_RXN2 DMI1_RXN3
DMI1_RXP0 DMI1_RXP1 DMI1_RXP2 DMI1_RXP3
8-B1
CLK1_DREFCLK
8-B1
CLK1_DREFCLK#
8-B1
CLK1_DREFSSCLK
8-B1
CLK1_DREFSSCLK#
8-B1
CLK1_MCH3GPLL
8-B1
CLK1_MCH3GPLL# CL3_CLK
CL3_DATA KBC3_PWRGDMCH CL3_RST#
MCH1_CLVREF GMCH3_BMBUSY#
CPU1_DPRSTP# GMCH3_EXTTS0# GMCH3_EXTTS1# KBC3_PWRGDMCH PLT3_RST# CPU1_THRMTRIP# CHP3_DPRSLPVR
P3.3V
P1.25V
TP15300
SAMSUNG
PART NO.
PAGE
P3.3V
R603
1K 1%
0.350V
C642
R604
100nF
392 1%
10V
ELECTRONICS
BA41-00727/8A
13 54
OF
D
C
B
A
4
3
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
D
2
B
C
A
1
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
MEM1_ADQ(63:0)
17-D2
0
7
9
5
4
3
2
6
1
8
12
10
17
15
11
14
16
18
13
25
19
26
20
22
23
21
24
33
27
31
28
30
29
32
34
40
41
37
38
35
36
39
48
46
43
45
44
42
53
50
49
47
56
55
51
54
52
63
59
62
60
57
61
58
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
SA_DQ_13
SA_DQ_14
SA_DQ_15
SB_DQ_12
SB_DQ_13
SB_DQ_14
BF50
BA51
AY49
13
12
11
SA_DQ_16
SA_DQ_17
SA_DQ_18
SB_DQ_15
SB_DQ_16
SB_DQ_17
BJ50
BJ44
BF49
14
16
15
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SYSTEM MEMORY A
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
BK47
19
BK49
20
BK43
21
BK42
22
BJ41
23
BL41
24
BJ37
25
BJ43
17
BL43
18
Dual Channel SM_CK(2:0)
SM_CK(2:0)* SM_CK(5:3) SM_CK(5:3)* SM_CS(1:0)* SM_CKE(1:0) SM_ODT(1:0) SA_ODT(1:0) SM_CS(3:2)* SM_SKE(3:2) SM_ODT(3:2)
AW41
AY41
AV38
AT38
AV13
AT13
AW11
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
U504-3 LE88CLGM
3 OF 5
SYSTEM MEMORY B
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
BJ36
BJ40
BL35
BK41
BK37
BK13
BE11
27
29
32
30
31
26
28
Ch. A (So-DIMM A) SA_CK(2:0) N/A
SA_CK(2:0)* N/A N/A SA_CS(1:0)* SA_CKE(1:0)
N/A N/A N/A
AV11
AU15
AT11
SA_DQ_35
SA_DQ_36
SB_DQ_34
SB_DQ_35
BK11
BC11
BC13
33
34
35
BA13
BA11
BE10
BD10
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_37
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
BJ10
BE12
BC12
BG12
37
36
38
39
Ch. B (So-DIMM B)
N/A SB_CK(2:0) SB_CK(2:0)* N/A N/A N/A SB_CS(3:2)* SB_CKE(3:2) SB_ODT(3:2)
BD8
AY9
BG10
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
BL9
BL5
BK5
42
41
40
AW9
BD7
BB9
SA_DQ_45
SA_DQ_46
SA_DQ_47
SB_DQ_44
SB_DQ_45
SB_DQ_46
BJ8
BK9
BK10
43
44
45
BB5
AY7
AT5
SA_DQ_48
SA_DQ_49
SA_DQ_50
SB_DQ_47
SB_DQ_48
SB_DQ_49
BJ6
BF4
BH5
47
48
46
2
AY6
BB7
AT7
SA_DQ_52
SA_DQ_53
SA_DQ_51
SB_DQ_50
SB_DQ_51
SB_DQ_52
BK3
BC2
BG1
50
51
49
AR5
AR8
AR9
SA_DQ_54
SA_DQ_55
SA_DQ_56
SB_DQ_53
SB_DQ_54
SB_DQ_55
BJ2
BE4
BD3
54
53
52
DRAW
CHECK
APPROVAL
MODULE CODE
AN3
AM8
AN10
SA_DQ_57
SA_DQ_58
SA_DQ_59
SB_DQ_56
SB_DQ_57
SB_DQ_58
BA3
BB3
AR1
57
56
55
AT9
AN9
AM9
SA_DQ_60
SA_DQ_61
SA_DQ_62
SB_DQ_59
SB_DQ_60
SB_DQ_61
AT3
AY2
AY3
60
59
58
KEVIN LEE
AN11
SA_DQ_63
SB_DQ_62
SB_DQ_63
AT2
AU2
62
61
63
ZHOU JUN
GUO LEI
SM_VREF_0 SM_VREF_1
SB_DQS*_0 SB_DQS*_1 SB_DQS*_2 SB_DQS*_3 SB_DQS*_4 SB_DQS*_5 SB_DQS*_6 SB_DQS*_7
SYSTEM MEMORY B DDR MUX
SB_RCVEN*
DATE
DEV. STEP
REV
LAST EDIT
SM_CK*0 SM_CK*1 SM_CK*3 SM_CK*4
SM_CK0 SM_CK1 SM_CK3 SM_CK4
SM_CKE0 SM_CKE1 SM_CKE3 SM_CKE4
SB_BS_0 SB_BS_1 SB_BS_2
SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13
SB_CAS*
SB_RAS*
SB_WE*
4/10/2007
MP
1.1
AR49 AW4
AW30 BA23 AW25 AW23
AV29 BB23 BA25 AV23
BE29 AY32 BD39 BG37
AY17 BG18 BG36
AR50 BD49 BK45 BL39 BH12 BJ7 BF3 AW2
AU50 BC50 BL45 BK38 BK12 BK7 BF2 AV3
AT50 BD50 BK46 BK39 BJ12 BL7 BE2 AV2
BC18 BG28 BG25 AW17 BF25 BE25 BA29 BC28 AY28 BD37 BG17 BE37 BA39 BG13
BE17 AV16 BC17 AY18
18-D3
TITLE
44-B4 18-C2 17-C2
19-C2 17-C4
19-C2 18-C4
19-C2 18-C4
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
0 1 2 312 4 5 6 7
0 1 2 3 4 5 6 7 8 9 10 11 12 13
MEM1_BDQ(63:0)
TORINO 2
MAIN
965GM(3)
March 28, 2007 3:33:29 PM
17-C4 17-C4 18-C4 18-C4
17-C4 17-C4 18-C4 18-C4
17-C419-C2
18-C419-C2
18-C419-C2 18-C419-C2
18-B4
18-B4
18-B4
18-D419-B4
18-C419-C2 18-C419-C2 18-C419-C2
1
MEM1_VREF CLK1_MCLK0#
CLK1_MCLK1# CLK1_MCLK2# CLK1_MCLK3#
CLK1_MCLK0 CLK1_MCLK1 CLK1_MCLK2 CLK1_MCLK3
MEM1_CKE0 MEM1_CKE1 MEM1_CKE2 MEM1_CKE3
MEM1_BBS0 MEM1_BBS1 MEM1_BBS2 MEM1_BDM(7:0)
MEM1_BDQS#(7:0)
MEM1_BDQS(7:0)
MEM1_BMA(13:0)
MEM1_BCAS# MEM1_BRAS# MEM1_BWE#
SAMSUNG
PART NO.
14 54
PAGE
ELECTRONICS
BA41-00727/8A
BA45
AT42
AW47
BB45
BF48
AR41
AR45
AY46
AR43
BB19
AW44
MEM1_ABS0 MEM1_ABS1 MEM1_ABS2
MEM1_ADM(7:0)
MEM1_ADQS#(7:0)
MEM1_ADQS(7:0)
MEM1_AMA(13:0)
MEM1_ACAS# MEM1_ARAS#
MEM1_AWE#
MEM1_CS0# MEM1_CS1# MEM1_CS2# MEM1_CS3#
MEM1_ODT0 MEM1_ODT1 MEM1_ODT2 MEM1_ODT3
P1.8V_AUX
Route as short as possible
19-C217-C4
19-C217-C4 17-C4 19-C2 17-B4
17-B4
17-B4
17-D4 19-C4
19-C217-C4 17-C4 19-C2
19-C217-C4
19-D217-C4 17-C4 19-D2
19-C218-C4 18-C4 19-C2
19-C217-B4 17-B4 19-C2 18-B4
19-C2 18-B4 19-C2
22.61%
1%
22.6
R630 R631
20ohm
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7 8 9 10 11
13
TP15302 TP15301
P1.8V_AUX
R152
1K 1%
R154
3.01K 1%
R153
1K 1%
C227
10nF 16V
C228
2200nF
C226
10nF 16V
BK19
BD44
BD42 AW38 AW13
BD47
BC41
BA37
BA16
BE48
BB43
BC37
BB16
BD20
BK27
BH28
BK28
BA28
BC19
BE28
BG30
BE18
BA19
AY20
BG20
BK16
BG16
BE13
BH18
C229
2200nF
BF29 AT45
BG8
AY5 AN6
AT47
BH7 BC1 AP2
AT46
BH6 BB2 AP3
BJ19
BL24 BJ27
BJ25 BL28
BJ16 BL17
BJ15 BJ14 BE16
BL15 BK14
BK31 BL31
SA_BS_0 SA_BS_1 SA_BS_2
SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
SA_DQS*_0 SA_DQS*_1 SA_DQS*_2 SA_DQS*_3 SA_DQS*_4 SA_DQS*_5 SA_DQS*_6 SA_DQS*_7
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13
SA_CAS* SA_RAS* SA_WE* SA_RCVEN*
SM_CS*_0 SM_CS*_1 SM_CS*_2 SM_CS*_3
SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3
SM_RCOMP SM_RCOMP*
SM_RCOMP_VOH SM_RCOMP_VOL
SA_DQ_2
SA_DQ_0
SA_DQ_1
SYSTEM MEMORY ADDR MUX
Samsung
SB_DQ_0
SB_DQ_1
AP49
AR51
AW50
Confidential
1
0
SA_DQ_4
SA_DQ_5
SA_DQ_3
SB_DQ_3
SB_DQ_4
SB_DQ_2
AN50
AN51
AW51
3
4
2
SA_DQ_6
SA_DQ_7
SA_DQ_8
SB_DQ_5
SB_DQ_6
SB_DQ_7
AV50
AV49
BA50
6
7
5
BG47
SA_DQ_9
SA_DQ_10
SA_DQ_11
SB_DQ_10
SB_DQ_8
SB_DQ_9
BE50
BA49
BB50
10
9
8
SA_DQ_12
SB_DQ_11
4
3
D
C
B
A
OF
B
C
3
A
2
4
D
SAMSUNG PROPRIETARY
1
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
C673
10000nF
6.3V
C92 100nF
AL2.5V
330uFEC501
P1.05V_PEG
C91 10nF
C524 100nF
P3.3V
R87
0
P1.05V
C95 100nF
R95
0
R101
0
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
R526
0
EXT_GFX
EXT_GFX
P1.05V_PEG
C89 100nF
TP16388
R527
0
TP16390
R27
0
TP16391 TP16392
TP16393 TP16394
TP16395
R109
0
AD51
V49
V50 W50 W51
U51
K50
U48
J41
H42
A41
A43
J32
A33
B33
A30
C25
B25
C27
B27
B28
A28
B49
H49
AL2 AM2 AN2
AJ50 AH50
AH51
C40
B40 M32
L29
N28
R106
0
EXT_GFX
EXT_GFX
P1.05V
R90
R103
EC503
330uF
C526
10nF
C220 100nF
C639 100nF
100nF
B19
EXCML16A270u
C674
10000nF
2.5V
6.3V
AL
C640 100nF
0
C527
10nF
NO_STUFF@Int.Gfx.
0
C25
C26
22nF
25V
6.3V22000nF
2.5V AL
100nFC624
EC2 330uF
C626
TP15314
C90 100nF
100nFC88
91nH, 20mOhm ESR
P1.25V
B18
P1.8V_AUX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
BLM18PG181SN1
R602
1
TP16385 TP16386
C672
10000nF
6.3V
L500
1uH
C525 330uF
2.5V AL
NO_STUFF@Ext.Gfx.
P3.3V
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
P1.25V
B518
B11 B520 B519
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
100nFC644
B514 BLM18PG181SN1
C528
10000nF
6.3V
NO_STUFF@Ext.Gfx.
MMZ1608S121AT MMZ1608S121AT MMZ1608S121AT MMZ1608S121AT
R146
1
C221
22000nF
6.3V
C643 100nF
Shared Filtering with VCC_PEG
10
0
B12
100nF
TP15313
C93
R23
100nF
C24
P3.3V
C94
100nF
P1.05V
INT_GFX
INT_GFXINT_GFX
INT_GFX
INT_GFX
P1.5V
13
D4
MMBD301
R110
BLM18PG181SN1
TP15315
NO_STUFF@Ext.Gfx.
P1.05V
U29
T35
AM35
AL35
AL33
AK37
AK36
AP35
AR35
AP36
AR36
VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5
VCCA_PEG_PLL VCCA_PEG_BG VCCD_PEG_PLL VCCD_LVDS_1
VCCD_LVDS_2 VCCA_LVDS VCC_TX_LVDS VCC_SYNC VCCA_CRT_DAC_1
VCCA_CRT_DAC_2 VCCA_DAC_BG VCCA_TVA_DAC_1
VCCA_TVA_DAC_2 VCCA_TVB_DAC_1
VCCA_TVB_DAC_2 VCCA_TVC_DAC_1
VCCA_TVC_DAC_2 VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL VCCD_HPLL VCC_DMI VCC_RXR_DMI_1
VCC_RXR_DMI_2
Samsung
VCC_HV_1 VCC_HV_2
VCCD_CRT VCCD_TVDAC
VCCD_QDAC
Confidential
PEGLVDSCRTTVPLLDMIHVTV/CRT
VCC_NCTF_1
VCC_SM_3
VCC_SM_2
VCC_SM_1
AU33
AU30
AU32
P1.8V_AUX
VCC_NCTF_2
VCC_NCTF_3
VCC_SM_4
VCC_SM_5
AV33
AU35
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_4
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
AY35
BA32
AW33
AW35
EC504 330uF
2.5V AL
AK35
AK33
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
BA33
BA35
BB33
BC32
C676
22000nF
6.3V
AH33
AF36
AF33
AD36
AD35
AD33
AC36
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC NCTF
AC35
VCC_NCTF_24
AJ36
AJ35
AJ33
AH37
AH36
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
AH35
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
U504-4 LE88CLGM
4 OF 5
VCC SM VCC SM CK VCC SM LF
VCC_SM_25
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
BF33
BF34
BG33
BG32
L501
1uH
C677
100nF
VCC_SM_26
VCC_SM_24
BH32
BH34
BG35
VCC_SM_14
VCC_SM_15
VCC_SM_16
BC33
BC35
BD32
BD35
C716 22000nF
6.3V
VCC_SM_17
VCC_SM_18
VCC_SM_19
BE32
BE33
BE35
AC33
AB37
AB36
AB33
AA36
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
BJ32
BJ33
BJ34
BK32
BH35
R629
1
AA33
Y37
Y36
Y35
AA35
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_31
VCC_NCTF_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
BL33
BK33
BK34
BK35
TP16396
C680
22000nF
6.3V
Y33
Y32
V37
V36
V33
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
BJ24
BJ23
BK24
BK23
C678
10000nF
6.3V
V32
U36
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_SM_CK_4
C679
100nF
U35
U33
U32
U31
VCC_NCTF_43
VCC_NCTF_44
VCC_NCTF_45
VCC_NCTF_46
VCC_SM_LF_1
VCC_SM_LF_2
VCC_SM_LF_3
BE39
BC39
BD17
AW45
C208
C209
C210
10000nF
10000nF
16V470nF
6.3V
6.3V
T34
T30
VCC_NCTF_48
VCC_NCTF_49
VCC_NCTF_47
VCC_SM_LF_4
VCC_SM_LF_5
VCC_SM_LF_6
AT6
BD4
AW8
C217
C219
C216
100nF16V
220nF16V
16V220nF
VCC_NCTF_50
VCC AXM NCTFVCC AXM A SMA SM NCTFA SM CKVCC AXD
VCC AXF
VCC_SM_LF_7
C218
16V100nF
P1.05V
EC4 330uF
2.5V AL
Check Load Transient
VCC_AXM_NCTF_1 VCC_AXM_NCTF_2 VCC_AXM_NCTF_3 VCC_AXM_NCTF_4 VCC_AXM_NCTF_5 VCC_AXM_NCTF_6 VCC_AXM_NCTF_7 VCC_AXM_NCTF_8
VCC_AXM_NCTF_9 VCC_AXM_NCTF_10 VCC_AXM_NCTF_11 VCC_AXM_NCTF_12 VCC_AXM_NCTF_13 VCC_AXM_NCTF_14 VCC_AXM_NCTF_15 VCC_AXM_NCTF_16 VCC_AXM_NCTF_17 VCC_AXM_NCTF_18 VCC_AXM_NCTF_19
VCC_AXM_1 VCC_AXM_2 VCC_AXM_3 VCC_AXM_4 VCC_AXM_5 VCC_AXM_6 VCC_AXM_7
VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5 VCCA_SM_6 VCCA_SM_7 VCCA_SM_8 VCCA_SM_9
VCCA_SM_10
VCCA_SM_NCTF_1
VCCA_SM_NCTF_2
VCCA_SM_CK_1 VCCA_SM_CK_2
VCC_AXD_1 VCC_AXD_2 VCC_AXD_3 VCC_AXD_4 VCC_AXD_5 VCC_AXD_6
VCC_AXD_NCTF_1
VCC_AXF_1 VCC_AXF_2 VCC_AXF_3
C173
10000nF
6.3V
AL24 AL26 AL28 AL29 AL31 AL32 AM26 AM28 AM29 AM31 AM32 AM33 AP29 AP31 AP32 AP33 AR31 AR32 AR33
AJ23 AJ26 AK23 AK24 AK29 AT31 AT33
AW18 AV19 AU19 AU18 AU17 AT22 AT21 AT19 AT18 AT17
AR17 AR16
BC29 BB29
AU28 AU24 AT30 AT29 AT25 AT23
AR29 B23
B21 A21
C625
10000nF
6.3V
P1.05V
TP16399
C580
1000nF
C96
220nF 16V
C174
220nF 16V
C30
220nF 16V
D
C
P1.25V
EC16 150uF
6.3V OXI
C214 22000nF
6.3V
C671 22000nF
6.3V
C212
1000nF
6.3V
C670
4700nF 10V
P1.25V
C211
C213
C669
C27
1000nF
1000nF
100nF
6.3V
6.3V
22000nF
6.3V
B
B20 BLM18PG181SN1
C172
C215
1000nF
22000nF
6.3V
6.3V
C530
C529
1000nF
10000nF
6.3V
6.3V
A
DRAW
CHECK
MODULE CODE
4
3
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REVAPPROVAL
LAST EDIT
4/10/2007
TITLE
TORINO 2
MP
1.1
MAIN
965GM(4)
March 28, 2007 3:33:29 PM
1
SAMSUNG
PART NO.
PAGE
ELECTRONICS
BA41-00727/8A
OF
5415
B
SAMSUNG PROPRIETARY
D
1
A
2
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
4
3
COM-22C-015(1996.6.5) REV. 3
C
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
AN43
AN5
AN7
AP4
AP48
AP50
AR11
VSS_78
VSS_79
VSS_80
C36
C7 D13 D24
D3 D32 D39 D45 D49 E10 E16 E24 E28 E32 E47 F19 F36
F4 F40 F50
G1 G13 G16 G19 G24 G28 G29 G33 G42 G45 G48
G8 H24 H28
H4 H45 H50
J11 J16
J2 J24 J28 J33 J35 J39
K12 K47
K8
L1
L17 L20
VSS_SCB_5
VSS_SCB_6
C1
BL51
AR2
VSS_81
VSS_82
VSS_83
VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261
VSS_NCTF_1
VSS_NCTF_2
AA19
AB17
AB35
AM4
AM41
AM45
AN1
AN38
A13
VSS_1
A15
VSS_2
A17
VSS_3
A24
VSS_4
AA21 AA24 AA29 AA32 AB20 AB23 AB26 AB28 AB31 AB32 AC10 AC13
AC39 AC43 AC47
AD21 AD26 AD29
AD32 AD41 AD45 AD49
AD50 AE10
AE14 AF20
AF23 AF24 AF28 AF29 AF31
AG2 AG38 AG43 AG47 AG50
AH40 AH41
AJ11 AJ13 AJ21 AJ24 AJ29 AJ32 AJ43 AJ45 AJ49 AK20 AK21 AK26 AK28 AK31 AK51
AM11 AM13
AM3
AC3
AD1
AD3
AD5 AD8
AE6
AH3
AH7 AH9
AL1
VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70
VSS
VSSA_PEG_BG
K49
AN39
VSS_77
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS SCB VSS NCTF VSS
VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSSA_DAC_BG
VSSA_LVDS
A3
B2
A51
BL1
B32
B41
AT27
AT41
AT49
AU1
AU23
AU29
AU3
AU36
VSS_93
VSS_94
VSS_95
VSS_96
VSS
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
T27
AP28
AR15
AR19
AR28
AU49
AU51
AV25
AV39
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
T37
V31
V35
U24
U28
AV48
AW1
AW12
AW16
AW24
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287
VSS
VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312
VSS_NCTF_21
VSS_191
BK8
BL11
AW29
AW32
VSS_107
VSS_108
VSS_109
VSS_192
VSS_193
VSS_194
BL13
BL19
AW5
AW7
VSS_110
VSS_111
L24 L28 L3 L33 L49 M28 M42 M46 M49 M5 M50 M9 N11 N14 N17 N29 N32 N36 N39 N44 N49 N7 P19 P2 P23 P29 P3 P50 R49 T39 T43 T47 U41 U45 U50 V2 V3 W11 W39 W43 W47 W5 W7 Y11 Y13 Y2 Y41 Y45 Y49 Y5 Y50
VSS_195
VSS_196
BL22
BL37
AY10
AY24
VSS_112
VSS_113
VSS_197
VSS_198
C12
BL47
AY37
AY42
VSS_114
VSS_115
VSS_200
VSS_199
C19
C16
AY43
AY45
VSS_116
VSS_117
VSS_201
VSS_202
C28
C29
AY47
AY50
VSS_118
VSS_119
VSS_203
VSS_204
T33
C33
B10
VSS_120
VSS_205
VSS_206
T31
T29
VSS_207
VSS_208
R28
C50
VSS_209
VSS_210
C46
C41
VSS
VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190
B20 B24 B29 B30 B35 B38 B43 B46 B5 B8 BA1 BA17 BA18 BA2 BA24 BB12 BB25 BB40 BB44 BB49 BB8 BC16 BC24 BC25 BC36 BC40 BC51 BD13 BD2 BD28 BD45 BD48 BD5 BE1 BE19 BE23 BE30 BE42 BE51 BE8 BF12 BF16 BF36 BG19 BG2 BG24 BG29 BG39 BG48 BG5 BG51 BH17 BH30 BH44 BH46 BH8 BJ11 BJ13 BJ38 BJ4 BJ42 BJ46 BK15 BK17 BK25 BK29 BK36 BK40 BK44 BK6
** Note
CFG# CFG(5)
CFG(9) CFG(16)
CFG(18) CFG(19)
CFG(20) SDVO_CTRL_DATA
MCH3_CFG(18)
MCH3_CFG(19)
MCH3_CFG(20)
SDVO_CTRL_DATA
MCH3_CFG(5)
MCH3_CFG(9)
MCH3_CFG(16)
Current Setting
Low
DMIx2 PEG Reversal Dynamic ODT Disabled VCC 1.05V (def.) DMI Lane Normal SDVO or PCIE X1
Only(def.) No SDVO Device Present (def.)
13-A2
13-A2
13-A2
13-B4
13-A3
13-A3 13-A2
** Note
CFG(17:3) CFG(20:18)
AR39
AR44
AR47
AR7
AT10
AT14
VSS_91
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_92
VSS_84
VSS_85
U504-5 LE88CLGM
5 OF 5
VSS
Samsung
Confidential
VSS_NCTF_10
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
AF17
AF35
AK17
AM17
VSS_NCTF_11
AP26
AM24
VSS_NCTF_3
VSS_NCTF_4
AD19
AD37
(def. : default Option)
High
DMIx4 (def.) Normal Dynamic ODT Enabled (def.) VCC 1.5V DMI Lane Reversal
SDVO and PCIE X1 Simultaneously SDVO Device Present
TP16220
R102
TP16221 TP16222 TP16223
TP16401
R111
TP16402
R112
Internal Pull-up Internal Pull-down
P3.3V
1K
2K
NO_STUFF
1%
NO_STUFF
1%2K
NO_STUFF
D
C
B
A
DRAW
CHECK
APPROVAL
MODULE CODE
4
3
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
4/10/2007
TITLE
TORINO 2
MP
1.1
MAIN
965GM(5)
March 28, 2007 3:33:29 PM
1
SAMSUNG
PART NO.
16
PAGE
ELECTRONICS
BA41-00727/8A
OF
54
B
D
A
4
1
2
D:/users/mentor/Torino2/MP/T2_MP1.1_0410
SAMSUNG PROPRIETARY
3
COM-22C-015(1996.6.5) REV. 3
C
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
SODIMM0 (TOP)
DDR1-1
MEM1_AMA(14:0)
CLK1_MCLK0# CLK1_MCLK1#
CLK3_SMBCLK
CLK3_SMBDATA
MEM1_ADM(7:0)
MEM1_ADQS(7:0)
MEM1_ADQS#(7:0)
MEM1_ABS2 MEM1_ABS0
MEM1_ABS1 MEM1_CS0#
MEM1_CS1# CLK1_MCLK0 CLK1_MCLK1
MEM1_CKE0
MEM1_CKE1
MEM1_ACAS# MEM1_ARAS#
MEM1_AWE#
MEM1_ODT0 MEM1_ODT1
13-A3
19-C414-C4
19-C214-D4
19-C214-D4
14-D4 19-C2
14-B4
19-D2 19-D214-B4
14-D1 14-D1 14-D1 14-D1
19-C214-C1
14-C1 19-C2
14-B4 19-C2
19-C214-B4 19-C214-B4
R772 R771
8-A2 8-C4 18-C4
8-B48-A2
18-B4
14-B4 19-C2
19-C214-B4
14-D4
14-C4
14-C4
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
TP16403
10K
TP16404
10K
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
0 1 2 3 2200nF 4 5 6 7
DDR2-SODIMM-200P-STD
1/2
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10_AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0*
115
S1*
30
CK0
32
CK0*
164
CK1
166
CK1*
79
CKE0
80
CKE1
113
CAS*
108
RAS*
109
WE*
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
Samsung
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS*0
29
DQS*1
49
DQS*2
68
DQS*3
129
DQS*4
146
DQS*5
167
DQS*6
186
DQS*7
Confidential
3709-001325
Height: 4mm SMBUS ADDR.: "A0h"
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
0
5
1
7
2
17
3
19
4
4
5
6
6
14
7
16
8
23
9
25
10
35
11
37
12
20
13
22
14
36
15
38
16
43
17
45
18
55
19
57
20
44
21
46
22
56
23
58
24
61
25
63
26
73
27
75
28
62
29
64
30
74
31
76
32
123
33
125
34
135
35
137
36
124
37
126
38
134
39
136
40
141
41
143
42
151
43
153
44
140
45
142
46
152
47
154
48
157
49
159
50
173
51
175
52
158
53
160
54
174
55
176
56
179
57
181
58
189
59
191
60
180
61
182
62
192
63
194
MEM1_ADQ(63:0)
14-D4
GMCH3_EXTTS0#
MEM1_VREF
P3.3V
C810
2200nF
13-B1
14-D1 18-C2 44-B4
P1.8V_AUX
C800
C799
2200nF
C809 100nF
C803
C798 100nF
P1.8V_AUX
C780
2200nF
DDR1-2 DDR2-SODIMM-200P-STD
2/2
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
201
GND0
202
GND1
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
3709-001325
C801
C784
C786
2200nF2200nF
100nF
100nF
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57
18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 9 21 33 155 34 132 144 156 168 2 3 15 27 39 149 161 28 40 138 150 162
C802 100nF
C776 100nF
D
C
B
A
DRAW
CHECK
APPROVAL
MODULE CODE
4
3
2 1
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
4/10/2007
MP
1.1
TITLE
TORINO 2
MAIN
DDR2 SODIMM (TOP)
March 28, 2007 3:33:29 PM
SAMSUNG
PART NO.
PAGE
ELECTRONICS
BA41-00727/8A
OF
5417
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