Samsung MZQLB3T8HALS-00007 User Manual

SAMSUNG CONFIDENTIAL

Rev. 1.0 Jan. 2018

MZQLB960HAJR-00007 MZQLB1T9HAJR-00007 MZQLB3T8HALS-00007

MZQLB7T6HMLA-00007

2.5"NVMe PCIe SSD Specification

(PM983)

datasheet

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Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind.

This document and all information discussed herein remain the sole and exclusive property of Samsung Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise.

Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where product failure could result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply.

For updates or additional information about Samsung products, contact your nearest Samsung office.

All brand names, trademarks and registered trademarks belong to their respective owners.

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datasheet

SAMSUNG CONFIDENTIAL

Rev. 1.0

NVMe PCIe SSD

Revision History

Revision No. History Draft Date Remark Editor by Review by

1.0 1. Initial issue. Jan. 08, 2018 Final H.I. Choi Y.H. Kim

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Part Number

MZQLB960HAJR-00007 960GB 1,875,385,008

MZQLB1T9HAJR-00007 1.92TB 3,750,748,848

MZQLB3T8HALS-00007 3.84TB 7,501,476,528

MZQLB7T6HMLA-00007 7.68TB 15,002,931,888

datasheet

Capacity

SAMSUNG CONFIDENTIAL

NVMe PCIe SSD

LBA (512 Bytes size)

Rev. 1.0

FEATURES

· PCI Express Gen3

- Single port X4 lanes

· Compliant with PCI Express CEM Specification Rev. 3.0 . Compliant with PCI Express Base Specification Rev. 3.1

· Compliant with NVM Express Specification Rev. 1.2a

· Enhanced Power-Loss Data Protection

· End-to-End Data Protection

· Support SSD Enhanced S.M.A.R.T. Feature Set

· Hardware based AES-XTS 256-bit Encryption Engine

· Static and Dynamic Wear Leveling

· RoHS / Halogen-Free Compliant . TCG Opal Compliant

DRIVE CONFIGURATION

· Form Factor 2.5"

· Interface PCI Express Gen3 x4

· Bytes per Sector 512, 4096 Bytes

PERFORMANCE SPECIFICATIONS

· Data Transfer Rate (128KB data size)

- Sequential Read (7.68TB) Up to TBD MB/s

(3.84/1.92TB/960GB) Up to 3000 MB/s

- Sequential Write (7.68TB) Up to TBD MB/s

(3.84/1.92TB) Up to 1900 MB/s

(960GB) Up to 1050 MB/s

· Data I/O Speed (4KB data size, Sustained)

- Random Read (7.68TB) Up to TBDK IOPS (3.84/1.92TB) Up to 540K IOPS (960GB) Up to 400K IOPS

- Random Write (7.68TB) Up to TBDK IOPS (3.84/1.92TB) Up to 50K IOPS (960GB) Up to 40K IOPS

· Latency (Sustained workload)

- Random Read/ Write (typical) (3.84/1.92TB/960GB) 85/50 us

- Sequential Read/ Write (typical) (3.84/1.92TB/960GB)15/15 us

- Drive Ready Time (typical) (7.68TB) TBD s (3.84/1.92TB/960GB) 10 s

(7.68TB) TBD us

RELIABILITY SPECIFICA TIONS

· Uncorrectable Bit Error Rate 1 sector per 10

· MTBF 2,000,000 hours

· Component Design Life 3 years

· Endurance

- 3.84/1.92TB/960GB 1.3 DWPD

· TBW (@4KB Random Write)

- 3.84TB 5466 TB

- 1.92TB 2733 TB

- 960GB 1366 TB

· Data Retention 3 months

ENVIRONMENTAL SPECIFICATIONS

· Temperature, Case (Tc6)

- Operating 0 ~ 70 °C

- Non-operating -40 ~ 85 °C

· Humidity (non-condensing) 5 ~ 95%

· Linear Shock (0.5ms duration with 1/2 sine wave)

- Non-operating 1,500 G

· Vibration

- Non-operating (10 ~ 2,000 Hz, Sinusoidal) 20 G

POWER REQUIREMENTS

· Supply Voltage / Tolerance 12V±8%

· Active

· Idle (typ.) 4.0 W

(max. RMS) 10.6 W

PHYSICAL DIMENSION

· Width 69.85 ± 0.25 mm

· Length 100.20 ± 0.25 mm

· Height 6.80 ± 0.20 mmT

· Weight Up to 70 g

OPERATING SYSTEMS

Windows Server 2012R2/2016 RHEL 6.6/7.2 CentOS 6.7/7.3 Ubuntu 14.10/15.10 SLES 11SP3/12 Oracle Linux 6.6/7.2

NOTE: Specifications are subject to change without notice.

__________________________________

1) 1MB = 1,000,000 Bytes, 1GB = 1,000,000,000 Bytes, unformatted Capacity. User accessible capacity may vary depending on operating environment and formatting.

2) Based on PCI Express Gen3 x4, Random performance measured using FIO 2.1.3 in Linux RHEL 6.6(Kernel 3.14.29) with 4KB (4,096 bytes) of data transfer size in queue depth 32 by 4 workers and Sequential performance with 128KB (131,072 bytes) of data transfer size in queue depth 32 by 1 worker. Actual performance may vary depending on use conditions and environment.

3) 1 MB/sec = 1,000,000 bytes/sec was used in sequential performance.

4) The random latency is measured by using FIO 2.1.3 in Linux RHEL 6.6(Kernel

3.14.29) and 4KB (4,096 bytes) transfer size with queue depth 1 by 1 worker.

5) The Sequential latency is measured by using FIO 2.1.3 in Linux RHEL 6.6(Kernel

3.14.29) and 4KB (4,096 bytes) transfer size with queue depth 1 by 1 worker.

6) Tc is measured at the hottest point on the case. Sufficient airflow is recommended

to be operated properly on heavier workloads wthin device operating temperature.

7) Active power is measured using IOMeter2006 on Windows Server 2012.

bits read

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IN THE DATASHEET OR JEDEC STANDARD, PLEASE CONTACT EACH BRANCH OFFICE OR

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MZQLB960HAJR-00007

SAMSUNG CONFIDENTIAL

MZQLB1T9HAJR-00007 MZQLB3T8HALS-00007

MZQLB7T6HMLA-00007

datasheet

NVMe PCIe SSD

Table Of Contents

1.0 Introduction ................................................................................................................................................................. 5

1.1 General Description................................................................................................................................................. 5

1.2 Product List.............................................................................................................................................................. 5

1.3 Ordering Information................................................................................................................................................ 5

2.0 PRODUCT SPECIFICATIONS ...................................................................................................................................6

2.1 Capacity................................................................................................................................................................... 6

2.2 Performance ............................................................................................................................................................ 6

2.3 Latency .................................................................................................................................................................... 6

2.4 Quality of Service (QoS).......................................................................................................................................... 7

2.5 Power ...................................................................................................................................................................... 7

2.5.1 Maximum Voltage Ratings (12V) ...................................................................................................................... 7

2.5.2 Power Consumption (12V) ................................................................................................................................ 7

2.5.3 Inrush Current ................................................................................................................................................... 7

2.5.4 Power Loss Protection ...................................................................................................................................... 8

2.6 Reliability ................................................................................................................................................................. 8

2.6.1 Mean Time Between Failures ........................................................................................................................... 8

2.6.2 Uncorrectable Bit Error Rate ............................................................................................................................. 8

2.6.3 Data Retention .................................................................................................................................................. 8

2.6.4 Endurance......................................................................................................................................................... 8

2.7 Environmental Specification .................................................................................................................................... 9

2.7.1 Temperature...................................................................................................................................................... 9

2.7.2 Humidity ............................................................................................................................................................ 9

2.7.3 Shock and Vibration .......................................................................................................................................... 9

3.0 Mechanical Specifications...........................................................................................................................................10

3.1 Physical Information ................................................................................................................................................ 10

4.0 Interface Specification................................................................................................................................................. 11

4.1 Connector Dimensions ............................................................................................................................................ 11

4.2 Connector Pin Assignments .................................................................................................................................... 11

5.0 PCI and NVM Express Registers................................................................................................................................13

5.1 PCI Express Registers ............................................................................................................................................ 13

5.1.1 PCI Register Summary ..................................................................................................................................... 13

5.1.2 PCI Header Registers ....................................................................................................................................... 13

5.1.3 PCI Power Management Registers ...................................................................................................................16

5.1.4 Message Signaled Interrupt Registers .............................................................................................................. 17

5.1.5 MSI-X Registers ................................................................................................................................................18

5.1.6 PCI Express Capability Registers ..................................................................................................................... 19

5.1.7 Advanced Error Reporting Registers ................................................................................................................ 23

5.1.8 Device Serial Number Capability Register ........................................................................................................ 28

5.1.9 Power Budgeting Extended Capability ......................................................................................

5.1.10 Latency Tolerance Reporting Capability Registers ......................................................................................... 30

5.1.11 L1 Substates Capability Registers .................................................................................................................. 30

5.2 NVM Express Registers .......................................................................................................................................... 32

5.2.1 Register Summary ............................................................................................................................................ 32

5.2.2 Controller Registers .......................................................................................................................................... 32

6.0 Supported Command Set ...........................................................................................................................................35

6.1 Admin Command Set .............................................................................................................................................. 35

6.1.1 Identify Command ............................................................................................................................................. 35

6.2 NVM Express I/O Command Set............................................................................................................................. 41

6.3 SMART/Health Information...................................................................................................................................... 42

6.4 Extended SMART Information..................................................................................................................................43

7.0 SPOR Specification (Sudden Power Off and Recovery) ............................................................................................44

7.1 Data Recovery in Sudden Power off ....................................................................................................................... 44

7.2 Time to Ready Sequence ........................................................................................................................................ 44

8.0 SMBus RESOURCES.................................................................................................................................................45

8.1 Vital Product Data (VPD) Structure ......................................................................................................................... 45

8.2 Temperature Sensor Register Summary................................................................................................................. 46

8.2.1 Capability register ............................................................................................................................................. 46

8.2.2 Configuration register (CONFIG) ...................................................................................................................... 47

8.2.3 Event Temperature, Critical Temperature Trip register ....................................................................................48

........................ 29

Rev. 1.0

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8.2.4 Ambient Temperature Register ......................................................................................................................... 48

8.2.5 Manufacture ID Register ................................................................................................................................... 49

8.2.6 Device/Revision Register .................................................................................................................................. 49

8.2.7 Resolution Register........................................................................................................................................... 49

9.0 UEFI EXPANSION ROM ............................................................................................................................................50

9.1 Basic Information..................................................................................................................................................... 50

9.1.1 General Features .............................................................................................................................................. 50

9.2 Supported Operating Systems ................................................................................................................................ 50

10.0 Product Compliance..................................................................................................................................................51

10.1 Product regulatory compliance and Certifications ................................................................................................. 51

11.0 References................................................................................................................................................................52

datasheet

NVMe PCIe SSD

Rev. 1.0

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datasheet

SAMSUNG CONFIDENTIAL

Rev. 1.0

NVMe PCIe SSD

1.0 Introduction

1.1 General Description

This document describes the specifications of the Samsung SSD PM983, which is a native-PCIe SSD for enterprise application.

The Samsung SSD PM983 presents outstanding performance with instant responsiveness to the host system, by applying the Peripheral Component Interconnect Express (PCIe) 3.0 interface standard, as well as highly efficient Non-Volatile Memory Express (NVMe) Protocol.

The Samsung SSD PM983 delivers wide bandwidth of up to 3,000MB/s for sequential read speed and up to 1,900MB/s for sequential write speed under up to 10.6W power. With the help of Toggle 2.0 NAND Flash interface, the Samsung SSD PM983 delivers random performance of up to 540KIOPS for random 4KB read and up to 50KIOPS for random 4KB write in the sustained state.

By combining the enhanced reliability Samsung NAND Flash memory silicon with NAND Flash management technologies, the Samsung SSD PM983 delivers the extended endurance of up to 1.3 drive writes per day over 3 years, which is suitable for enterprise applications, in 2.5" form factor lineups: 960GB, 1.92TB, 3.84TB and 7.68TB.

In addition, the Samsung SSD PM983 supports Power Loss Protection (PLP). PLP solution can guarantee that data issued by the host system are written to the storage media without any loss in the event of sudden power off or sudden power failure.

1.2 Product List

[Table 1] Product List

Type Capacity Part Number

960GB MZQLB960HAJR-00007

2.5"

NOTE:

1) 69.85 ± 0.25 x 100.20 ± 0.25 x 6.80 ± 0.20

1.92TB MZQLB1T9HAJR-00007

3.84TB MZQLB3T8HALS-00007

7.68TB MZQLB7T6HMLA-00007

1.3 Ordering Information

1. Memory (M)

2. Module Classification

Z: SSD

3. Form Factor

Q: PCIe2.5 inch 7mmt

4. Line-Up

L: Client/SV (VNAND 3bit MLC)

5. SSD CTRL

B: Phoenix,S.LSI

6~8. SSD Density

960: 960GB 1T9: 1.92TB 3T8: 3.84TB 7T6: 7.68TB

9. NAND PKG + NAND Voltage

H: BGA (LF,HF)

10. Flash Generation

M: 1st Generation A: 2st Generation

11~12. NAND Density

JR: 2T ODP 2CE LS: 4T HDP 2CE(FBI) LA: 8T HDP 2CE(FBI)

13. "-"

14. Default

"0"

15. HW revision

0: No revision

16. Packaging type

0: Bulk

17~18. Customer

07: General TCG

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SAMSUNG CONFIDENTIAL

Rev. 1.0

NVMe PCIe SSD

2.0 PRODUCT SPECIFICATIONS

2.1 Capacity

[Table 2] User Capacity and Addressable Sectors

Capacity

NOTE:

1) Gigabyte (GB) = 1,000,000,000 Bytes, 1 Sector = 512Bytes

2) Capacity shown in Table 1 represents the total usable capacity of the SSD which may be less than the total physical capacity. A certain area in physical capacity, not in the area shown to the user, might be used for the purpose of NAND flash management.

3) Max. LBA shown in Table 1 represents the total user addressable sectors in LBA mode and calculated by IDEMA rule.

960GB 1,875,385,008

1.92TB 3,750,748,848

3.84TB 7,501,476,528

7.68TB 15,002,931,888

Max LBA

2.2 Performance

[Table 3] Sustained Random Read/Write Performance (IOPS)

Maximum Performance

Random 4KB Read (Up to) IOPS 400K 540K 540K TBD

Random 4KB Write (Up to) IOPS 40K 50K 50K TBD

NOTE:

1) Random performance in Table 3 was measured by using FIO 2.1.3 in Linux RHEL 6.5 with 4KB (4,096 bytes) of data transfer size in Queue Depth=32 by 4 workers. Measurements were performed on a full Logical Block Address (LBA) span of the drive in sustained state. The actual performance may vary depending on use conditions and environment.

[Table 4] Sequential Read/Write Performance

Maximum Performance

Sequential 128KB Read (Up to)

Sequential 128KB Write (Up to)

NOTE:

1)Sequential performance in Table 4 was measured by using FIO 2.1.3 in Linux RHEL 6.5 with 128KB (131,072 bytes) of data transfer size in Queue Depth=32 by 1 worker.

Unit 960GB 1.92TB 3.84TB 7.68TB

MB/s

3,000 3,000 3,000 TBD

1,050 1,900 1,900 TBD

[Table 5] IOPS Consistency

Maximum Performance

Random Read (4 KB) 99% 99% 99% TBD

Random Write (4 KB) 96% 95% 97% TBD

NOTE:

1) IOPS consistency measured using FIO with queue depth 32.

2) IOPS Consistency (%) = (99.9% IOPS) / (Average IOPS) x 100.

960GB 1.92TB 3.84TB 7.68TB

2.3 Latency

[Table 6] Latency1 (sustained state)

Queue Depth = 1 Unit 960GB 1.92TB 3.84TB 7.68TB

Random Read/Write

Sequential Read/Write

Drive Ready Time

NOTE:

1) Typical values

2) The random latency is measured by using FIO 2.1.3 in Linux RHEL 7.0(Kernel 3.10.0) and 4KB transfer size with queue depth 1 by 1 worker.

3) The sequential latency is measured by using FIO 2.1.3 in Linux RHEL 7.0(Kernel 3.10.0) and 4KB transfer size with queue depth 1 by 1 worker.

4) The maximum taking time to be ready for receiving commands after power-up (CSTS.Ready=1). It is expected that I/O commands may not be completed at this point.

us 85 / 50 85 / 50 85 / 50 TBD

us 15 / 15 15 / 15 15 / 15 TBD

sec 10 10 10 TBD

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datasheet

SAMSUNG CONFIDENTIAL

Rev. 1.0

NVMe PCIe SSD

2.4 Quality of Service (QoS)

[Table 7] Quality of Service (QoS)

Quality of Service (99%) Unit QD=1 QD=32

Read(4KB) ms 0.1 0.3

Write(4KB) ms 0.06 1.5

Quality of Service (99.99%) Unit QD=1 QD=32

Read(4KB) ms 0.2 0.6

Write(4KB) ms 0.09 1.5

NOTE:

1. QoS is measured using Fio 2.1.3 (99 and 99.99%) in Linux RHEL 7.0(Kernel 3.10.0) with queue depth 1, 32 on 4KB random read and write.

2. QoS is measured as the maximum round-trip time taken for 99 and 99.99% of commands to host.

2.5 Power

The Samsung SSD PM983 is implemented in standardized 2.5" form factor and gets primary 12V power t from the host system. For 12V, the allowable voltage tolerance and noise level in SSD are described in chapter 2.4.1, the power consumption in 2.4.2 and the inrush current in

2.4.3.

2.5.1 Maximum Voltage Ratings (12V)

[Table 8] Allowable Voltage Tolerance

Operating Voltage 960GB 1.92TB 3.84TB 7.68TB

Allowable Voltage 12V±8%

Allowable noise/ripple

NOTE:

1) The components inside SSD were designed to endure the range of voltage fluctuations, which might be induced by the host system, in Table 6.

DC to 100Khz : 960 mVp-p Max

100Khz to 20Mhz : 150 mVp-p Max

2.5.2 Power Consumption (12V)

In enterprise server and storage system, the Samsung SSD PM983 is designed for the specific usage, which means that SSD will be always operated by the host system during the entire life. Hence, the Samsung SSD PM983 does not manage any low power modes except for the Active/Idle and Off mode.

[Table 9] Power Consumption (12V Supply Voltage)

Power Mode 960GB 1.92TB 3.84TB 7.68TB

Active

Idle

Off 0W0W0W0W

NOTE:

1) Power consumption was measured in the 12V power pins of the connector plug in SSD. The active and idle power is defined as the highest averaged power value, which is the maximum RMS average value over 100 ms duration.

2) The measurement condition for active power is assumed for 100% sequential read and write.

3) The idle state is defined as the state that the host system can issue any commands into SSD at any time.

Read 8.6W 8.7W 8.7W TBD

Write 8.1W 10.6W 10.6W TBD

4.0W 4.0W 4.0W TBD

2.5.3 Inrush Current

[Table 10] Inrush Current

Inrush Current 960GB 1.92TB 3.84TB 7.68TB

12V

NOTE:

1) The measurement value of inrush current is also compatible with the standard specification of “Enterprise SSD Form Factor Version 1.0a” released by SSD Form Factor Working Group

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SAMSUNG CONFIDENTIAL

Rev. 1.0

NVMe PCIe SSD

2.5.4 Power Loss Protection

By using internal back-up power technology, the Samsung SSD PM983 supports power loss protection (PLP) feature to guarantee the reliability of data requested by the host system. When power is unpredictably lost, SSD can detect automatically this abnormal situation and transfer all user data and meta-data cached in DRAM into the Flash media during any SSD operations.

2.6 Reliability

The reliability specification of the Samsung SSD PM983 follows JEDEC standard, which are included in JESD218A and JESD219A documents

2.6.1 Mean Time Between Failures

By definition, Mean Time between Failures (MTBF) is the estimated time between failures occurring during SSD operation.

[Table 11] MTBF Specifications

Parameter 960GB 1.92TB 3.84TB 7.68TB(target)

MTBF 2,000,000 Hours

2.6.2 Uncorrectable Bit Error Rate

By definition, Uncorrectable Bit Error Rate (UBER) is a metric for the rate of occurrence of data errors, equal to the number of data errors per bits read as specified in the JESD218 document of JEDEC standard.

[Table 12] UBER Specifications

Parameter 960GB 1.92TB 3.84TB 7.68TB(target)

UBER

1 sector per 10

bits read

2.6.3 Data Retention

By definition, data retention is the expected time period for retaining data in the SSD at the maximum rated endurance in power-off state as specified in the JESD218 document of JEDEC standard.

[Table 13] Data Retention

Parameter 960GB 1.92TB 3.84TB 7.68TB(target)

Data Retention

NOTE:

1) Data retention was measured by assuming that SSD reaches the maximum rated endurance at 40C in power-off state.

3 months

2.6.4 Endurance

By definition, the endurance of SSD in enterprise application is defined as the maximum number of drive writes per day that can meet the requirements specified in the JESD218 document of JEDEC standard.

[Table 14] Drive Write Per Day (DWPD)

Parameter 960GB 1.92TB 3.84TB 7.68TB(target)

DWPD 1.3 drive writes per day over 3 years

[Table 15] TBW (Tera Bytes Written) Specifications

Parameter Unit 960GB 1.92TB 3.84TB 7.68TB(target)

TBW TB 1366 2733 5466 10932

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datasheet

SAMSUNG CONFIDENTIAL

Rev. 1.0

NVMe PCIe SSD

2.7 Environmental Specification

2.7.1 Temperature

[Table 16] Temperature, Case (Tc1)

Parameter 960GB 1.92TB 3.84TB 7.68TB

Temperature

NOTE:

1) Tc is measured at the hottest point on the case. Sufficient airflow is recommended to be operated properly on heavier workloads wthin device operating temperature.

2.7.2 Humidity

[Table 17] Humidity

Parameter 960GB 1.92TB 3.84TB 7.68TB

Humidity

NOTE:

1) Humidity is measured in non-condensing state.

Operating 0 to 70°C

Non-operating -40 to 85°C

Non-operating 5% to 95%

2.7.3 Shock and Vibration

[Table 18] Shock and Vibration

Parameter 960GB 1.92TB 3.84TB 7.68TB

Shock

Vibration

NOTE:

1) Test condition for shock: 0.5ms duration with half sine wave.

2) Test condition for vibration: 10Hz to 2000Hz.

Non-operating 1,500 G

Non-operating 20 G

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SAMSUNG CONFIDENTIAL

NVMe PCIe SSD

3.0 Mechanical Specifications

3.1 Physical Information

The physical case of the Samsung SSD PM983 in 2.5 form factor follows the standardized dimensions defined by SSD Form Factor Work Group.

[Table 19] Physical Dimensions and Weight

Parameter Unit 960GB 1.92TB 3.84TB 7.68TB

Width mm 69.85 ± 0.25

Length mm 100.20 ± 0.25

Thickness mm 6.80 ± 0.20

Weight g Up to 70g

Rev. 1.0

Figure 1. Mechanical Outline

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MZQLB960HAJR-00007 MZQLB1T9HAJR-00007 MZQLB3T8HALS-00007

MZQLB7T6HMLA-00007

4.0 Interface Specification

4.1 Connector Dimensions

Drive Connector: FOXCONN

datasheet

SAMSUNG CONFIDENTIAL

Rev. 1.0

NVMe PCIe SSD

4.2 Connector Pin Assignments

[Table 20] Certifications and Declarations

Pin # Assignment Description Pin # Assignment Description

S1 GND Ground E7 RefClk0+ PCIe Reference Clock +

S2 Not Used Floated E8 RefClk0- PCIe Reference Clock -

S3 Not Used E9 GND Ground

S4 GND Ground E10 PETp0 PCIe Transmit+ (lane 0)

S5 Not Used E11 PETn0 PCIe Transmit- (lane 0)

S6 Not Used E12 GND Ground

S7 GND Ground E13 PERn0 PCIe Receive- (lane 0)

E1 REFCLK1+ Grounded E14 PERp0 PCIe Receive+ (lane 0)

E2 REFCLK1- Grounded E15 GND Ground

E3 3.3V AUX E16 Not Used

E4 ePERST1# Floated S8 GND Ground

E5 ePERST0# S9 Not Used

E6 RSVD S10 Not Used

P1 Not Used S11 GND Ground

P2 Not Used S12 Not Used

P3 Not Used S13 Not Used

P4 IfDet # Grounded S14 GND Ground

P5 GND Ground S15 Not Used

P6 GND Ground S16 GND Ground

P7 Not Used S17 PETp1 PCIe Transmit+ (lane 1)

P8 Not Used S18 PETn1 PCIe Transmit- (lane 1)

P9 Not Used S19 GND Ground

P10 PRSNT # Presence S20 PERn1 PCIe Receive- (lane 1)

P11 Activity Drive Active S21 PERp1 PCIe Receive+ (lane 1)

P12 GND Ground S22 GND Ground

P13 12 V Primary Power S23 PETp2 PCIe Transmit+ (lane 2)

P14 12 V Primary Power S24 PETn2 PCIe Transmit- (lane 2)

P15 12 V Primary Power S25 GND Ground

S26 PERn2 PCIe Receive- (lane 2)

IF THERE IS ANY OTHER OPERATION TO IMPLEMENT IN ADDITION TO SPECIFICATION IN THE DATASHEET OR JEDEC STANDARD, PLEASE CONTACT EACH BRANCH OFFICE OR HEADQUARTERS OF SAMSUNG ELECTRONICS.

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MZQLB960HAJR-00007 MZQLB1T9HAJR-00007 MZQLB3T8HALS-00007

MZQLB7T6HMLA-00007

datasheet

S27 PERp2 PCIe Receive+ (lane 2)

S28 GND Ground

E17 PETp3 PCIe Transmit+ (lane 3)

E18 PETn3 PCIe Transmit- (lane 3)

E19 GND Ground

E20 PERn3 PCIe Receive- (lane 3)

E21 PERp3 PCIe Receive+ (lane 3)

E22 GND Ground

E23 SMClk SMBus Clock

E24 SMDat SMBus Data

E25 DualPortEn#

SAMSUNG CONFIDENTIAL

Rev. 1.0

NVMe PCIe SSD

IF THERE IS ANY OTHER OPERATION TO IMPLEMENT IN ADDITION TO SPECIFICATION IN THE DATASHEET OR JEDEC STANDARD, PLEASE CONTACT EACH BRANCH OFFICE OR HEADQUARTERS OF SAMSUNG ELECTRONICS.

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MZQLB960HAJR-00007

SAMSUNG CONFIDENTIAL

MZQLB1T9HAJR-00007 MZQLB3T8HALS-00007

MZQLB7T6HMLA-00007

datasheet

NVMe PCIe SSD

5.0 PCI and NVM Express Registers

5.1 PCI Express Registers

5.1.1 PCI Register Summary

[Table 21] PCI Register Summary

Start Address End Address Name Type

00h 3Fh PCI Header PCI Capability

40h 47h PCI Power Management Capability PCI Capability

50h 67h MSI Capability PCI Capability

70h A3h PCI Express Capability PCI Capability

B0h BBh MSI-X Capability PCI Capability

100h 12Bh Advanced Error Reporting Capability PCI Capability

148h 153h Device Serial No Capability PCI Capability

158h 167h Power Budgeting Capability PCI Capability

168h 17Bh Secondary PCI Express Header PCI Capability

188h 18Fh Latency Tolerance Reporting (LTR) PCI Capability

190h 19Fh L1 Substates Capability Register PCI Capability

Rev. 1.0

5.1.2 PCI Header Registers

[Table 22] PCI Header Register Summary

Start Address End Address Symbol Description

00h 03h

04h 05h

06h 07h

08h 08h

09h 0Bh

0Ch 0Ch

0Dh 0Dh

0Eh 0Eh

0Fh 0Fh

10h 13h

14h 17h

18h 1Bh

1Ch 1Fh

20h 23h

24h 27h

28h 2Bh

2Ch 2Fh

30h 33h

34h 34h

35h 3Bh

3Ch 3Dh

3Eh 3Eh

3Fh 3Fh

ID Identifiers

CMD Command Register

STS Device Status

RID Revision ID

CC Class Codes

CLS Cache Line Size

MLT Master Latency Timer

HTYPE Header Type

BIST Built in Self Test

MLBAR (BAR0) Memory Register Base Address (lower 32-bit)

MUBAR (BAR1) Memory Register Base Address (upper 32-bit)

IDBAR (BAR2) Index/Data Pair Register Base Address

BAR3 Reserved

BAR4 Reserved

BAR5 Reserved

CCPTR CardBus CIS Pointer

SS Subsystem Identifiers

EROM Expansion ROM Base Address

CAP Capabilities Pointer

RO Reserved

INTR Interrupt Information

MGNT Minimum Grant

MLAT Maximum Latency

IF THERE IS ANY OTHER OPERATION TO IMPLEMENT IN ADDITION TO SPECIFICATION IN THE DATASHEET OR JEDEC STANDARD, PLEASE CONTACT EACH BRANCH OFFICE OR HEADQUARTERS OF SAMSUNG ELECTRONICS.

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MZQLB960HAJR-00007 MZQLB1T9HAJR-00007 MZQLB3T8HALS-00007

MZQLB7T6HMLA-00007

[Table 23] Identifier Register

Bits Type Default Value Description

31:16 RO A808h Device ID

0:15 RO 144Dh Vendor ID

[Table 24] Command Register

Bits Type Default Value Description

15:11 RO 0h Reserved

10 RW 0 Interrupt Disable

9 RO 0 Fast Back-to-Back Enable (N/A)

8 RW 0 SERR# Enable (N/A)

7 RO 0 IDSEL Stepping/Wait Cycle Control (N/A)

6 RW 0 Parity Error Response Enable

5 RO 0 VGA Palette Snooping Enable (N/A)

4 RO 0 Memory Write and Invalidate Enable (N/A)

3 RO 0 Special Cycle Enable (N/A)

2 RW 0 Bus Master Enable

1 RW 0 Memory Space Enable

0 RW 0 I/O Space Enable

datasheet

SAMSUNG CONFIDENTIAL

Rev. 1.0

NVMe PCIe SSD

[Table 25] Status Register

Bits Type Default Value Description

15 RW1C 0 Detected Parity Error

14 RW1C 0 Signaled System Error

13 RW1C 0 Received Master Abort

12 RW1C 0 Received Target Abort

11 RW1C 0 Signaled Target Abort (N/A)

10:9 RO 0h DEVSEL Timing (N/A)

8 RW1C 0 Master Data Parity Error Detected

7 RO 0 Fast Back-to-Back Transaction Capable (N/A)

6 RsvdP 0 Reserved

5 RO 0 66MHz Capable (N/A)

4 RO 1 Capabilities List

3 RO 0 Interrupt Status

2:1 RO 0h Reserved

0RO 0 Reserved

[Table 26] Revision ID Register

Bits Type Defau lt Value Description

7:0 RO 00h Controller Hardware Revision ID

[Table 27] Class Code Register

Bits Type Default Value Description

23:16 RO 01h Base Class Code

15:8 RO 08h Sub Class Code

7:0 RO 02h Programming Interface

IF THERE IS ANY OTHER OPERATION TO IMPLEMENT IN ADDITION TO SPECIFICATION IN THE DATASHEET OR JEDEC STANDARD, PLEASE CONTACT EACH BRANCH OFFICE OR HEADQUARTERS OF SAMSUNG ELECTRONICS.

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MZQLB960HAJR-00007 MZQLB1T9HAJR-00007 MZQLB3T8HALS-00007

MZQLB7T6HMLA-00007

[Table 28] Cache Line Size Register

Bits Type Default Value Description

7:0 RW 0h Cache Line Size (N/A)

[Table 29] Master Latency Timer Register

Bits Type Default Value Description

7:0 RO 0h Master Latency Timer (N/A)

[Table 30] Header Type Register

Bits Type Default Value Description

7 RO 0 Multi-Function Device (N/A)

6:0 RO 0h Reserved

[Table 31] Built In Self Test Register

Bits Type Default Value Description

7:0 RO 0h Built In Self Test (N/A)

datasheet

SAMSUNG CONFIDENTIAL

Rev. 1.0

NVMe PCIe SSD

[Table 32] Memory Register Base Address Lower 32-bits (BAR0) Register

Bits Type Default Value Description

31:14 RW 0h

13:4 RO 0h Reserved

3 RO 0 Pre-Fetchable

2:1 RO 2h Address Type (64-bit)

0 RO 0 Memory Space Indicator (MEMSI)

[Table 33] Memory Register Base Address Upper 32-bits (BAR1)

Bits Type Default Value Description

31:0 RO 0h Base Address

[Table 34] Index/Data Pair Register Base Address (BAR2) Register

Bits Type Default Value Description

31:0 RO 0h N/A

[Table 35] BAR3 Register

Bits Type Default Value Description

31:0 RO 0h N/A

Base Address

[Table 36] Vendor Specific BAR4 Register

Bits Type Default Value Description

31:0 RO 0h N/A

[Table 37] Vendor Specific BAR5 Register

Bits Type Default Value Description

31:0 RO 0h N/A

[Table 38] Cardbus CIS Pointer Register

Bits Type Default Value Description

31:0 RO 0h N/A

IF THERE IS ANY OTHER OPERATION TO IMPLEMENT IN ADDITION TO SPECIFICATION IN THE DATASHEET OR JEDEC STANDARD, PLEASE CONTACT EACH BRANCH OFFICE OR HEADQUARTERS OF SAMSUNG ELECTRONICS.

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