
SAMSUNG Confidential
SAMSUNG TFT-LCD
MODEL: LSC320AN03-W
The Information described in this specification is for the first draft and can be changed without prior notice

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General Description
Description
This model uses a liquid crystal display (LCD) of amorphous silicon TFT as switching components. This
model is composed of a TFT LCD panel, a driver circuit, and an ass’y KIT of source PBA. This 46.0”
model has a resolution of a 1366 x 768 and can display up to 16.7 million colors with the wide viewing
angle of 89° or a higher degree in all directions. This panel is designed to support applications by
providing a excellent performance function of the flat panel display such as home-alone multimedia TFTLCD TV and a high definition TV.
General Information
Features
RoHS compliance (Pb-free)
High contrast ratio & aperture ratio with the wide color gamut
SPVA(Super patterned vertical align) mode
Wide viewing angle (±178°)
High speed response
HD resolution (16:9)
Low power consumption
DE (Data enable) mode
The interface (2pixel/clock) of 1ch LVDS (Low voltage differential signaling)
697.6845 (H) x 392.256 (V)
TFT : 713.0 (H) x 410.5 (V)
CF : 713.0 (H) x 408.2 (V)
16.7M (True Display)
1.07B (Dithered 10bit)

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1. Absolute Maximum Ratings
If the figures on measuring instruments exceed maximum ratings, it can cause the malfunction or the
unrecoverable damage on the device.
Temperature of glass surface
Endurance on static electricity
Note (1) The power supply voltage at Ta= 25 ± 2 °C
(2) Temperature and the range of relative humidity are shown in the figure below.
a. 95 % RH Max. (Ta ≤ 39 °C)
b. The relative humidity is 95% or less. (Ta >39 °C)
c. No condensation
d. Operating condition with SET
(3) Keep the static electricity under 150V in Polarizer attaching process.
(4) Operating condition with source PCB
(5) Storage temperature condition including glass
(6) Condition without packing. (Unpacking condition)
Fig. Range for temperature and relative humidity

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2. Optical characteristics
The optical characteristics should be measured in the dark room or the space surrounded by the similar setting.
Measuring equipment : TOPCON RD-80S, TOPCON SR-3 ,ELDIM EZ-Contrast
(Ta = 25 ± 2°C, VDD=12.0V, fv=60Hz, f
DCLK
=148.5MHz, Light source: D65 Standard light)
Contrast ratio
(At the center of screen)
Luminance of white
(At the center of screen)
Normal
qL,R=0
qU,D=0
Viewing
Angle
Brightness uniformity
(9 Points)
Transmissivity Uniformity
White Color Coordinate
Uniformity

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(a) Setup for test equipment
The measurement should be executed in a stable, windless, and dark room for 40min and 60min after
operating the panel at the given temperature for stabilization of the standard light. (SDC uses the standard
luminance of the D65 media).
This measurement should be measured at the center of screen.
The environment condition: Ta = 25 ± 2 °C
(b) D65 media has the general light source.
The temperature of color is 6847K. The coordinate of color is Wx 0.313, Wy 0.329
The luminance of this product is 7217cd/㎡.
(c) The CIE positions D65 as the standard daylight illuminant:
[D65] is intended to represent average daylight and has a correlated color temperature of
approximately 6500 K. CIE standard illuminant D65 should be used in all colorimetric calculations
requiring representative daylight, unless there are specific reasons for using a different illuminant.
- Definition of the test point
Note (1) Definition of contrast ratio (C/R)
: The ratio of gray max (Gmax) & gray min (Gmin) at the center point ⑤ of the panel
The measurement goes in D65 Standard light source
Gmax : The luminance with all white pixels

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Gmin : The luminance with all black pixels
Note (2) Definition of the brightness uniformity of 9 points (Test pattern : The full white)
The measurement shall be executed with the standard light source of D65 .
Bmax : The maximum brightness
Bmin : The minimum brightness
Note (3) Definition of the response time : Sum of Tr, Tf
※ G-to-G : Average response time between whole gray scale to whole gray scale.
The response time is the value that was measured after it was operated in Samsung's standard BLU for
one hour.( at room temperature)
Note (4) The definition of luminance of white: The luminance of white at the center point ⑤
The measurement shall be executed with the standard light source of D65.
Note (5) The definition of chromaticity (CIE 1931)
The color coordinate of red, green, blue and white at the center point ⑤
The measurement shall be executed with the standard light source of D65.
Note (6) Definition of viewing angle
: The range of viewing angle (C/R ≥10)
The measurement shall be executed with the standard light source of D65.
The response
Of optical instruments
Buni
B B
B
100
( max min)
max

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Gamma Value :
20 ~ 200Gray : 2.0 ~ 2.4 (Typ. 2.2)
Buni_5nit
= 100*
Bmax_5nit : The maximum brightness at 5nit Gray
Bmin_5nit : The minimum brightness at 5nit Gray
Note (7) Definition of transmissivity
The measurement shall be executed with the standard light source of D65.
Note (8) Definition of the Transmissivity uniformity of 9 points (Test pattern: The full white)
The measurement shall be executed with the standard light source of D65.
Tmax : The maximum Transmissivity
Tmin : The minimum Transmissivity
Note (9) Management Criteria of Gamma Value
Note (10) 5nit Low Gray Uniformity

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255Gray Wx/Wy value basis (a module unit basis)
a. Color coordinate differences are less than 15/1,000 at
Any Point above 30Gray and 255Gray
b. When Wx/Wy coordinates reverse at 0Gray, it permits
an once intersection under, 30Gray
Wx, uni
= Wx max-Wx min
Wx max : The maximum Wx
Wx min : The minimum Wx
Wy, uni
= Wy max-Wy min
Wy max: The maximum Wy
Wy min: The minimum Wy
Note (11) Gamma Variation between Center and Left (or Right)
Gamma measured at 10cm point from the left & right side is more less than 0.1 than Gamma
measured at Center
(Gamma measured at 10cm of the P-4 & P-6 is more less than 0.1 than Gamma measured at P-5)
Note (12) Management Criteria of ACC Linearity
Note (13) White Color Coordinate Uniformity of 9 points (Test pattern: The full white)

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3. Electrical characteristics – Sony Model Attached Reference file
3.1 TFT LCD Module
The connector for the display data & timing signal should be connected.
Ta = 25°C ± 2 °C
Note (1) The ripple voltage should be controlled fewer than 10% of V
DD
(Typ.) voltage.
(2) fV=60Hz, fDCLK =148.5MHz, VDD = 12.0V, DC Current.
(3) Power dissipation check pattern (LCD Module only)
(4) Conditions for measurement
a) Black pattern b) White pattern c) V Stripe
The rush current, I
RUSH
can be measured during T
RUSH
is 470us

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5. The Pin assignment in the input terminal
5.1. Input signal & power
connector : YOUNHO (30Pin,SMD-A)
negative LVDS differential data input (0)
positive LVDS differential data input (0)
negative LVDS differential data input (1)
positive LVDS differential data input (1)
negative LVDS differential data input (Clock)
positive LVDS differential data input (Clock)
negative LVDS differential data input (3)
positive LVDS differential data input (3)
AGING OPTION (Low: Active)
LVDS OPTION (Low: JEIDA, High: VESA)

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Note (1) Pin number which starts from the left side.
a. Power GND pins should be connected to the LCD’s metal chassis.
b. All power input pins should be connected together.
c. All NC pins should be separated from other signal or power.
Note(2) LVDS OPTION : IF THIS PIN : LOW (GND V)/ NC → JEIDA LVDS FORMAT
OTHERWISE : HIGH (3.3V) → NORMAL NS LVDS FORMAT
Note(3) AGING ENABLE PIN / IF THIS PIN GND → BIST MODE (ROLLING PATTERN IS OPERATED)
Fig . The diagram of connector

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5.2 LVDS Interface
- LVDS receiver : T-con (merged) ( 8Bit)
- Data format

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5.3 Input signals, basic display colors and the gray scale of each color. (8bit))
Note) The definition of gray :
Rn : Red gray, Gn : Green gray, Bn : Blue gray (n = Gray level)
Input signal : 0 = Low level voltage, 1 = High level voltage

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5.4 LVDS receiver : T-con (merged) ( 8Bit)
- Data format
TxOUT/RxIN4(dithered10b
it)

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5.5 Input signals, basic display colors and the gray scale of each color. (10bit)
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 -
0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 -
0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 -
1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -
1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 -
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 -
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 -
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R1
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R2
: : : : : : : : : : : : : : : : : : : : : : : : : : : : :
: : : : : : : : : : : : : : : : : : : : : : : : : : : : :
1 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R1021
0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R1022
1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R1023
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 G0
0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 G1
0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 G2
: : : : : : : : : : : : : : : : : : : : : : : : : : : : :
: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 G1021
0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 G1022
0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 G1023
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 B1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 B2
: : : : : : : : : : : : : : : : : : : : : : : : : : : : :
: : : : : : : : : : : : : : : : : : : : : : : : : : : : :
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1 1 B1021
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 B1022
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 B1023
Note) The definition of gray :
Rn : Red gray, Gn : Green gray, Bn : Blue gray (n = Gray level)
Input signal : 0 = Low level voltage, 1 = High level voltage

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6. Interface timing
6.1 The parameters of timing ( Only DE mode )
Term for the
vertical
display
Term for the
horizontal
display
Note) These products don’t have to receive the signal of Hsync & Vsync from the input device.
(1) Key points when testing: TTL controls the signal and the CLK at the input terminal of LVDS Tx of the
system.
(2) Internal VDD = 3.3V
(3) Spread spectrum
- The limit of spread spectrum's range of SET in which the LCD module is assembled should be within ± 3 %.
TxOUT/RxIN4(dithered10bit)

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6.2 Timing diagrams of interface signal (Only DE mode )

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6.3 Characteristics of Input data of LVDS
Differential input high
threshold voltage
Differential input low
threshold voltage
Input common mode voltage
Differential Input Voltage
Notice The spread spectrum should be 0% when the skew is measured.
Position of a measurement is T-CON LVDS input pin

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6.4 The sequence of power on and off
To prevent a latch-up phenomena or the DC operation of the LCD Module, the power on/off sequence should
be accorded with the settings described in the diagram below.
T1 : The VDD rising time from 10% to 90%
T2 : The time from the point which V
DD
reach to 90% of voltage to the point which the valid data is out when
the power is on.
T3: The time from the point which the valid data is out to the point which VDD reach to the 90% of voltage
when the power is off.
T4: the time from the point which the Vdd decrease to the point which the Vdd increase again for windows to
restart.
※ The recommended operating condition of the back light system
T5: The time which takes for B/L to be turned on after the signal is entered when the time is on.
T6 : The time which takes until the signal is out after BL is turned off
The condition of supply voltage to enter in the module from the external system should have
the same condition as the definition of VDD.
Apply the voltage for the lamp within the range which the LCD operates. when the back light is turned on
before the LCD is operated or when the LCD is turned off before the back light is turned off, the display may
show the abnormal screen momentarily.
While the V
DD
is off level, please keep the level of input signals low or keep a high impedance condition.
The figure of T4 should be measured after the module has been fully discharged between the periods
when the power is on and off.
The interface signal must not keep the high impedance condition when the power is on.

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7. Outline dimension
7.1 The adhesive size of POL
The next figure shows the size of POL on the drawing sheet attached to the panel for BLU design.
<Figure.>
The POL size of CF : 710.7 X 405.6 ± 0.5mm
The POL size of TFT: 710.7 X 405.6 ± 0.5mm
The total adhesion allowance of POL is ± 1.15㎜
7.2 The drawing sheet for the size of the OLB bonding

8. Reliability test
8.1 Panel
60 ℃ (Panel change 500hr / circuit change 250hr)
-5 ℃ (Panel change 500hr / circuit change 250hr)
50 ℃ / 90 %RH(Panel change 500hr / circuit change 250hr)
Min. frequency 60℃operation 96hr
25 ℃ / Mosaic pattern(9*10) 12hrs
Rolling pattern 12hrs / 3cycles
-40~50℃, 0m(0ft) ~ 13,700m(45,000ft), 72.5Hr
70 ℃, Storage (Panel change 500hr / circuit change 250hr)
-25 ℃, Storage(Panel change 500hr / circuit change 250hr)
drop(20cm) → temperature/humidity(-30~60℃ / 40℃ 90%RH)
→ pressure → vibration(5~200Hz 1.05Grms, 2hr) → drop(20cm)
Electromagnetic noise: Overall 23dB 이하
-20℃~60℃, 0~90%RH, 2cycle
S-IC Input ±7KV, Output ±4KV
Output 은 data TP 에 직접 인가 후 진행
Input 은 CKV,VCOM 등에 FFC CNT 를 통하여 TEST 를 진행
Surge combination (High impedance)
Pass Condition: 5kV under
Surge combination (High impedance)
Pass Condition: 120V under
[ Criteria on evaluation]
There should be no change of the product, which may affect to the practical display functions, when the
display quality test is executed under the normal operation setting.
* HTOL/ LTOL : The operating cycle on the high and low temperature
* THB : Temperature humidity slant
* HTS/LTS : The storage at the high and low temperature
* WHTS : The storage in the high temperature with the high humidity
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