4
SAMSUNG PROPRIETARY
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. EXCEPT AS AUTHORIZED BY SAMSUNG.
4
HABANA
CPU :
Chip Set :
Remarks :
Model Name :
PBA Name :
PCB Code :
Dev. Step :
Revision :
T.R. Date :
DRAW
SE LEE
3
3 1
Intel Yonah -2M/1M
Intel Calistoga PM/GM & ICH7-M
Mobility Platform
HABANA
MAIN
BA41-#####A
MP
1.0
2005.11.16
CHECK
ES CHO
APPROVAL
BL LEE
2
2
1
Table of Contents
Sheet 1. COVER
Sheet 2 - 7. DIAGRAM (Block/Power) & ANNOTATIONS
Sheet 8. CLOCK GENERATOR
Sheet 9 - 11. YONAH667 / MEROM CPU(TBD)
Sheet 12. THERMAL SENSOR / FAN CONTROL
Sheet 13 - 17. CALISTOGA-GMCH
Sheet18. DDR II SODIMM
Sheet19. DDR TERMINATION
Sheet20 - 23. ICH7-M
Sheet24. FWH
Sheet25. LVDS CONNECTOR
Sheet26. VIDEO SWITCHING LOGIC
Sheet 27. CRT SVHS CONNECTOR
Sheet 28. DVI TRANSMITTER
Sheet 29 - 30. R5C843 CARDBUS CONTROLLER
Sheet 31. EXPRESS & PCMCIA CONNECTOR
Sheet 32. MINI PCI EXPRESS
Sheet 33 - 35. AUDIO
Sheet 36. HDD ODD CONNECTOR
Sheet 37. MICOM
Sheet 38. SUPER I/O
Sheet 39 - 40. LAN CONTROLLER
Sheet 41. RJ45,RJ11,USB,LED LOGIC
Sheet 42. SUB BOARD CONNECTOR
Sheet 43. CHARGER
Sheet 44. P3.3V_LAN & P5V_AUX
Sheet 45. P1.5V & VCCP
Sheet 46. DDR2 POWER
Sheet 47. CPU VRM (SEMTECH)
Sheet 48. MICOM RESET & SWITCHED POWER
Sheet 49. DISCHARGING LOGIC
Sheet 50. DOCKING CONNECTOR
Sheet 51. EXT GFx CONNECTOR
Sheet 52 - 55. SUB BOARD
D
D
C
C
B
B
Owner :
4
4
SEC Mobile R & D
Signature :
A
A
X
2
3
2 3
1
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
1
PCIE x1
USB 6
PCIE x1
USB 7
PCI
PCIE x1
CPU
VRM
IMVP-6
PG 47
Dual channel
Lane 2
Lane 4
Lane 1
DDR II 667/533
Finger Printer
33MHz, 3.3V PCI
FWH
49LF008A
PG 24
PG 52
TPM
MICOM
Hitachi H8S
H8S/2111B
PG 37
DDR II
Thermistor
PG 12
DDR II
SODIMM 0
DDR II
SODIMM 1
52P
PG 32
26P
PG 31
Option
PG 54
Touch
PG 42
PG 18
PG 18
PG 29,30
PAD
KBD
Charging
Circuit
PG 43
DDR II
VRM
PG 46
CARDBUS
R5C843
R5534V
CARDBUS Module
Mini PCIE CONN.
Express Card
BCM5751/4401
PG 39,40
Switched PWR
PG 32
PG 31
RJ45
PG 41
CRT
S-VHS
DVI
1394
PCIE x1 Lane 3
LPC
PS2
USB 5
Graphic
Core
GFx board
PG 48
SD/xD/MS
CardBus
EEPROM
TBD
PG 29
PG 31
PG 29
1394
PG 52
4 pin
Wireless LAN
Golan
X-DOCK
PG 50
D
C
ANT
B
A
FAN
D
PG 27
PG 27
CRT
TV
CRT/TV
LCD
PG 25
LVDS
Ext. PEG
nVidia G7X
GFx Board
30P
PEG x16
PG 12
CPU
Thermal
Sensor
PG 12
External Graphics
SVHS / HDTV
Video Memory
Bluetooth
X-DOCK
AZALIA
MDC
Modem
PG 42
PG 50
512Mb : K4J52324QC
128Mb : K4J52323QG
LVDS
CRT/TV
Internal Graphics
Clocking
CK-410M+
72 PIN
PG 8
USB 0,1,2,3
AZALIA Primary
12P
AZALIA Secondary
PG 41
PG 50
DVI
C
TMDS
PG 28
GFx Board
Ext. - Int. Option
PG 41,53
PG 38
AUDIO
USB 0,1,2,3
ANT
Audio
AMP
PG 34
B
PG 35
AZALIA
Codec
AD1986A
PG 33
HP & SPDIF.
MIC-IN
RJ11
PG 41
4P
HDD
PG 36
S-ATA
SPKR R
SPKR L
PG 36
PG 36
HDD
U-ATA 100
CD-ROM
Pri. IDE master
Pri. IDE slave
Mobile Processor
Yonah - 2M
(667MHz)
PG 9,10,11
GMCH-M
Calistoga-GM/PM
USB4
USB5
SATA
PATA
Socket
L2 Cache : 2 MB
478pin
1466 FCBGA
ICH7-M
652 BGA
PSB
667 MT/S
PG 13 ~ 17
Direct Media Interface
x4, 1.5V
PG 20 ~ 23
3.3V LPC, 33MHz
Channel A (Standard)
Channel B (Reverse)
A
4
3
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
Power Diagram
1
D
AC Adapter
* Made by ICH7-M Internal VR
DOCK DC
VDC
Battery DC
C
(P3.3V_AUX, INTVRMEN high)
*ICH7-M Sequence
P1.05V_Sus
P3.3V_Sus
MICOM_P3V
MICOM
KBC3_SUSPWRON
P1.05V_AUX
ICH7-M
P1.8V_AUX
SODIMM (DDR II)
CALISTOGA
P5V_AUX P5V
DDR2 Power VRM
P3.3V_LAN
LAN BCM4401 / 5751
P2.5_3.3V_LAN
B
P1.2_3.3V_LAN
Rail
+V*Always
State
Full On
S3 ON
S4
S5 ON
+V*AUX
+V SUSPWR PWRON
ON
ON ON
ON OFF H L
ON ON OFF
OFF
H
HL
L
VRON
H
H
L
L
L OFF
L
P3.3V_AUX
ICH7-M
LAN
MDC
BT
KBC3_PWRON
P1.8V
P1.2V
P0.9V
P3.3V
P2.5V
P1.5V
GFX_CORE
SODIMM (DDR II)
GPU (G7X series)
GDDR
GPU (G7X series)
DDR II-Termination
ICH7-M
CRT
MICOM
R5C843
CALISTOGA
ICH7-M
CK410M+
PEG
TPM
CALISTOGA
ICH7-M
R5C843
GPU(G7X series)
CALISTOGA
ICH7-M
GPU(G7X series)
GPU G7X series : P1.0V - P1.2V
KBC3_VRON KBC3_LANPWRON
YONAH
P1.05V
(VCCP)
PCMCIA
USB
PS/2
HEATSINK
Thermal Sensor
SODIMM
FWH
PCMCIA SUPER I/O
LEDs
LCD
CALISTOGA
ICH7-M
* Intel used 0.9V_AUX for DDR-2
(LT validation)
VCCA
P1.5V
HDD
PEG
FAN CIRCUIT
MICOM
R5C843
M_PCI
YONAH
VCCP3_PWRGD
VCC_CORE
YONAH
D
C
B
A
4
S5 / S4
3
S3
2
S0
A
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
POWER
S/W
DC/DC B’d
5
4
3) MICOM_P3V
RHU002N06
(KBC3_RST*)
17
9
C
**Note
*KBC3_ALWON WILL BE HIGH
AFTER POWER _SW IS PUSHED IN BATT. MODE
B
BCM5751/4401
A
KBC
5) POWER_SW*
8
10
KBC Sub B’d
5-1) KBC3_ALWON(BAT MODE)
4) P3.3V_LAN
6
3-1
4) P3.3V_LAN
4) P3.3V_LAN
LOM
Sheet 43-44
10
4) P1.2V_LAN/1.8V
4) P2.5V_LAN
4) P2.5V_LAN
2) VDC
10) KBC3_PWRON
Sheet48
17) KBC3_PWRGD
20) PLT3_RST*
9) CHP3_SLPS5*/S3*
8) KBC3_RSMRST**
7) P3.3V_AUX
10) KBC3_PWRON
6) KBC3_SUSPWRON
KBC3_LANPWRON
4
VDC
SI4435
Sheet47
3
P3.3V_LAN & P5V_AUX
MAX 1999
(1/2)
Sheet44
P5V_AUX & P3V_AUX
MAX 1999
(2/2)
Sheet44
FDS6680A
2
2) VDC
10-1) KBC3_VRON
6) KBC3_SUSPWRON
7) P5V_AUX
7
6) KBC3_SUSPWRON
7) P3.3V_AUX
7
Sheet 40
4
Ext. GPU CORE
SC470
GFx board
RTC
Battery
Sheet 20
13) KBC3_PWRGD
11
11) GFX_CORE
POWER SEQUENCE
1
1-2) CHP3_RTCRST
18) VRM3_CPU_PWRGD
13) KBC3_PWRGD
P3.3V_AUX
(MICOM_P3V)
19) CPU1_PWRGDCPU
20) PLT3_RST*
20) PCI3_RST*
12) ICH_CORE (P1.05V)
11) P2.5V
11) P3.3V
7
11) P1.5V
12) P1.05V (VCCP)
1.5V_PWRGD
14) VCCP3_PWRGD
7) P1.8V_AUX and MEM1_VREF
( or 7) 0.9V_AUX )
11) 0.9V
11) P5V
1.8V_AUX_PWRGD
10) KBC3_PWRON
10-1) KBC3_VRON
VRMPWRGD
PWROK
9
7) P1.05V_AUX
ICH7-M
P1.5V & VCCP
ISL6227
Sheet 45
DDR2 POWER
MAX8550
Sheet 46
INTVRMEN
20
Sheet 20-23
7) P5V_AUX
10) KBC3_PWRON*
7) P3.3V_LAN
7) P3.3V_AUX
11) P1.5V
10) KBC3_PWRON
7) P1.8V_AUX
10) KBC3_PWRON
2
Rev. 0.8
Thermal
19
SI4435DY
Sheet 48
FDS6680A
Sheet 48
SC338A
Sheet 48
FDS6680A
Sheet 48
Monitor
Sheet 12
11
11) P5V
11) P3.3V
11) P2.5V
11) P1.2V
11) P1.8V
20
CLOCK
CHIP
Sheet 8
CPU
VRM
SC452
14
Sheet 47
19) CPU1_PWRGDCPU
11) P2.5V
11) P1.5V
20) PLT3_RST*
7) P1.8V_AUX
11) P0.9V
12) MCH_CORE
11) P3.3V
7) P1.8V_AUX
11) P0.9V
20) PLT3_RST*
11) P1.8V
11) P2.5V
11) GFX_CORE
11) P1.2V
11) P1.8V
11) P3.3V
20) PCI3_RST*
16) CLK3_PWRGD*
16) VRM3_CPU_PWRGD
15) VCC_CORE
15
11) P1.5V
12) P1.05V
1 3
16
16) CLK3_PWRGD* 11) P3.3V
17
Sheet 9-11
Sheet 18 - 19
Sheet 25 - 28
Sheet 30 - 31
Sheet 34-35
17) Clock Running
CPU
19
21
Sheet 13 - 17
GMCH
12
18
DDR2
Memory
G73M
Ext.GPU
GDDR
MiniPCI
CardBus
D
C
22) CPU1_CPURST*
B
A
4
3
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
4
220V
Adapter Battery
MICOM 3V ( TBD A )
1.8V ( TBD A )
3
2
POWER RAILS ANALYSIS
This sheet should be updated !!!
Rev. 0.8
1
S0 - S5
S0 - S3
OFF IN S3 - S5
D
5V_AUX ( TBD A )
3.3V_AUX ( TBD A )
CPU CORE ( TBD A )
1.05V ( TBD A )
1.5V ( TBD A )
2.5V ( TBD A )
3.3V ( TBD A )
5V ( TBD A )
C
1.8V_AUX ( TBD A )
0.9V_AUX ( TBD A )
P3.3V_ALW ( TBD A )
P1.2V_ALW (TBD A)
P2.5V_ALW (TBD A)
VGA CORE (TBD A)
PEX IO (TBD A)
VDC INV ( TBD A )
RTC_Battery
B
P1.2V_ALWAYS
P2.5V_ALWAYS
P3.3V_ALWAYS
TBD A (TBD)
TBD A (TBD)
TBD A (TBD)
LAN (TBD)
1.05V
CPU CORE
1.05V (VCCP)
1.5V
1.05V (MCH CORE)
1.05V (VCCP)
1.5V
2.5V
3.3V
1.8V_AUX
1.05V (ICH CORE)
1.05V (VCCP)
1.5V
3.3V
3.3V_AUX
5V
5V_AUX
RTC_Battery
1V-1.2V (VGA CORE)
1.8V
2.5V
1.2V (PEX IO,PLLVDD)
3.3V
1.8V_AUX
0.9V_AUX
1.8V
3.3V (LCD 3V, 0.23A)
19V (VDC INV, 0.23A)
A
0.1 A (TBD)
28A
2.5A
0.3 A (TBD)
4.8 A (TBD)
2A
1.3 A (TBD)
0.2 A (TBD)
0.12 A (TBD)
2.7 A (TBD)
1.3 A (TBD)
0.4 A (TBD)
1.3 A (TBD)
0.2 A (TBD)
0.12 A (TBD)
2.7 A (TBD)
2.7 A (TBD)
0.01 A (TBD)
13A
2.5A
0.28 A (TBD)
1.9A
0.8A
3.1 A (TBD)
1 A (TBD)
3.1 A (TBD)
0.7A
(TBD)
0.5A
ITP
Yonah-2M
( 31 W )
*1.5V : 13.4 A (TBD)
Calistoga
GMCH
(8 - 8.5 W )
ICH7-M
( ~ 2.0 W )
G7X
Ext.GFX
(Dual slots)
DDR-2
( ~ 5.0 W )
GDDR
LCD
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
5V
5V
5V
5V
5V
5V
5V
5V
0.1 A (TBD)
0.02 A (TBD)
0.3 A (TBD)
0.2 A (TBD)
0.02 A (TBD)
0.06 A (TBD)
0.07 A (TBD)
1 A (TBD)
1 A (TBD)
1A
0.3A
1 A (TBD)
2 A (TBD)
0.2 A (TBD)
Thermal
Sensor
SIO
CLOCK
KeyBoard
FWH
HD Audio
HDD
PATA
ODD
SATA HDD
FAN
Audio AMP
USB (x 4)
Touch Pad
MICOM 3V
3.3V
MICOM 3V
1.8V
3.3V
3.3V_AUX
3.3V_AUX
5V_AUX
3.3V
3.3V_AUX
1.5V
3.3V
3.3V_AUX
5V
0.08 A (TBD)
0.08 A (TBD)
0.1 A (TBD)
0.14 A (TBD)
0.1 A (TBD)
0.1 A (TBD)
1.2 A (TBD)
1 A (TBD)
0.7 A (TBD)
0.2 A (TBD)
0.4 A (TBD)
0.3 A (TBD)
0.01 A (TBD)
0.3 A (TBD)
KBC
PWR LED
C
R5C843
Card Bus
Mini PCIE
MDC
B
A
Value by Datasheet/Application notes
3
(Value by measurement)
2
1 4
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CLK_3.3V
D
CLK3_PWRGD*
ITP_EN
CPU_STP*
SS(96/100) SEL
C
B B
CK-410M (w/ CLKREQ*)
PCI_STP*
A
14.318 MHz
4
96/100 MHz
SSCD
ICS954305D
14 MHz
OSC
FS(2:0)
Main PLL
CPU
48MHz PLL
SATA PLL
33 MHz
Buffer
166 MHz
Disable
MUX MUX MUX
166 MHz
100 MHz
100 MHz
96 MHz
100 MHz
100 MHz
100 MHz
100 MHz
100 MHz
48 MHz
100 MHz
14.318 MHz
33 MHz
33 MHz
33 MHz
33 MHz CLK3_PCLKFWH
33 MHz
CLK1_PEG/PEG*
CLK1_EXPCARD/CARD*
CLK1_MINIPCIE/PCIE*
CLK1_PCIELOM/LOM*
CLK1_DCKPCIELAN/LAN*
CLK3_SIO14
CLK3_PCLKSIO
CLK3_FM48
CLK3_PCLKCB
CLK3_TPMLPC
CLK3_PCLKSIO_DS
CLK3_PCLKLAN
CLK3_PCLKMICOM
Page 8
CLK3_DBGLPC
3 1
CLK0_HOST_CPU/CPU*
CPU
BSEL
FSB
PCI Express Gfx
100 MHz
SIO
CARDBUS
TPM
LPC on DCK
CLK0_HOST_GMCH/GMCH*
MCH3_CLKREQ*
CLK1_MCH3GPLL/3GPLL*
CLK1_DREFCLK/CLK*
CLK1_DREFSSC/SSC*
CLK1_PCIEICH/ICH* 100 MHz
CLK3_USB48
CHP3_SATACLKREQ*
CLK1_SATA/SATA*
CLK3_ICH14
CLK3_PCLKICH
PEG
1394 Clock
24.576 MHz
32.768 KHz
3GPLL
DPLLA
DPLLB
PCIEPLL
USBPLL
SATAPLL
32.768 KHz
OSC
HPLL
MPLL
Calistoga
GMCH
DMI
ICH7-M
RTC Clock
32.768 KHz
FWH
LAN(4401)
MICOM
OPTION
10 MHz
DEBUG
2
CLOCK DISTRIBUTION
667/533/400 MHz
MDC
100 MHz
CLK1_MCLK0/0*
CLK1_MCLK1/1*
CLK1_MCLK3/3*
CLK1_MCLK2/2*
100 MHz
100 MHz
100 MHz
SODIMM #0
SODIMM #1
EXPRESS CARD
MINI PCIE CARD
GIGA LAN
GIGA on DOCK
333/266/200 MHz
333/266/200 MHz
333/266/200 MHz
333/266/200 MHz
AUD3_BCLK
HD 24 MHz
MDC3_BCLK
MCLK2/2* & MCLK3/3* swapped for ease of routing.
EXP3_CLKREQ*
MPCIE3_CLKREQ*
HD Audio
Rev. 0.7
OPTION
D
C
A
4
3
2
1
4
SAMSUNG PROPRIETARY
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
EXCEPT AS AUTHORIZED BY SAMSUNG.
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
D
D
4
3
1 3
2
2
1
D
D
PCI Devices
Devices IDSEL#
Cardbus
LAN
USB
Hub to PCI
LPC bridge/IDE/AC97/SMBUS
Internal MAC
AC Link
AD25
AD21 1
AD29(internal)
AD30(internal)
AD31(internal)
AD24(internal)
-
REQ/GNT#
0
-
-
-
-
-
-
Interrupts
E,F,G
G
USB2.0 #0 : A
USB2.0 #1 : D
USB2.0 #2 : C
B
E
B
Voltage Rails
VDC
VCC_CORE
VCCP
C
C
P0.9V
P1.2V
P1.5V
P1.8V
P3.3V
P5V
MEM1_VREF
P1.8V_AUX
P3.3V_AUX
P5V_AUX 5.0V power rail (off in S4-S5)
MICOM_P3V
P5V_ALWS
P12V_ALWS
2
I C / SMB Address
Devices
ICH7
SODIMM0
B
B
SODIMM1
CK-408 (Clock Generator)
Devices
MICOM
EMC6N300(CPU Thermal Sensor)
BATTERY
GFX thermal sensor
USB PORT Assign
PORT NUMBER ASSIGNED TO
0,1
2,3
4
5
6
System Power States
A
A
CHP3_SLPS1* S1, Powered-On-Suspend(POS) : In this state, all clocks(except the 32.768KHz clock) are stopped.
CHP3_SLPS3* S3, Suspend-To-RAM(STR) : The system context is maintained in system DRAM, but power is shut off to non-critical circuits.
CHP3_SLP4S* S4, Suspend-To-Disk(STD) : The Context of the system is maintained on the disk. All power is then shut off to the system except for the logic required to resume.
CHP3_SLPS5* S5, Soft Off(SOFF) : System context is not maintained. All power is shut off except for the logic required to restart. A full boot is required when waking.
Primary DC system power supply (7 to 21V)
Core voltage for DOTHAN (1.308~1.068V)
YONAH/CALISTOGA Processor System Bus(PSB) Termination (1.05V)
MCH-M Core Voltage
0.9V switched power rail (off in S3-S5)
1.2V switched power rail (off in S3-S5)
1.5V switched power rail (off in S3-S5)
1.8V switched power rail (off in S3-S5)
2.5V switched power rail (off in S3-S5) P2.5V
3.3V switched power rail (off in S3-S5)
5.0V switched power rail (off in S3-S5)
0.9V power rail (off in S4-S5)
1.8V power rail(off in S4-S5)
3.3V power rail (off in S4-S5)
3.3V always on power rail for MICOM
5V power rail (Always On)
12V power rail (Always On)
Address
Master
1010 0000
1010 001X
1101 001x
Address
Master
0101 111X
1001 000X
SYSTEM PORT A
SYSTEM PORT B
SYSTEM PORT C 3
BLUETOOTH
PORT REPLICATOR
FINGER PRINT
EXPRESS CARD 7
The system context is maintained in system DRAM. Power is maintained to PCI, the CPU, memory controller, memory, and all other criticial subsystems.
Note that this state does not preclude power being removed from non-essential devices, such as disk drives. During this state, CPU can be selected
for either Deep Sleep or Deeper Sleep.
In Deeper Sleep, CPU voltage reduced in this state to reduce the leakage power.
Hex
A0h
D2h
5Eh
90h
Hex
-
Bus
SMBUS Master
-
- A4h
Clock, Unused Clock Output Disable
Bus
SMBUS Master
Thermal Sensor
Thermal Sensor
Memory is retained, and refreshes continue. All clocks stop except RTC clock.
Externally appears same as S5, but may have different wake events.
4
3 4
3
Crystal / Oscillator
TYPE
Crystal
Crystal
Crystal
Crystal
FREQUENCY
32.768KHz
10MHz
14.318MHz Crystal CLOCK-Generator CK-410M+
24.576MHz
25MHz
24MHz Crystal Finger Printer AES2501A
CPU Core Voltage Table
Active Mode
VID(6:0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DPRSLPVR
DPRSTP*
PSI2*
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
0
1
0
1
0
0
0
1
0
0
1
0
0
1
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
1
0
0
1
1
0
1
1
0
1
0
1
1
1
0
1
1
0
1
1
0
1
0
1
1
1
0
1
0
0
1
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
1
0
2
2
Voltage
00
1.5000 V
0
1
0
1.4875 V
0
1.4750 V
10
0
1.4625 V
0
11
1.4500 V
1
0
0
1 1.4375 V
1
0
1.4250 V
1
0
1
1 1.4125 V
1
1
1
1
1.4000 V
0
00
0 1.3875 V
0
1
1.3750 V
0
0
1
1
0 1.3625 V
1
0
1.3500 V
1
0
1 1.3375 V
1
0
1.3250 V
1
0
1
1 1.3125 V
1
1
0
0
0
1.3000 V
0
1
1.2875 V
0
0
1
0
1.2750 V
0
1
1
1.2625 V
1
0
1.2500 V
0
1
1.2375 V
0
1
1
1.2250 V
0
1
1
1
1
1.2125 V
1
1
0
0
0
1.2000 V
0
0
1
1.1875 V
0
0
1.1750 V
1
0
1
1.1625 V
1
0
0
1.1500 V
1
1
1
1.1375 V
0
1
0
1.1250 V
1
1
1
1.1125 V
1
0
0
1.1000 V
0
0
0
1
1.0875 V
0
0
1
1.0750 V
0
1
1
1.0625 V
1
0
0
1.0500 V
1
1
0
1.0375 V
1
1
0
1.0250 V
1
1
1
1
1
1.0125 V
Active
0
1
0 or 1
DEVICE
ICH7-M
MICOM
Cardbus Controller
LAN
Active/Deeper Sleep
Dual Mode Region
VID(6:0)
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
0
0
0
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
1
0
1
0
1
1
0
1
0
1
0
1
0
1
1
1
0
1
1
0
1
1
0
1
1
0
0
0
1
0
1
0
0
1
0
1
0
0
0
1
0
1
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
1
DPRSLPVR
DPRSTP*
PSI2*
IMVP-6
0
00
1
0 0.9875 V
1
0
1
0
1
1
0
1
1
0
1
1
1 0.9375 V
0
1
1
1
1
1 0.9125 V
1
1
0
0
0
0
0 0.8875 V
0
0
1
0
0
11
0 0.8625 V
1 0.8500 V
0
0
0
1 0.8375 V
0
0
1
1
0
1 0.8125 V
1
0
0 1
1
0
0
1
1
0 1
1
1
0 1
1
0
1
1
1
0
1
1
1
1
1
1
1
1
0
0
0 0
0
0
0
0
100.6750 V
0 0
1
0
0
0
1
0
1
0
1
0
1
0
1
1
1
0
0
0
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
1
1
1
1
1
1
1
00000
01010 0.5000 V 101 1
Deeper Slp
1
0
0 or 1
USAGE
Real Time Clock
H8S/2111B
1394
BROADCOM LAN
Deeper Sleep/Extended Deeper Sleep
Dual Mode Region
Voltage
VID(6:0)
1
1.0000 V
1
0
0.9750 V
1
0.9625 V
0
0.9500 V
1
0
0.9250 V
1
1
0
0.9000 V
1
0
0.8750 V
0
1
0
0.8250 V
1
0
0.8000 V
1
0.7875 V
0
0.7750 V
1
0.7625 V
0
0.7500 V
0.7375 V
1
0
0.7250 V
1
0.7125 V
1
0
0.7000 V
1
0.6875 V
0
0.6625 V
1
0
0.6500 V
1
0.6375 V
0
0.6250 V
1
0.6125 V
0
0.6000 V
0.5875 V
1
0
0.5750 V
0.5625 V
1
0.5500 V
0
0.5375 V
1
0.5250 V
0
1
0.5125 V
1
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
0
1
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
1
0
0
1
1
1
0
1
0
1
1
1
0
1
1
1
0
1
1
0
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
*"1111111" : 0V power good asserted.
*Yonah Processor (2.33 GHz / 800 MHz : TBD)
0
0
0
0
0
0
1
0
0
1
1
0
1
0
0
1
0
1
0
1
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0 1
0
0
0
0
1
1
0
1
0
1
0
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
0
1
0
1
1
0
0
1
1
1
1
1
1
1
1
1
1
1
Voltage
0
0.4875 V
1
1
0.4750 V
0
1
0.4625 V
1
0
0.4500 V
0
01
0.4375 V
1
0
0.4250 V
11
0.4125 V
0
0
0
0.4000 V
0.3875 V
01
1
0
0.3750 V
11
0.3625 V
0
0
0.3500 V
0
0.3375 V
1
1
0
0.3250 V
11
0.3125 V
0
0
0.3000 V
0
1
0.2875 V
1 0.2750 V
0
1
1
0.2625 V
0
0
0.2500 V
1
0
0.2375 V
0
1 0.2250 V
1
1
0.2125 V
0
1
0 0.2000 V
0
1
0.1875 V
0
1 0.1750 V
1
1
0.1625 V
0 0.1500 V
0
0 0.1375 V
1
0
1 0.1250 V
1
1
0.1125 V
0
0 0.1000 V
0.0875 V
0
1
0.0750 V
1
0
0.0625 V
1
1
0.0500 V
0
0
0.0375 V
0
1
1
0
0.0250 V
0.0125 V
1
1
1
0
0.0000 V
0
0.0000 V
1
0
1
0
0.0000 V
1
0.0000 V
1
0.0000 V
0
0
1
0.0000 V
0
0.0000 V
0
1
1
0.0000 V
1
C
C
B
B
A
A
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
FCTSEL1(43,44,47,48)
ITP_EN (5,6)
1 : 27M & SRC0
1 : CPU_ITP pair
3
0 : DOT96 &LCD100
0 : SRC pair
2
1
FSA
D D
BSEL0
CPU
0
0
0
0
1
1
1
1
C C
B
BSEL1
0
0
1
1
0
0
1
1
FSC FSB
HOST CLK
BSEL2
266 MHz
0
1
333 MHz
200 MHz 0
1
400 MHz
133 MHz
0
1
100 MHz
0
166 MHz
RSVD
1
CLK3_FM48
CLK3_USB48
CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2
CHP3_CPUSTP*
CHP3_PCISTP*
CLK3_PWRGD*
CLK3_SMBCLK
CLK3_SMBDATA
CLK3_PCLKICH
CLK3_PCLKSIO_DS
CLK3_TPMLPC
CLK3_PCLKCB
CLK3_PCLKSIO
CLK3_PCLKFWH
CLK3_PCLKLAN
CLK3_PCLKMICOM
CLK3_DBGLPC
CLK3_ICH14
CLK3_SIO14
CLK1_DREFCLK
CLK1_DREFCLK*
GFX3_27M
GFX3_27M_SS
Y1
14.31818MHz
1
2
C198
0.033nF
Place 14.318MHz within
500mils of Clock chip
30-B? 55-C3
21-B? 55-C3
R209
14-A3 10-B3
55-A3
10-B3 55-A3 14-A3
55-A3
14-A3 10-C3
21-C?
21-C?
55-B4
47-C4 55-C3
20-?3 18-B4
18-B2 55-C3
18-B4 20-?3 55-C3 18-B2
55-C3 21-C?
38-C2 55-C3
38-B3 55-C3
29-?4 55-C3
55-C3 38-C2
55-C3 24-C4
39-C3 55-C3
37-C3 55-C3
55-C3 24-A3
55-C3 21-C?
38-C2 55-C3
14-C4
14-C4
51-A3 55-B2
55-B2 51-A3
1% 49.9
C199
R255
0.033nF
1% 49.9
R260
B26
MMZ1608S121AT
2.2
R245
R244
R309
R305
R303
R298
R299
R296
R293
R291
R289
R287
R284
R288
R246
R251
100nF
C213
10K
10K
10K
10K
R192
R191
33
33 5%
33 5%
1%
1%
1%
1%
33 5%
33
33
33 5%
33
33 5%
33 5%
33
33 5%
33 5%
33 5%
33
33 5%
R258
1%
49.9
R257
1%
49.9
R256
R239
1%
49.9
R254
C275
10000nF
6.3V
MMZ1608S121AT
2.2
1%
1%
49.9 1%
49.9
49.9
R234
R236
R238
2.2
100nF
R207
C215
10000nF
6.3V
2.2
C237
100nF
C214
5%
5% 33
5%
5%
5% 33
5%
5% 33
5% 33
5%
5% 33
5% 33
5%
49.9 1%
R259
1%
49.9
R261
1%
49.9
R285
1%
49.9
R283
1% 49.9
R286
1% 49.9
R290
49.9 1%
R292
1%
49.9
R294
1%
49.9
R297
1%
49.9
R300
1%
49.9
R301
1% 49.9
R302
49.9 1%
R304
1% 49.9
R308
1%
49.9
10nF
100nF
10nF
100nF
1%
10K
10K 1%
33 5%
R262
R211
2K
1%
R196
R250
R208
R206
R203
R202
R201
R199
R200
R197
R195
R193
R194
R249
R248
R264
R263
5% 33
1% 10K
1%
100
33
12.1
12.1 1%
12.1 1%
12.1 1%
12.1
12.1 1%
33
33
80.6 1%
5%
1% 12.1
1%
1% 12.1
1%
1% 12.1
1% 12.1
5%
5%
1% 80.6
10K 1%
R210
R205
1% 10K
R204
R253
475
R237
1%
U9
ICS954305D
12
VDDCPU
30
VDDPCI_1
36
VDDPCI_2
49
VDDSRC_1
54
VDDSRC_2
65
VDDSRC_3
1
VDDSRC_4
41
48M_FSA
45
FSB_TEST_MODE
23
REF0_FSC_TEST_SEL
24
CPU_STP*
25
PCI_STP*
39
VTT_PWRGD*_PD
16
SMB_CLK
17
SMB_DATA
37
PCIF0_ITP_SEL
34
PCI4_FCTSEL1
33
PCI3
32
PCI2
27
PCI1
22
REF1
43
DOT96T_27M_NONSPREAD
44
DOT96T*_27M_SPREAD
19
XOUT
20
XIN
9
IREF
8
VSSA
15
VSS_1
21
VSS_2
31
VSS_3
35
VSS_4
42
VSS_5
68
VSS_6
4
VSS_7
73
THERMAL
SILEGO : SLG84452
C216
C278
C279
C238
CPU2_ITP_SRC_10
CPU2*_ITP_SRC_10*
SRC_0_LCD96M_LCD100M
SRC_0*_LCD96M*_LCD100M*
100nF
100nF
C277
C276
VDDREF
VDD48
VDDA
CPU0
CPU0*
CPU1
CPU1*
CLKREQ1*
CLKREQ2*
CLKREQ3*
CLKREQ4*
CLKREQ5*
CLKREQ6*
CLKREQ7*
CLKREQ8*
CLKREQ9*
SRC_1
SRC_1*
SRC_2
SRC_2*
SRC_3
SRC_3*
SRC_4
SRC_4*
SRC_5
SRC_5*
SRC_6
SRC_6*
SRC_7
SRC_7*
SRC_8
SRC_8*
SRC_9
SRC_9*
6.3V
10000nF
C274
18
40
7
14
13
11
10
6
5
46
26
28
57
29
62
38
71
72
50
51
52
53
55
56
58
59
60
61
63
64
66
67
70
69
3
2
47
48
R243
R242
R241
R240
R173
R170
R171
R172
R252
R247
CK-410M+
w/ CLKREQ
w/ SS Clock
ICS954305
SLG8LP455
CY28447
B17
1%
49.9
R235
10-C3
10-C3
13-B2
13-C2
14-C4 56-D4
32-D4 56-A3
31-D4 55-B2
21-A? 55-B4
21-B?
21-B?
51-B3
51-B3
14-C4
14-C4
32-C4
32-C4
50-B3
50-B3
31-C3
31-C3
39-D3
39-D3
20-?3
20-?3
14-C4
14-C4
P3.3V
MMZ1608S121AT
B22
CLK0_HCLK0
CLK0_HCLK0*
CLK0_HCLK1
CLK0_HCLK1*
MCH3_CLKREQ*
MINIPCIE3_CLKREQ*
EXP3_CLKREQ*
CHP3_SATACLKREQ*
CLK1_PCIEICH
CLK1_PCIEICH*
CLK1_PEG
CLK1_PEG*
CLK1_MCH3GPLL
CLK1_MCH3GPLL*
CLK1_MINIPCIE
CLK1_MINIPCIE*
CLK1_DCKPCIELAN
CLK1_DCKPCIELAN*
CLK1_EXPCARD
CLK1_EXPCARD*
CLK1_PCIELOM
CLK1_PCIELOM*
CLK1_SATA
CLK1_SATA*
CLK1_DREFSSCLK
CLK1_DREFSSCLK*
B
A
4
3
2 1
Place Termination close to CK-410M
A
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
1
D
D
VCCP
R122
56.2
CPU601-1
CPU1_A*(16:3)
CPU1_ADSTB0*
C
CPU1_REQ*(4:0)
CPU1_A*(31:17)
CPU1_ADSTB1*
13-D1
13-C2
13-B2
13-D1
13-C2
YONAH2M-SOCKET
R1
A16*
P1
A15*
P4
A14*
L1
A13*
P2
A12*
P5
A11*
N3
A10*
J1
A9*
N2
A8*
M1
A7*
K5
A6*
M3
A5*
L4
1 / 4
A4*
J4
A3*
L2
ADSTB0*
L5
REQ4*
J3
REQ3*
K2
REQ2*
H2
REQ1*
K3
REQ0*
Y1
A31*
W2
A30*
Y4
A29*
W5
A28*
W3
A27*
T3
A26*
T5
A25*
R4
A24*
U2
A23*
Y5
A22*
U4
A21*
W6
A20*
R3
A19*
U5
A18*
Y2
A17*
V4
ADSTB1*
3704-001153|bga_479p_sock
ADS*
BNR*
BPRI*
BR0*
DBSY*
DEFER*
DRDY*
HIT*
HITM*
IERR*
INIT*
LOCK*
TRDY*
RESET*
RS2*
RS1*
RS0*
A20M*
FERR*
IGNNE*
LINT0
LINT1
SMI*
STPCLK*
H1
E2
G5
F1
E1
H5
F21
G6
E4
D20
B3
55-A3
H4
G2
B1
G3
F4
F3
A6
A5
C4
C6
B4
A3
D5
13-C2
13-C2
13-C2
13-C2
13-B2
13-A2
13-A2
13-A2
13-A2
13-A2
13-A2
13-C2 55-A3
13-B2
13-B2
13-B2
20-?1
20-?1 55-B3
20-?1 55-A3
20-?1 55-A3
20-?1
20-?1 55-A3
20-?1 55-C2
20-?1
CPU1_ADS*
CPU1_BNR*
CPU1_BPRI*
CPU1_BREQ*
CPU1_DBSY*
CPU1_DEFER*
CPU1_DRDY*
CPU1_HIT*
CPU1_HITM*
CPU1_INIT*
CPU1_LOCK*
CPU1_TRDY*
CPU1_CPURST*
CPU1_RS2*
CPU1_RS1*
CPU1_RS0*
CPU1_A20M*
CPU1_FERR*
CPU1_IGNNE*
CPU1_INTR
CPU1_NMI
CPU1_SMI*
CPU1_STPCLK*
CPU1_D*(15:0)
CPU1_DBI0*
CPU1_DSTBN0*
CPU1_D*(31:16)
CPU1_DBI1*
CPU1_DSTBN1*
CPU1_DSTBP1*
13-D4
13-B2
13-B2
13-B2
13-D4
13-B2
13-B2
13-B2
B
CPU601-2
YONAH2M-SOCKET
H25
D15*
K22
D14*
F26
D13*
H26
D12*
J23
D11*
J24
D10*
G24
G25
H22
H23
G22
N24
R24
M23
R23
N22
M26
M24
N25
K24
E23
E25
F23
E26
F24
E22
J26
T25
L26
T24
P23
P22
P25
L23
L22
L25
P26
K25
D9*
D8*
D7*
D6*
D5*
D4*
D3*
D2*
D1*
D0*
DINV0*
DSTBN0*
DSTBP0*
D31*
D30*
D29*
D28*
D27*
D26*
D25*
D24*
D23*
D22*
D21*
D20*
D19*
D18*
D17*
D16*
DINV1*
DSTBN1*
DSTBP1*
2 / 4
3704-001153|bga_479p_sock
D47*
D46*
D45*
D44*
D43*
D42*
D41*
D40*
D39*
D38*
D37*
D36*
D35*
D34*
D33*
D32*
DINV2*
DSTBN2*
DSTBP2*
D63*
D62*
D61*
D60*
D59*
D58*
D57*
D56*
D55*
D54*
D53*
D52*
D51*
D50*
D49*
D48*
DINV3*
DSTBN3*
DSTBP3*
AA24
AC26
Y22
Y26
AA26
Y23
W22
AB25
U22
U25
U23
W25
V26
V24
AB24
AA23
V23
W24
Y25
AF26
AF22
AF25
AE25
AD21
AE21
AD24
AF23
AE22
AD20
AC25
AB21
AA21
AB22
AC23
AC22
AC20
AD23
AE24
13-D4
13-B2
13-B2
13-B2
13-D4
13-B2
13-B2
13-B2
CPU1_D*(47:32)
CPU1_DBI2*
CPU1_DSTBN2*
CPU1_DSTBP2* CPU1_DSTBP0*
CPU1_D*(63:48)
CPU1_DBI3*
CPU1_DSTBN3*
CPU1_DSTBP3*
C
B
**NOTE
MT610
RMNT-25-45-1P
MT613
RMNT-25-45-1P
A
4
MT611
RMNT-25-45-1P
MT614
RMNT-25-45-1P
RHE SUPPORTER(CICHLID2 BASED)
3
A
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
1
D
CPU Core Voltage Table
CPU601-3
YONAH2M-SOCKET
49.9 R126
A22
BCLK0
A21
BCLK1
D7
SLP*
B5
DPSLP*
E5
DPRSTP*
D24
DPWR*
D6
PWRGOOD
AE6
PSI*
AE2
VID6
AF2
VID5
AE3
VID4
AF4
VID3
AE5
VID2
AF5
VID1
AD6
VID0
D21
PROCHOT*
A24
THERMDA
A25
THERMDC
C7
THERMTRIP*
C21
55-C2 47-B4 11-B4
BSEL2
B23
BSEL1
B22
BSEL0
AD26
GTLREF
V1
COMP3
U1
COMP2
U26
COMP1
R26
COMP0
AF7
VCCSENSE
AE7
VSSSENSE
C26
TEST1
D25
TEST2
D2
RSVD1
F6
RSVD2
D3
RSVD3
C1
RSVD4
AF1
RSVD5
D22
RSVD6
3704-001153|bga_479p_sock
55-A3 14-A3 8-C4
55-A3 14-A3 8-C4
1%
1%
1%
1%
3 / 4
CLK0_HCLK0
CLK0_HCLK0*
CPU1_SLP*
CPU1_DPSLP*
CPU1_DPRSTP*
CPU1_DPWR*
CPU1_PWRGDCPU
CPU1_PSI*
C
VCCP
R153
1K
1%
R152
2K
1%
CPU1_VID(6:0)
CPU1_PROCHOT*
CPU2_THERMDA
CPU2_THERMDC
CPU1_THRMTRIP*
CPU1_BSEL2
CPU1_BSEL1
CPU1_BSEL0
CPU1_VCCSENSE
CPU1_VSSSENSE
R148
R147
R151
R135
8-C1
8-C1
55-C2 13-A2
20-?1
20-?1
13-A2
20-?1 55-D2
55-D2 47-B4
47-B4
55-C2
55-A3 12-A3
12-C255-C2
12-D255-C2
12-A414-C4 20-?1 55-C2
8-C4 14-A3 55-A3
54.9
27.4
54.9
27.4
11-B4 47-B4 55-C2
B
GTLREF : Keep the Voltage divider within 0.5"
of the first GTLREF0 pin with Zo=55ohm trace.
Minimize coupling of any switching signals to this net.
COMP0,2(COMP1,3) should be connected with Zo=27.4ohm(55ohm)
trace shorter than 1/2" to their respective Banias socket pins.
R127 1K
VCCA
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
PREQ*
PRDY*
BPM3*
BPM2*
BPM1*
BPM0*
TCK
TDO
TMS
TRST*
DBR*
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
B26
K6
J6
M6
N6
T6
R6
K21
J21
M21
N21
T21
R21
V21
W21
V6
G21
AC1
AC2
AC4
AD1
AD3
AD4
AC5
AA6
TDI
AB3
AB5
AB6
C20
C23
R121
C24
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
T22
B25
55-C2 11-C4
11-C4 55-C2
55-C2 11-C4
11-C4 55-C2
21-D? 55-B2
0
C124
10nF
25V
P1.5V
C87
10000nF
6.3V
VCCP
EC16
330uF
2.5V
AL
CPU1_TCK
CPU1_TDI
CPU1_TMS
CPU1_TRST*
ITP3_SYSRST*
VID(6:0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DPRSLPVR
DPRSTP*
PSI2*
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
0
1
1
0
0
1
1
0
1
0
0
1
0
1
1
1
0
Active Mode
Voltage
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
10
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1.5000 V
0
1
0
0 1.4875 V
1
1.4750 V
0
0
1.4625 V
1
0
1
1
0
1.4500 V
1
0
1
1.4375 V
1.4250 V
0
1
1
1
1.4125 V
1
11
1
0
1.4000 V
0
0
0
0
1
1.3875 V
1
0
0
1.3750 V
1
0
1
1.3625 V
0
0
1.3500 V
1
0
1.3375 V
1
1
1.3250 V
1
0
1
1
1.3125 V
1
1
1.3000 V
0
0
0
0
1.2875 V
1
0
0
1.2750 V
1
0
1
1
0
1.2625 V
0
1
0
1.2500 V
1
1.2375 V
0
1
1.2250 V
1
1
0
1
1.2125 V
1
1
1
1
1.2000 V
0
0
0
1
0
1.1875 V
0
0
1.1750 V
1
1
1.1625 V
1
0
0
1
0 0.1375 V
1.1500 V
1
0
1
1.1375 V
0
1
1 0
1.1250 V
1.1125 V
1
1
0
0
0
1.1000 V
1
0
0
1.0875 V
1
0
0
1.0750 V
0
1
1
1.0625 V
0
0
1
1.0500 V
0
1
1
1.0375 V
0
1
1
1.0250 V
1
1
1
1
1
1.0125 V
Active
0
1
0 or 1
Active/Deeper Sleep
Dual Mode Region
VID(6:0)
0
0
1
0
0
1
0
1
0
0
0
1
0
1
0
0
0
1
0
1
0
0
1
0
1
1
0
1
100
0
10
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
1
0
1
1
0
1
0
1
1
1
0
1
1
0
1
1
0
1
0
1
1
1
0
1
1
1
0
0
1
0
0
1
0
0
0
1
0
1
0
0
1
0
0
1
0
0
0
1
0
0
0
1
0
0
1
1
0
0
1
0
0
0
1
0
0
1
0
1
0
0
0
0
0
1
1
1
0
DPRSLPVR
DPRSTP*
PSI2*
IMVP-6
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
0
0
1
1
00
0
1
1
1
1
1
1
0
0
0
0
1
0
1
1
0
0
1
1
1
1
1
0
0
0
0
1
0
1
0
0
1
0
1
1
1
1
1
1
0
0
0
0
0
1
0
1
1
0
0
1
1
1
1
1
0
0
0
0
1
0
0
1
0
1
0
1
1
1
1
1
1
1
0
0
0
0
Deeper Slp
1
0
0 or 1
Deeper Sleep/Extended Deeper Sleep
Dual Mode Region
Voltage
VID(6:0)
0
1
0
1
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1.0000 V
0.9875 V
0.9750 V
0.9625 V
0.9500 V
0.9375 V
0.9250 V
0.9125 V
0.9000 V
0.8875 V
0.8750 V
0.8625 V
0.8500 V
0.8375 V
0.8250 V
0.8125 V
0.8000 V
0.7875 V
0.7750 V
0.7625 V
0.7500 V
0.7375 V
0.7250 V
0.7125 V
0.7000 V
0.6875 V
0.6750 V
0.6625 V
0.6500 V
0.6375 V
0.6250 V
0.6125 V
0.6000 V
0.5875 V
0.5750 V
0.5625 V
0.5500 V
0.5375 V
0.5250 V
0.5125 V
0.5000 V
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1 1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
101
1
1
1
1
1
1
*"1111111" : 0V power good asserted.
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
*Yonah Processor (2.33 GHz / 800 MHz : TBD)
Voltage
0.4875 V
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0.4750 V
1
0.4625 V
0
1
1
0
0.4500 V
0
1
1
0.4375 V
0
1
0
0.4250 V
1
1
1
0.4125 V
1
0
0
0
0.4000 V
0
0.3875 V
0
1
0
0.3750 V
1
0
0
1
0.3625 V
1
0
0
0
0.3500 V
1
0
1
1
0.3375 V
1
0
1
0.3250 V
0.3125 V 1
1
1
0
0
0
0.3000 V
0
0.2875 V
0
1
0
0
0.2750 V
1
1
0.2625 V
1
0
0
1
0.2500 V
0
1
0
1
0.2375 V
1
1
0
0.2250 V
1
0.2125 V
1
1
0.2000 V
1
0
0
0
0
0.1875 V
1
0
1
0.1750 V
0
0
1
0
1
0.1625 V
0.1500 V
1
0
0
0
1
1
1
0.1250 V
1
0
0.1125 V
1
1
1
0
0
0
0.1000 V
0
0.0875 V
1
0
0
0
0.0750 V
1
0
1
1
0.0625 V
1
0
0
0.0500 V
0
0.0375 V
1
1
0.0250 V
0
1
1
1 1
0.0125 V
1
1
0
0
0
0.0000 V
0
0
1
0.0000 V 1
0.0000 V
0
0
1
0.0000 V
1
0
1
0.0000 V
0
1
0
1
0.0000 V
0
1
1
0.0000 V
1
0
1
1
1
0.0000 V
D
C
B
A
4
3
2
1
A
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
1
D
C
B
CPU1_VCCSENSE
CPU1_VSSSENSE
CHECK BULK CAP USING
IF IT DOUBLED
A
R843
47-B4 10-B3
55-C2
R842
10-B3 47-B4
55-C2
VCC_CORE
1% 100
VCCP
EC15
330uF
2.5V
AL
1% 100
R149
27.4
1%
C151
100nF
VCCP
5%
40.2
R134
C116
22000nF
6.3V
20%
20%
C176
22000nF
6.3V
150 1%
R133
1%
55-C2 10-B2
55-C2 10-B2
R150
475
C79
22000nF
6.3V
20%
20%
C175
C177
22000nF
22000nF
6.3V
6.3V
C150
100nF 100nF
C118
22000nF
6.3V
20%
20%
C148
10-B2 55-C2
10-B2 55-C2
C162
22000nF
6.3V
20%
20%
C179
22000nF
6.3V
CPU1_TDI
CPU1_TMS
CPU1_TCK
CPU1_TRST*
C117
22000nF
6.3V
C180
22000nF
6.3V
C149
100nF
D
T26
K26
J25
M25
N26
VSS140
VSS137
VSS138
AB26
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VCC_CORE
AA25
AD25
AE26
AB23
AC24
AF24
AE23
AA22
AD22
AC21
AF21
AB19
AA19
AD19
AC19
AF19
AE19
AB16
AA16
AD16
AC16
AF16
AE16
AB13
AA14
AD13
AC14
AF13
AE14
AB11
AA11
AD11
AC11
AF11
AE11
AB8
AA8
AD8
AC8
C164
C163
22000nF
22000nF
22000nF
6.3V
6.3V
6.3V
20%
20%
20%
20%
C178
22000nF
6.3V
20%
20%
20%
20%
C82
C81
22000nF
22000nF
6.3V
6.3V 6.3V 6.3V
C80
22000nF
6.3V
C166
C168
22000nF
22000nF
22000nF
6.3V
6.3V
6.3V
20%
20%
20%
20%
20%
20%
C84
C122 C121
22000nF
22000nF
6.3V
6.3V
22000nF
6.3V
20%
20%
C83
22000nF
C120
22000nF
6.3V
C167
C165
C86 C85
22000nF
6.3V
20%
20%
C181
22000nF
6.3V
20%
20%
C119
22000nF
6.3V
C123
22000nF
6.3V
20%
20%
22000nF
6.3V
C174
22000nF
6.3V
20%
20%
C169
22000nF
AF8
AE8
AA5
AD5
AC6
AF6
AB4
AC3
AF3
AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
VSS139
AB20
VCC1
AA20
VCC2
AF20
VCC3
AE20
VCC4
AB18
VCC5
AB17
VCC6
AA18
VCC7
AA17
VCC8
AD18
VCC9
AD17
VCC10
AC18
VCC11
YONAH2M-SOCKET
AC17
VCC12
AF18
VCC13
AF17
VCC14
AE18
VCC15
AE17
VCC16
AB15
VCC17
AA15
VCC18
AD15
VCC19
AC15
VCC20
AF15
VCC21
AE15
VCC22
AB14
VCC23
AA13
VCC24
AD14
VCC25
AC13
VCC26
AF14
VCC27
AE13
VCC28
AB12
VCC29
AA12
VCC30
AD12
VCC31
AC12
VCC32
AF12
VCC33
AE12
VCC34
AB10
VCC35
AB9
VCC36
AA10
VCC37
AA9
VCC38
AD10
VCC39
AD9
VCC40
AC10
VCC41
AC9
VCC42
AF10
VCC43
AF9
VCC44
AE10
VCC45
AE9
VCC46
AB7
VCC47
AA7
VCC48
AD7
VCC49
AC7
VCC50
VSS141
VSS142
VSS143
VSS144
VSS145
V25
K23
R25
H24
G23
W26
F8
E8
G26
VSS134
VSS135
VSS136
CPU601-4
VSS146
VSS147
VSS148
VSS149
L24
P24
N23
D8
VSS132C8VSS133
4 / 4
VSS150
T23
U24
B8
VSS130A8VSS131
VSS151
VSS152
Y24
W23
VSS129
VSS153
VCC_CORE
ECAP
ECAP
ECAP
C152
100nF
C153
100nF
ECAP
ECAP
330uF
2.5V
AL
**Note
THESE ARE JUST TEXT NOT REAL PARTS!!
BULK CAP ARE CPU VRM SCHEMATIC SIDE.
330uF
2.5V
AL
330uF
2.5V
AL
330uF
2.5V
AL
330uF
2.5V
AL
ECAP
330uF
2.5V
AL
F11
E11
VSS128
VSS154
J22
H21
C11
VSS126
VSS127
VCC100
VSS155
VSS156
M22
A11
D11
VSS125
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VSS157
L21
P21
E14
B11
VSS123
VSS124
VSS158
VSS159
V22
R22
F13
VSS122
VSS121
B20
A20
F20
E20
B18
B17
A18
A17
D18
D17
C18
C17
F18
F17
E18
E17
B15
A15
D15
C15
F15
E15
B14
A13
D14
C13
F14
E13
B12
A12
D12
C12
F12
E12
B10
B9
A10
A9
D10
D9
C10
C9
F10
F9
E10
E9
B7
A7
F7
E7
VSS160
VSS161
U21
Y21
VCC_CORE
VSS162
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
C14
D13
A14
B13
E16
F16
C16
D16
A16
B16
E19
F19
C19
D19
A19
B19
E21
F22
C22
B21
E24
D23
A23
B24
F25
C25
D26
A26
W1
V2
R2
T1
N1
M2
J2
K1
G1
F2
C2
D1
W4
Y3
U3
T4
N4
P3
L3
K4
G4
H3
E3
D4
A4
Y6
U6
V5
R5
P6
L6
M5
C
B
A
4
3
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
KBC3_PWRGD
C
PLACE THIS AT THE OPPSITE SIDE OF CPU
4 1
P3.3V_AUX
Q643
RHU002N06
G
21-B? 14-C4
1
37-C4 29-?4
55-B2
B
GFX3_THERM*
A
CPU1_THRMTRIP*
51-D3 55-A2
VCCP
R871
2K
1%
10-C3 14-C4 20-?1 55-C2
R867
100K
1%
D
3
S
2
GFX3_THRMTRIP*
KBC5_CAL_THRM*
P3.3V
P3.3V_AUX
G
1
R882
10K
1%
P3.3V_AUX
1
KBC3_RSMRST*
CPU3_THRMTRIP*
THRM_ALERT*
R865
10K
1%
R866
10K
1%
55-A2 12-C4
3
D
Q642
RHU002N06
S
2
R870
10K
1%
3
Q641
MMBT3904
2
P5V
55-A2 37-C4
GFX3_THRMTRIP*
12-C4 55-C2
55-A2 37-C3 21-B?
55-C2 12-A4
55-A2 12-B4
P5V_AUX
ERTJ1VG103FA
TH1
G
1
CPU3_THRMTRIP*
3
CPU / DDR2 Thermal Sensor
MICOM_P3V
P3.3V_AUX
10K
1%
U616
2.2nF
C859
EMC6N300
10
+RTC_PWR3V
5
+3V_PWROK*
11
VSUS_PWRGD
21
POWER_SW*
6
THERMTRIP1*
7
THERMTRIP2*
8
THERMTRIP3*
13
SMBADDRSEL
14
HW_LOCK*
9
ATF_INT*
23
VCP
1209-001531
68ohm
55-A3 10-C3
R869
56-A2 37-D1 37-B4
R876
2K
1%
12
D
3
Q640
RHU002N06
S
2
CPU1_PROCHOT*
2
P3.3V_AUX
P3.3V_AUX
MICOM_P3V
R868
49.9
1%
R880
R881
R879
+3VSUS
VSET
THDAT_SMB
THCLK_SMB
REM_DIOD2_N
REM_DIOD2_P
REM_DIOD1_N
REM_DIOD1_P
INTRUDER*
THERMTRIP_SIO
RESERVED
THERM_STP*
VSS
C861
100nF
10V
4
22
1
2
17
18
19
20
12
15
16
24
3
10K
C834
2.2nF
10K
1%
1%
KBC3_THERM_SMDATA
37-B3 51-D2 55-A2
10-C3 55-C2
MMBT3904
Q18
55-B4
KBC3_THERM_SMCLK KBC3_CHKPWRSW*
CPU2_THERMDC
CPU2_THERMDA
CHP3_INTRUDER*
THERM_STP*
55-A2 51-D2 37-A3 37-C1 37-D4 37-B3 55-B2
55-C2 10-C3
2
1
3
44-B1 37-A3 56-A2
10K
1%
C835
2.2nF
PLACE NEAR TO DDR2 SODIMM
Vset = (Tp-75)/16 Where Tp=75 to 106 degree C
Set Trip point = 9-degreeC
Vset = (90-75)/16 = 0.9375V
Guardian Temp-torelance = +/- 3 degree C
TH1:
Panasonic 1% 0603 10K ohm @ 25 degree C.P/N: ERTJ1VG103FA
Mitsubishi 1% 0603 10K ohm @ 25 degree C.P/N: TH11-3H103FT
VCP voltage = 5V * TH1/(TH1+2.21K)
When TH1 is 10Kohm, VCP is 4.1V.
If TH1 is 1Kohm, VCP is 1.56V.
KBC3_FANCTRL
P3.3V
R782
R785
VCCP
75
1%
R784
475
1%
R783
1.5K
1%
3
1
2
Q629
MMBT3904
1
37-B3
3
2
10K
1%
21-C?
55-C2
Q628
MMBT3904
CPU3_ALERT*
Refer To Thermal Sensor Layout Guidelines.
- Place the Thermal Sensor close to a remote diode.
- Keep traces away from high voltage (+12V bus)
- Keep traces away from fast data buses and CRT signal.
- Use recommended trace widths and spacings (10mil)
- Place a ground plane under the traces.
- Use guard traces flanking DXP and DXN and connecting to GND
P3.3V_AUX
R878
30.1K
1%
R877
C860
2K
2.2nF
1%
R875
10K
1%
FAN Control Logic
P5V
Line Width = 20 mil
C635
D605
10000nF
21
6.3V
MBR0540T1
L601
10uH
1
2
5
6
P3.3V
R642
55-B2 37-B3
10K
1%
D604
MMBD4148
13
37-D3 55-B2
R644
R643
100K
1%
100 1%
FAN3_FDBACK*
Q610
SI3456DV
4
S
3
D1
D2
D3
D4 G
J606
HDR-4P-1R-SMD
1
2
3
4
3711-000456
D
C
B
A
4
3
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
C62
C749
C64
3
220nF 16V
470nF 16V
470nF
2
16V
VCCP
1
A6
AA13
HD*_0
HD*_1
HD*_2
HD*_3
HD*_4
HD*_5
HD*_6
HD*_7
HD*_8
HD*_9
HD*_10
HD*_11
HD*_12
HD*_13
HD*_14
HD*_15
HD*_16
HD*_17
HD*_18
HD*_19
HD*_20
HD*_21
HD*_22
HD*_23
HD*_24
HD*_25
HD*_26
HD*_27
HD*_28
HD*_29
HD*_30
HD*_31
HD*_32
HD*_33
HD*_34
HD*_35
HD*_36
HD*_37
HD*_38
HD*_39
HD*_40
HD*_41
HD*_42
HD*_43
HD*_44
HD*_45
HD*_46
HD*_47
HD*_48
HD*_49
HD*_50
HD*_51
HD*_52
HD*_53
HD*_54
HD*_55
HD*_56
HD*_57
HD*_58
HD*_59
HD*_60
HD*_61
HD*_62
HD*_63
HXSCOMP
HYSCOMP
HXSWING
HYSWING
HXRCOMP
HYRCOMP
VTT_1
VTT_40
N9
AA12
VTT_2
VTT_41
P1
P10
VTT_3
VTT_42
D
VCCP
R106
221
1%
55-A1 13-A4
R105
100
1%
C
VCCP
R128
221
1%
55-A1 13-A4
R129
100
1%
B
CPU1_D*(63:0)
MCH1_HXSWING
C63
100nF
Place near to the Calistoga.
MCH1_HYSWING
C125
100nF
MCH1_HXSWING
MCH1_HYSWING
9-C1 9-C2
9-D1 9-D2
13-C4 55-A1
13-C4 55-A1
VCCP
R104
R130
R103
R816
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
54.9
54.9
24.9
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
K11
G4
T10
W11
T3
U7
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
AA10
Y8
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8
E2
1%
U1
1%
E4
W1
E1
1%
Y1
1% 24.9
VCCP
A
270uF
EC8
330uF
2.5V
AL
C88
220nF
16V
C127
4700nF
10V
Place in cavity Place on the edge
C128
2200nF
AB13
AB14
AB12
AB1
VTT_6
VTT_5
VTT_4
VTT_43
VTT_44
VTT_45P2VTT_46P3VTT_47P4VTT_48P5VTT_49
P11
P12
P14
AC13
VTT_8
VTT_7
AD13
AC14
VTT_9
VTT_10D2VTT_11
VTT_50P7VTT_51P8VTT_52P9VTT_53R1VTT_54
P6
L12
L13
VTT_12
L14
VTT_13
VTT_14M1VTT_15
M10
VTT_16
VTT_55
R10
M11
M12
M13
M14
VTT_17
VTT_18
VTT_19
VTT_20M2VTT_21M3VTT_22M4VTT_23M5VTT_24M6VTT_25M7VTT_26
U613-1
CALISTOGA
1 / 5
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60R3VTT_61R5VTT_62R6VTT_63R8VTT_64
VTT_65
R2
R12
R13
R11
T12
R14
N10
M8
VTT_27M9VTT_28N1VTT_29
VTT_66
VTT_67
VTT_68
T13
T14
U12
U13
N11
VTT_30
VTT_31
VTT_70
VTT_69
V12
N12
VTT_32
VTT_71
V13
N13
N14
VTT_33
VTT_34N3VTT_35N4VTT_36N5VTT_37N7VTT_38N8VTT_39
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76
V14
Y12
Y13
W12
W13
W14
HA*_10
HA*_11
HA*_12
HA*_13
HA*_14
HA*_15
HA*_16
HA*_17
HA*_18
HA*_19
HA*_20
HA*_21
HA*_22
HA*_23
HA*_24
HA*_25
HA*_26
HA*_27
HA*_28
HA*_29
HA*_30
HA*_31
HADSTB*_0
HADSTB*_1
HVREF_1
HVREF_2
HBPRI*
HBREQ0*
HCPURST*
HDINV*_0
HDINV*_1
HDINV*_2
HDINV*_3
HDSTBN*_0
HDSTBN*_1
HDSTBN*_2
HDSTBN*_3
HDSTBP*_0
HDSTBP*_1
HDSTBP*_2
HDSTBP*_3
HREQ*_0
HREQ*_1
HREQ*_2
HREQ*_3
HREQ*_4
HRS*_0
HRS*_1
HRS*_2
HDBSY*
HDEFER*
HDRDY*
HHITM*
HLOCK*
HDPWR*
HCPUSLP*
HTRDY*
VTT_77
HA*_3
HA*_4
HA*_5
HA*_6
HA*_7
HA*_8
HA*_9
HADS*
HBNR*
HCLKN
HCLKP
HHIT*
H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
E8
B9
C13
J13
K13
C6
F6
C7
B7
AG1
AG2
J7
W8
U3
AB10
K4
T7
Y5
AC4
K3
T6
AA5
AC5
D8
G8
B8
F8
A8
B4
E6
D6
A7
C3
H8
D3
D4
B3
J9
E3
E7
CPU1_A*(31:3)
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
9-C3
9-C4
9-B4
9-C3
9-C3
9-C3
9-C3 55-A3
8-C1
8-C1
9-C2
9-B2
9-C1
9-B1
9-C2
9-B2
9-C1
9-B1
9-C2
9-B2
9-C1
9-B1
9-C4
0
1
2
3
4
9-C3
9-C3
9-C3
9-C3
9-C3
9-C3
9-C3
9-C3
9-C3
10-C3
10-C3 55-C2
9-C3
9-C4 9-D4
CPU1_ADS*
CPU1_ADSTB0*
CPU1_ADSTB1*
CPU1_BNR*
CPU1_BPRI*
CPU1_BREQ*
CPU1_CPURST*
CLK0_HCLK1*
CLK0_HCLK1
CPU1_DBI0*
CPU1_DBI1*
CPU1_DBI2*
CPU1_DBI3*
CPU1_DSTBN0*
CPU1_DSTBN1*
CPU1_DSTBN2*
CPU1_DSTBN3*
CPU1_DSTBP0*
CPU1_DSTBP1*
CPU1_DSTBP2*
CPU1_DSTBP3*
CPU1_REQ*(4:0)
CPU1_RS0*
CPU1_RS1*
CPU1_RS2*
CPU1_DBSY*
CPU1_DEFER*
CPU1_DRDY*
CPU1_HIT*
CPU1_HITM*
CPU1_LOCK*
CPU1_DPWR*
CPU1_SLP*
CPU1_TRDY*
External GFx model : PM
Internal GFx model : GM
VCCP
R108
100
1%
C90
R107
100nF
200
1%
10V
Place near to the Calistoga.
D
C
B
A
4
3
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
CRT DISABLE GUIDE(FOR PM)
Signal
VCCA_CRTDAC
VSSA_CRTDAC
VCC_SYNC3GND
HSYNC,VSYNC
R,G,B PAIRS
C
MCH3_EXTTS0*
VGA3_RED_INT
VGA3_GREEN_INT
VGA3_BLUE_INT
B
Recommendation
GMCH CORE
GND
GND
GMCH CORE
P3.3V
R741
10K
1%
18-C3
18-C1
56-A3
57-B4 26-A4
57-B4 26-B4
57-B4 26-C4
1%
1%
150
150 1%
150
TVO3_COMP_INT
R98
R99
R116
TVDAC_A : CVBS, Pb
TVDAC_B : Y
TVDAC_C : C, Pr
WHEN NOT USED(FOR PM)
LEFT AS NO CONNECTION
DVO3_INT*
DVO3_INT
MCH3_CLKREQ*
CLK1_MCH3GPLL*
CLK1_MCH3GPLL
CLK1_DREFCLK*
CLK1_DREFCLK
CLK1_DREFSSCLK*
CLK1_DREFSSCLK
CPU1_THRMTRIP*
KBC3_PWRGD
MCH3_BMBUSY*
CHP3_DPRSLPVR
MCH3_ICHSYNC*
VGA3_DDCCLK
VGA3_DDCDATA
VGA3_HSYNC
VGA3_VSYNC
TVO3_Y_INT
TVO3_C_INT
A
4
PLT3_RST*
26-C3 57-D4
57-D4 26-B3
26-A3 57-D4
1%
1% 150
150
R95
R96
28-C3
28-C3
56-D4 8-C1
8-B1
8-B1
8-B4
8-B4
8-B1
8-B1
56-C2
R138
21-?? 21-B? 21-C?
10-C3 12-A4 20-?1 55-C2
55-A1 21-D?
21-B? 47-C4 55-B4
56-D4
21-B?
26-?4 57-B4
57-B4 26-?4
57-B4 26-?4
26-?4 57-B4
R115
R114
1%
150
LCD1_ADATA0*
LCD1_ADATA1*
LCD1_ADATA2*
R97
LCD1_ADATA0
LCD1_ADATA1
LCD1_ADATA2
LCD1_ACLK*
LCD1_ACLK
LCD1_BDATA0*
LCD1_BDATA1*
LCD1_BDATA2*
LCD1_BDATA0
LCD1_BDATA1
LCD1_BDATA2
LCD1_BCLK*
LCD1_BCLK
P3.3V
37-C4 29-?4 21-B? 12-D4 55-B2
4.99K
1%
R198
10K
1%
H32
AF33
AG33
A27
A26
C40
D41
100
AH34
1%
G6
AH33
G28
F25
H26
K28
C26
C25
G23
H23
A21
B21
C22
B22
E23
D23
J22
249
1%
J29
K30
A16
C18
A19
J20
B16
B18
B19
25-C4
C37
25-C4
B35
25-C4
A37
A35
25-C4
B37
25-C4
B34
25-C4
A36
A34
25-C4
A33
25-C4
A32
25-D4
G30
25-D4
D30
25-D4
F29
D28
25-D4
F30
25-D4
D29
25-D4
F28
D27
25-D4
E27
25-D4
E26
P3.3V
LCD3_VDDEN
LCD3_BKLTEN
LCD3_BKLTCTRL
R791
CLK_REQ*
GCLKN
GCLKP
D_REFCLKN
D_REFCLKP
D_REF_SSCLKN
D_REF_SSCLKP
RSTIN*
THERMTRIP*
PWROK
PM_BM_BUSY*
PM_EXT_TS*_0
PM_EXT_TS*_1
ICH_SYNC*
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
CRT_RED
CRT_RED*
CRT_GREEN
CRT_GREEN*
CRT_BLUE
CRT_BLUE*
CRT_IREF
TV_DCONSEL1
TV_DCONSEL0
TVDAC_A
TVDAC_B
TVDAC_C
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
LADATAN_0
LADATAN_1
LADATAN_2
RSVD_1
LADATAP_0
LADATAP_1
LADATAP_2
RSVD_2
LA_CLKN
LA_CLKP
LBDATAN_0
LBDATAN_1
LBDATAN_2
RSVD_3
LBDATAP_0
LBDATAP_1
LBDATAP_2
RSVD_4
LBCLKN
LBCLKP
R120
R119
25-D2 55-A1
25-A2
24.9
1%
10K
10K
55-B1 25-B2
55-B1
0
21 3
1
3
100nF
100nF C108
13
15
0
D34
AA38
AB34
AC38
EXP_A_RXP_0
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
51-C3 51-D3 51-B3
3
2
4
1
10V
C51 100nF
F38
G34
H38
J34
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
PEG1_RXP(15:0) PEG1_RXN(15:0)
5
7
9
6
L38
M34
N38
P34
R38
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_4
EXP_A_RXP_5
11
10
T34
EXP_A_RXP_9
EXP_A_RXP_10
51-C3 51-D3 51-B3
P1.5V
3
2
0
18
9
81 4
10
4
6
5
7
11
12
10V
C52 100nF
M38
N34
P38
R34
J38
L34
EXP_A_RXN_6
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
T38
V34
W38
Y34
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
D40
D38
CLK
EXP_A_COMPI
EXP_A_COMPO
F34
G38
H34
EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
14
15
13
12
V38
W34
Y38
AA34
AB38
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
100nF
C75
C103
F36
G40
H36
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_RXP_15
PCIE GFX
U613-2
VGA PM
CALISTOGA
2 / 5
TV
LVDS
SDVOCTRL_CLK
LCTLA_CLK
LCTLB_DATA
LVDD_EN
F32
H30
H29
1%
1%
LBKLT_CTL
LBKLT_EN
J30
B38
D32
1.5K
R100
LIBG
C33
1%
LVREFH
LVREFL
C35
C32
3
LVBG
LDDC_CLK
LDDC_DATA
G26
G25
SDVOCTRL_DATA
CFG_0
K16
H28
H27
CFG_1
CFG_2
J18
K18
55-A3 10-B3
CFG_3
CFG_4
F18
F15
E15
10-C3 55-A3 8-C4
10-B3 55-A3
55-B2
55-A1
55-B1 25-A4
CFG_5
CFG_6
E18
17-D2 56-D4
8-C4
8-C4
28-B4 55-B2
28-B4
25-B4
D19
CFG_10
CFG_7
CFG_8
CFG_9
E16
D15
D16
G16
9
11
10
MCH3_CFG(5)
CPU1_BSEL2
CPU1_BSEL1
CPU1_BSEL0
DVO2_CTRLDATA
DVO2_CTRLCLK
LCD3_EDID_D
LCD3_EDID_C
CFG_11
CFG_12
K15
G15
1213
CFG_13
CFG_14
C15
H16
CFG_15
CFG_16
H15
G18
CFG_17
CFG_18
J25
K27
19
CFG_19
CFG_20
J26
20
56-D4 17-D2
17-C2 56-D4
17-D2
17-C2
55-A1 56-D4
51-C3
51-D3
5
4
6
7
100nF C100
100nF C110
100nF
C99 100nF
C105
C111 100nF
M40
N36
P40
J40
L36
EXP_A_TXN_6
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
RSVD_5
RSVD_6
RSVD_7
RSVD_8F3RSVD_9
F7
A41
AF11
AG11
MCH3_CFG(20:19)
MCH3_CFG(16)
MCH3_CFG(13:9)
2
12
1011
9
8
100nF C133
100nF C143
100nF C107
C101 100nF
C142 100nF
R36
T40
V36
W40
Y36
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
RSVD_10H7RSVD_11
RSVD_12
RSVD_13
J19
T32
R32
2
0
14
15
100nF C140
C74 100nF
C137 100nF
C134 100nF
D36
AA40
AB36
AC40
EXP_A_TXN_12
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
NC_1
NC_2
NC_3A4NC_4
A3
A39
A40
AW1
51-C3
51-D3
1
4
5
2
3
100nF C73
100nF C102
C109 100nF
C113 100nF
F40
G36
H40
J36
L40
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
NC RSVD CFG
NC_5
NC_6
NC_7
NC_8
NC_9
B2
B41
AY1
AY41
AW41
PEG1_TXP(15:0) PEG1_TXN(15:0)
9
10 6
8
7
100nF C106
100nF
100nF C98
C114 100nF
C104
C112 100nF
M36
N40
P36
R40
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
NC_10
NC_11
NC_12
NC_13
BA1
BA2
BA3
BA39
11
13
14
12
100nF
100nF
100nF
100nF C135
100nF C136
C139
C141
C115
T36
V40
W36
Y40
AA36
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
DMI DDR MUX
SM_OCDCOMP_0
SM_OCDCOMP_1
NC_14
NC_15
NC_16
NC_17C1NC_18
D1
C41
BA40
BA41
15
100nF
C138
C737 100nF
C735 100nF
C727 100nF
C736 100nF
AB40
EXP_A_TXP_14
EXP_A_TXP_15
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
SM_CK*_0
SM_CK*_1
SM_CK*_2
SM_CK*_3
SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3
SM_CS*_0
SM_CS*_1
SM_CS*_2
SM_CS*_3
SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMPN
SM_RCOMPP
SM_VREF_0
SM_VREF_1
NC_19
100nF C728
100nF C739
100nF C729
100nF C738
AE35
AF39
AG35
AH39
AC35
AE39
AF35
AG39
AE37
AF41
AG37
AH41
AC37
AE41
AF37
AG41
AW35
AT1
AY7
AY40
AY35
AR1
AW7
AW40
AW13
AW12
AY21
AW21
AU20
AT20
BA29
AY29
BA13
BA12
AY20
AU21
AV9
AT9
AK1
AK41
AL20
AF10
28-C3
28-C3
28-B3
28-C3
28-C3
28-C3
28-C3
28-C3
21-C?
21-C?
21-B?
21-B?
21-C?
21-C?
21-B?
21-B?
21-C?
21-C?
21-C?
21-B?
21-C?
21-C?
21-C?
21-B?
18-C4
18-C4
18-C2
18-C2
18-C4
18-C4
18-C2
18-C2
18-C4 19-D4
19-D4 18-C4
18-C2 19-D4
18-C2 19-D4
19-D4 18-C4
19-D4 18-C4
19-D4 18-C2
18-C2 19-D4
18-B4 19-C4
18-B4 19-C4
19-C4 18-B2
19-C4 18-B2
1
DVO3_RED*
DVO3_GREEN*
DVO3_BLUE*
DVO3_CLK*
DVO3_RED
DVO3_GREEN
DVO3_BLUE
DVO3_CLK
DMI1_TXN0
DMI1_TXN1
DMI1_TXN2
DMI1_TXN3
DMI1_TXP0
DMI1_TXP1
DMI1_TXP2
DMI1_TXP3
DMI1_RXN0
DMI1_RXN1
DMI1_RXN2
DMI1_RXN3
DMI1_RXP0
DMI1_RXP1
DMI1_RXP2
DMI1_RXP3
CLK1_MCLK0*
CLK1_MCLK1*
CLK1_MCLK2*
CLK1_MCLK3*
CLK1_MCLK0
CLK1_MCLK1
CLK1_MCLK2
CLK1_MCLK3
MEM1_CS0*
MEM1_CS1*
MEM1_CS2*
MEM1_CS3*
MEM1_CKE0
MEM1_CKE1
MEM1_CKE2
MEM1_CKE3
P1.8V_AUX
MEM1_ODT0
MEM1_ODT1
MEM1_ODT2
MEM1_ODT3
MEM1_VREF
Route as short as possible
1
R136
80.6
1%
R137
80.6
1%
D
C
B
A
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
MEM1_ADQ(63:0)
19-C4
19-C4 18-C4
19-C4
19-C4 18-B4
19-C4 18-B4
470nF
470nF
0
1
2
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
6
7
8
9
10
11
12
13
AU12
AV14
BA20
AJ33
AM35
AL26
AN22
AM14
AK32
AU33
AN27
AM21
AM12
AK33
AT33
AN28
AM22
AN12
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
AW14
AY13
AY14
AK23
AK24
16V
16V
AR3
AH4
AN3
AH5
AN8
AP3
AG5
AL9
AL8
SA_BS_0
SA_BS_1
SA_BS_2
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS*_0
SA_DQS*_1
SA_DQS*_2
SA_DQS*_3
SA_DQS*_4
SA_DQS*_5
SA_DQS*_6
SA_DQS*_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RAS*
SA_CAS*
SA_WE*
SA_RCVENIN*
SA_RCVENOUT*
C
B
MEM1_ABS0
MEM1_ABS1
MEM1_ABS2
MEM1_ADM(7:0)
MEM1_ADQS*(7:0)
MEM1_ADQS(7:0)
MEM1_AMA(13:0)
MEM1_ARAS*
MEM1_ACAS*
MEM1_AWE*
18-C4
18-C4
18-B4
18-A4
18-B4
18-D4
19-D3
18-C4 19-C4
C751
C759
18-D4
02
1
AJ35
AJ34
SA_DQ_0
SA_DQ_1
SB_DQ_0
AK39
1
3
4
AM31
AM33
SA_DQ_2
SA_DQ_3
SB_DQ_1
SB_DQ_2
AJ37
AP39
2
3
6
5
AK35
AJ36
SA_DQ_5
SA_DQ_4
8
7
AH31
AJ32
SA_DQ_7
SA_DQ_6
11
9
10 16
12
AR31
AP31
AN35
AP33
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
13
14
AN38
AM36
AM34
SA_DQ_12
SA_DQ_13
15
17
AN33
AK26
AL27
SA_DQ_14
SA_DQ_15
SA_DQ_16
22 60 45
26
20
23 35
18
AM26
SA_DQ_17
21
AN24
AK28
AL28
SA_DQ_18
SA_DQ_19
SA_DQ_20
24
AM24
AP26
AP23
SA_DQ_21
SA_DQ_22
SA_DQ_23
25
AL22
AP21
SA_DQ_24
SA_DQ_25
28
AN20
AL23
AP24
SA_DQ_26
SA_DQ_27
SA_DQ_28
33
36 42
34 61
30332
AP12
AP20
AT21
AR12
AR14
AP13
SA_DQ_34
SA_DQ_35
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
38
37
AT13
AT12
AL14
SA_DQ_36
SA_DQ_37
39 19
40
AL12
AK9
SA_DQ_38
SA_DQ_39
41
AN7
AK8
AK7
SA_DQ_40
SA_DQ_41
SA_DQ_42
44 27
46
AP9
AN9
AT5
SA_DQ_43
SA_DQ_44
SA_DQ_45
47
49
AL5
AY2
AW2
SA_DQ_46
SA_DQ_47
SA_DQ_48
AP1
SA_DQ_49
43
SYSTEM MEMORY A
AG12
AH12
VCCSM_1
VCCSM_2
AH13
VCCSM_3
AH24
AH17
AH16
VCCSM_5
VCCSM_4
AH27
AH26
AH25
VCCSM_8
VCCSM_6
VCCSM_7
AH28
AH29
AJ1
VCCSM_9
VCCSM_10
VCCSM_11
AJ12
AJ13
AJ14
VCCSM_12
VCCSM_13
VCCSM_14
VCCSM_15
AJ15
AJ16
AJ17
VCCSM_16
VCCSM_17
VCCSM_18
AJ18
AJ19
AJ22
VCCSM_19
VCCSM_20
VCCSM_21
AJ23
AJ24
AJ25
VCCSM_22
VCCSM_23
AJ28
AJ26
AJ27
VCCSM_24
VCCSM_25
VCCSM_26
VCCSM_27
AJ29
AJ6
AK11
VCCSM_28
VCCSM_29
VCCSM_30
AK12
AK19
AK20
VCCSM_31
VCCSM_32
AK21
AK22
AK29
VCCSM_33
VCCSM_34
VCCSM_35
AK6
AL29
AL6
VCCSM_36
VCCSM_37
VCCSM_38
VCCSM_39
AM30
AM41
AM29
VCCSM_42
VCCSM_40
VCCSM_41
AN30
AN6
VCCSM_43
U613-3
CALISTOGA
3 / 5
VCCSM_86
VCCSM_87
VCCSM_88
VCCSM_89
VCCSM_90
VCCSM_91
VCCSM_92
VCCSM_93
VCCSM_94
VCCSM_95
VCCSM_96
AW8
AY15
AY19
SB_DQ_42
SB_DQ_43
SB_DQ_44
AJ9
AK13
AN10
45
44
AY22
AY26
AY30
SB_DQ_45
SB_DQ_46
AJ8
AK10
AH11
47 22
48 25 51
46
VCCSM_97
AY6
AY34
SB_DQ_47
SB_DQ_48
BA10
AW10
49 10
VCCSM_71
VCCSM_72
VCCSM_73
VCCSM_74
VCCSM_75
VCCSM_76
VCCSM_77
VCCSM_78
VCCSM_79
VCCSM_80
VCCSM_81
VCCSM_82
VCCSM_83
VCCSM_84
AV6
AV30
AV34
SB_DQ_30
SB_DQ_31
SB_DQ_32
AL19
AM19
AW29
34
33
AV8
AW19
AW15
SB_DQ_33
SB_DQ_34
SB_DQ_35
AP14
AN14
AN17
35
36
VCCSM_85
AW6
AW22
AW26
AW30
AW34
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
AJ11
AL15
AP15
AH10
AM16
39
40
42
41 53550
SB_DQ_41
VCCSM_57
VCCSM_58
VCCSM_59
VCCSM_60
VCCSM_61
VCCSM_62
VCCSM_63
VCCSM_64
VCCSM_65
VCCSM_66
VCCSM_67
VCCSM_68
VCCSM_69
AT6
AT8
AU15
SB_DQ_15
SB_DQ_16
SB_DQ_17
BA38
AV36
AR36
19 3
17
AU26
AU19
AU22
SB_DQ_18
SB_DQ_19
SB_DQ_20
AP36
BA36
AU36
21
20
VCCSM_70
AV1
AV15
AV19
AU30
AU34
AU40
AU41
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
AT31
AP35
AP34
AY33
BA33
AU29
AU31
28
26 37
24
23
AV22
AV26
SB_DQ_28
SB_DQ_29
AV29
AW31
30
31
VCCSM_55
VCCSM_56
AR6
AR8
AT15
AT19
AT22
AT26
AT30
AT34
SB_DQ_9
SB_DQ_10
AV41
AU38
SB_DQ_11
SB_DQ_12
AV38
AP38
AR40
14 11
13
12
AT41
SB_DQ_13
SB_DQ_14
AY38
AW38
16
15
AR34
SB_DQ_8
SB_DQ_6
SB_DQ_7
SB_DQ_4
SB_DQ_5
SB_DQ_3
AJ38
AT40
AP41
AK38
AN41
AR41
5
9
4
8 54 01 8 4 3
6
7
56
5859 52 29
53 50
57 48
51
55
54
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
P1.8V_AUX
AP19
AP22
AP30
AP6
AP8
AR15
AR19
AR22
VCCSM_44
VCCSM_45
VCCSM_46
VCCSM_47
VCCSM_48
VCCSM_49
VCCSM_50
VCCSM_51
VCCSM_100
VCCSM_101
VCCSM_102
VCCSM_103
VCCSM_104
VCCSM_99
BA15
BA19
BA22
BA23
BA26
VCCSM_105
BA30
BA34
VCCSM_98
AY8
SYSTEM MEMORY B
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
AW4
52 38
AY10
SB_DQ_56
AY9
AY5
AV4
AR5
AW5
55
56
57
58 32
SB_DQ_49
BA4
62
AF6
AG9
AH6
AF4
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
AR26
AR30
VCCSM_52
VCCSM_53
VCCSM_54
VCCSM_106
VCCSM_107
VCCSM_108
BA6
BA8
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
AT4
AK4
AK3
AK5
59
61 27
60
62
63 31
AF8
SA_DQ_63
SA_DQ_62
SB_DQ_61
SB_DQ_62
SB_DQ_63
AJ5
AJ3
63 29
2
C154
C750
SB_BS_0
SB_BS_1
SB_BS_2
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS*_0
SB_DQS*_1
SB_DQS*_2
SB_DQS*_3
SB_DQS*_4
SB_DQS*_5
SB_DQS*_6
SB_DQS*_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS*
SB_CAS*
SB_WE*
SB_RCVENIN*
SB_RCVENOUT*
18-D2
16V
470nF
470nF
16V
AT24
AV23
AY28
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5
AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23
AU23
AR24
AR27
AK16
AK18
MEM1_BDQ(63:0)
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
8
9
10
11
12
13
19-C4
18-C2 19-C4
18-C2 19-C4
19-C4 18-C2
18-B2
18-A2
18-B2
18-B2 19-C4
18-C2 19-C4
18-B2
MEM1_BDQS*(7:0)
MEM1_BDQS(7:0)
MEM1_BMA(13:0)
18-D2 19-C3
MEM1_BRAS*
MEM1_BCAS*
MEM1_BWE*
Place near BA15 pin
MEM1_BBS0
MEM1_BBS1
MEM1_BBS2
MEM1_BDM(7:0)
P1.8V_AUX
Check Load Transient
EC17
330uF
2.5V
AL
C767
470nF
16V
Place near BA23 or AJ23 pin
Dual Channel
SM_CK(2:0)
SM_CK(2:0)*
SM_CK(5:3)
SM_CK(5:3)*
SM_CS(1:0)*
SM_CKE(1:0)
SM_ODT(1:0)
SM_CS(3:2)*
SM_SKE(3:2)
SM_ODT(3:2)
SDVO Mode
SDVOB_RED*
SDVO_RED
SDVOB_GREEN*
SDVOB_GREEN
SDVOB_BLUE*
SDVOB_BLUE
SDVOB_CLK*
SDVOB_CLK
SDVOC_RED*
SDVOB_ALPHA*
SDVOC_RED
SDVOB_ALPHA
SDVOC_GREEN*
SDVOC_GREEN
SDVOC_BLUE*
SDVOC_BLUE
SDVOC_CLK*
SDVOC_CLK
SDVO_TVCLKIN*
SDVO_TVCLKIN
SDVOB_INT*
SDVOB_INT
SDVO_STALLB
SDVO_STALL
SDVOC_INTB
SDVOC_INT
1
EC605
330uF
2.5V
AL
C768
470nF
16V
Ch. A (So-DIMM A)
SA_CK(2:0)
SA_CK(2:0)*
N/A
N/A
SA_CS(1:0)*
SA_CKE(1:0)
SA_ODT(1:0)
N/A
N/A
N/A
PEG (SAGP) Mode
EXP_TXN_0
EXP_TXP_0
EXP_TXN_1
EXP_TXP_1
EXP_TXN_2
EXP_TXP_2
EXP_TXN_3
EXP_TXP_3
EXP_TXN_4
EXP_TXP_4
EXP_TXN_5
EXP_TXP_5
EXP_TXN_6
EXP_TXP_6
EXP_TXN_7
EXP_TXP_7
EXP_RXN_0
EXP_RXP_0
EXP_RXN_1
EXP_RXP_1
EXP_RXN_2
EXP_RXP_2
EXP_RXN_5
EXP_RXP_5
Place in cavity
C161
C157
10000nF
10000nF
6.3V
6.3V
Ch. B (So-DIMM B)
N/A
N/A
SB_CK(2:0)
SB_CK(2:0)*
N/A
N/A
N/A
SB_CS(3:2)*
SB_CKE(3:2)
SB_ODT(3:2)
D
C
B
A
4
3
2
1
A
3
4
VCCP
4
AA18
AA24
AA25
AA26
AA27
AB18
AB24
AB25
AB26
AB27
AC18
AC24
AC25
AC26
AC27
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
W18
W24
W25
W26
W27
R20
R21
R22
R23
R24
R25
R26
R27
T18
T19
T20
T21
T22
T23
T24
T25
T26
T27
U18
U19
U20
U21
U22
U23
U24
U25
U26
U27
V18
V19
V20
V21
V22
V23
V24
V25
V26
V27
Y18
Y24
Y25
Y26
Y27
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
VCC_NCTF_45
VCC_NCTF_46
VCC_NCTF_47
VCC_NCTF_48
VCC_NCTF_49
VCC_NCTF_50
VCC_NCTF_51
VCC_NCTF_52
VCC_NCTF_53
VCC_NCTF_54
VCC_NCTF_55
VCC_NCTF_56
VCC_NCTF_57
VCC_NCTF_58
VCC_NCTF_59
VCC_NCTF_60
VCC_NCTF_61
VCC_NCTF_62
VCC_NCTF_63
VCC_NCTF_64
VCC_NCTF_65
VCC_NCTF_66
VCC_NCTF_67
VCC_NCTF_68
VCC_NCTF_69
VCC_NCTF_70
VCC_NCTF_71
VCC_NCTF_72
VCC_NCTF_73
P1.5V
AA16
AA17
AA15
VCCAUX_NCTF_2
VCCAUX_NCTF_3
VCCAUX_NCTF_1
P1.5V
AB16
AB17
AC15
AC16
AD15
AB15
VCCAUX_NCTF_5
VCCAUX_NCTF_6
VCCAUX_NCTF_7
VCCAUX_NCTF_8
VCCAUX_NCTF_4
C158
100nF
AD16
AD17
AE15
AE16
AE17
AF15
VCCAUX_NCTF_9
VCCAUX_NCTF_10
VCCAUX_NCTF_11
VCCAUX_NCTF_12
VCCAUX_NCTF_13
VCCAUX_NCTF_14
VCCP
AA19
AA21
AA23
AA28
AA29
AA30
AA31
AA32
AA33
AB19
AB20
AB22
AB23
AB28
AC20
AC21
AC22
J32
J33
L16
L18
L19
L20
L21
L22
L23
L25
L26
L27
L28
L29
L30
L32
L33
M16
M17
M18
M19
M20
M21
M22
M23
M24
M25
M27
M28
M29
M30
M31
M32
N16
N17
N18
N19
N20
VCCAUX_5
VCCAUX_3
VCCAUX_4
VCCAUX_2
VCCAUX_1
AD29
AD30
AC31
AD12
AC30
AC29
AF19
AF20
AF21
AF16
AF17
AF18
VCCAUX_NCTF_19
VCCAUX_NCTF_20
VCCAUX_NCTF_15
VCCAUX_NCTF_16
VCCAUX_NCTF_17
VCCAUX_NCTF_18
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCCAUX_6
VCCAUX_7
VCCAUX_8
VCCAUX_9
VCCAUX_10
VCCAUX_11
AE12
AE13
AE14
AE30
AE28
AE29
SAMSUNG PROPRIETARY
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
D
C
C
B
B
A
A A
3
AF22
AF23
AF24
AF25
AF26
AF27
VCCAUX_NCTF_21
VCCAUX_NCTF_22
VCCAUX_NCTF_23
VCCAUX_NCTF_24
VCCAUX_NCTF_25
VCCAUX_NCTF_26
VCCAUX_NCTF_27
U613-4
CALISTOGA
VCCAUX_12
VCCAUX_13
VCCAUX_14
VCCAUX_15
VCCAUX_16
VCCAUX_17
VCCAUX_18
AF12
AF13
AF14
AF28
AF29
AE31
AG20
AG21
AG15
AG16
AG17
AG18
AG19
VCCAUX_NCTF_33
VCCAUX_NCTF_28
VCCAUX_NCTF_29
VCCAUX_NCTF_30
VCCAUX_NCTF_31
VCCAUX_NCTF_32
4 / 5
VCCAUX_19
VCCAUX_20
VCCAUX_21
VCCAUX_22
VCCAUX_23
VCCAUX_24
AF30
AF31
AH14
AG14
AG28
AG29
AG30
AG22
AG23
AG24
AG25
AG26
AG27
VCCAUX_NCTF_34
VCCAUX_NCTF_35
VCCAUX_NCTF_36
VCCAUX_NCTF_37
VCCAUX_NCTF_38
VCCAUX_NCTF_39
VCCAUX_NCTF_40
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
VCC_111
VCCAUX_27
VCCAUX_28
VCCAUX_29
VCCAUX_30
VCCAUX_31
VCCAUX_25
VCCAUX_26
AH19
AH20
AH21
AH22
AH30
AH15
R15
R16
R17
R18
R19
T15
VCCAUX_NCTF_41
VCCAUX_NCTF_42
VCCAUX_NCTF_43
VCCAUX_NCTF_44
VCCAUX_NCTF_45
VCCAUX_NCTF_46
VCCP
N21
N22
N23
N24
N25
N26
N27
N28
N30
N31
N32
N33
P17
P20
P22
P23
P24
P26
P27
P28
P29
P30
P31
P32
P33
R28
R29
R30
R31
T28
T30
T31
U28
U29
U30
V28
V29
V30
V31
V32
W20
W21
W22
W29
W30
W31
W32
W33
Y19
Y20
Y22
Y23
Y28
Y29
Y30
Y32
VCCAUX_32
VCCAUX_33
VCCAUX_34
VCCAUX_35
VCCAUX_36
VCCAUX_37
AJ20
AJ21
AJ30
AL30
AK30
AK31
T17
U15
U16
V15
V16
V17
T16
VCCAUX_NCTF_48
VCCAUX_NCTF_49
VCCAUX_NCTF_50
VCCAUX_NCTF_51
VCCAUX_NCTF_52
VCCAUX_NCTF_47
VCCAUX_41
VCCAUX_38
VCCAUX_39
VCCAUX_40
Y14
P15
P16
P19
W15
W16
W17
Y15
Y16
VCCAUX_NCTF_53
VCCAUX_NCTF_54
VCCAUX_NCTF_55
VCCAUX_NCTF_56
VCCAUX_NCTF_57
VCCAUX_NCTF_58
VCCD_HMPLL_1
VCCD_HMPLL_2
VCCTX_LVDS_1
VCCTX_LVDS_2
VCCTX_LVDS_3
VCCA_CRTDAC_1
VCCA_CRTDAC_2
VCCA_TVDACA_1
VCCA_TVDACA_2
VCCA_TVDACB_1
VCCA_TVDACB_2
VCCA_TVDACC_1
VCCA_TVDACC_2
VCCD_LVDS_1
VCCD_LVDS_2
VCCD_LVDS_3
VCCD_TVDAC
VCCDQ_TVDAC
VCC3G_1
VCC3G_2
VCC3G_3
VCC3G_4
VCC3G_5
VCC3G_6
VCC3G_7
VCCHV_1
VCCHV_2
VCCHV_3
VCC_SYNC
VCCA_3GBG
VSSA_3GBG
VCCA_3GPLL
VSSA_CRTDAC
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCA_LVDS
VSSA_LVDS
VCCA_TVBG
VSSA_TVBG
2
2
121
VCCP
AH1
AH2
A28
B28
C28
A30
B30
C30
D21
H19
AB41
AJ41
L41
N41
R41
V41
Y41
A23
B23
B25
H22
G41
H41
AC33
E21
F21
G21
B26
C39
AF1
AF2
A38
B39
H20
G20
E19
F19
C20
D20
E20
F20
P1.5V
R787
R789
R790
C717
100nF
C145
10000nF
6.3V
C70
100nF
C97
100nF
0
C66
100nF
10V
C67
100nF
10V
0
0
P3.3V
P2.5V
C726
100nF
P1.5V
C716
100nF
C719
4700nF
10V
CIS10J270NC
C144
10000nF
6.3V
C723
10000nF
6.3V
C96
100nF
R769
C725
10nF
C94
100nF
10V
R788
0
C718
10000nF
6.3V
P2.5V
B12
EC18
330uF
2.5V
AL
Caps should be on top layer
C132
100nF
P2.5V
0
EC9
EC10
330uF
330uF
2.5V
2.5V
AL
AL
NO STUFF
Check Load Transient
100nF Caps used in 1.5V_DLVDS, 2.5V_ALVDS,
2.5V_TXLVDS, 2.5V_3GBG should be placed
within 200mils of edge
R768
0
C724
100nF
P1.5V
C92
100nF
10V
Caps should be placed in cavity
P1.5V
B621
MMZ1608S121AT
C752
10000nF
6.3V
100nF
C758
100nF
10000nF
EC4
C71
330uF
2.5V AL
10V
C756
10000nF
6.3V
MMZ1608S121AT
C722
6.3V
C95
100nF
10V
B618
C755
10000nF
6.3V
C131
C126
10000nF
10000nF
6.3V
P1.5V
B11
MMZ1608S121AT
100nF Caps used in 1.5V_TVDAC,
1.5V_QTVDAC
B10
MMZ1608S121AT
C129
C89
220nF
1000nF
16V
within 250mils of edge
P2.5V
C65
100nF
10V
P1.5V
Caps should be within 250mils of edge
B8
MMZ1608S121AT
C72
EC5
AL 2.5V
C748
100nF
B9
MMZ1608S121AT
B624
MMZ1608S121AT
C746
C747
10000nF
10000nF
6.3V
6.3V
100nF
10V
330uF
P3.3V
R786
10
D609
MMBD301LT1
C91
220nF
16V
C69
100nF
R92
10
MMBD301LT1
P1.5V
B620
MMZ1608S121AT
1 3
C130
220nF
16V 6.3V
D12
P1.5V
VCCP
1 3
P1.5V
Why need LDO for TVDAC 3.3V ??
C93
100nF
10V
100nF caps need to be located
within 250mils
100nF caps need to be located
as edge caps within 200mils
DD
C
C
B
B
A
4 3
3
2
1
1 4
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
C
B
AW28
AW3
AW33
AW36
AW39
AW9
AY12
AY17
AY31
AY36
AY39
BA14
BA21
BA24
BA28
BA35
3
AC32
AC34
AC36
A22
A20
A18
A15
VSS_3
VSS_2
VSS_1
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
AY3
VSS_179
VSS_180
VSS_181
VSS_182
AY4
VSS_183
B11
VSS_184
B13
VSS_185
B15
VSS_186
B20
VSS_187
B27
VSS_188
B29
VSS_189
B32
VSS_190
B33
VSS_191
B36
VSS_192
B40
VSS_193
B6
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
BA7
VSS_200
BA9
VSS_201
C16
VSS_202
C19
VSS_203
C2
VSS_204
C21
VSS_205
C23
VSS_206
C27
VSS_207
C29
VSS_208
C34
VSS_209
C36
VSS_210
C38
VSS_211
C4
VSS_212
C8
VSS_213
D11
VSS_214
D13
VSS_215
D18
VSS_216
D22
VSS_217
D25
VSS_218
D26
VSS_219
D33
VSS_220
D35
VSS_221
D37
VSS_222
D39
VSS_223
D7
VSS_224
E12
VSS_225
E14
VSS_226
E22
VSS_227
E25
VSS_228
E28
VSS_229
E29
VSS_230
E30
VSS_231
E9
VSS_232
F13
VSS_233
F16
VSS_234
F2
VSS_235
F22
VSS_236
F23
VSS_237
F26
VSS_238
F27
VSS_239
F33
VSS_240
A25
VSS_4
VSS_5
A29
VSS_6
A9
AA11
VSS_8
VSS_7
AA14
VSS_9
AA20
VSS_10
G19
G22
G27
G29
G32
G33
G35
G37
G39
H12
H14
H18
H21
H25
H33
H35
H37
H39
M15
M26
M33
M35
AA22
VSS_11
F35
F37
F39
F4
F41
G3
G7
G9
H2
H6
J11
J16
J2
J21
J23
J27
J28
J35
J37
J39
J4
J41
K12
K14
K19
K20
K21
K22
K23
K25
K26
K29
K6
K8
L15
L35
L37
L39
AA35
AA3
VSS_12
AA37
AA39
VSS_14
VSS_13
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
AA41
VSS_16
VSS_15
AA8
VSS_17
AB30
AB29
AB21
AB2
VSS_21
VSS_20
VSS_19
VSS_18
CALISTOGA
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_1
AE18
AE19
AC17
AB33
AB35
AB32
AB31
VSS_24
VSS_25
VSS_23
VSS_22
U613-5
5 / 5
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
AE20
AE21
AE22
AE23
AB9
AB39
AB6
AB37
VSS_29
VSS_27
VSS_28
VSS_26
VSS_NCTF_11
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
AE27
AE24
AE25
AE26
AC19
AC10
AC12
VSS_32
VSS_30
VSS_31
VSS_NCTF_12
VSS_NCTF_13
Y17
U17
AC28
AC23
VSS_33
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
VSS_361
AC3
VSS_34
VSS_35
VSS_36
VSS_37
AC39
VSS_38
VSS_39
M37
M39
M41
N15
N2
N29
N35
N37
N39
N6
P13
P18
P21
P25
P35
P37
P39
P41
R33
R35
R37
R39
R4
R7
R9
T2
T29
T33
T35
T37
T39
T41
U10
U14
U2
U4
U6
U8
V33
V35
V37
V39
W10
W19
W23
W28
W35
W37
W39
W41
Y11
Y2
Y21
Y31
Y33
Y35
Y37
Y39
Y4
Y6
Y9
AC41
VSS_40
AC7
AD11
VSS_41
AD14
AD2
VSS_42
VSS_43
AD28
AD3
VSS_44
VSS_45
AD5
AD6
VSS_46
VSS_47
AD8
AE32
VSS_48
VSS_49
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_50
AK37
AK40
AL1
AL10
AL13
AL16
AL21
AL24
AL3
AL4
AL7
AM13
AM15
AM17
AM20
AM23
AM27
AM28
AM38
AN13
AN15
AN16
AN19
AN21
AN23
AN26
AN29
AN31
AN34
AN36
AN39
AN40
AP10
AP17
AP2
AP27
AP28
AP4
AP40
AP7
AR13
AR17
AR2
AR20
AR21
AR33
AR35
AR39
AR4
AR9
AT14
AT2
AT23
AT29
AT38
AU24
AU28
AV10
AV13
AV16
AV21
AV3
AV31
AV33
AV35
AV39
AV40
AV5
AV7
AW20
AW23
2
1K
MCH3_CFG(19)
MCH3_CFG(20)
MCH3_CFG(5)
MCH3_CFG(9)
MCH3_CFG(10)
MCH3_CFG(11)
MCH3_CFG(12)
MCH3_CFG(13)
MCH3_CFG(16)
14-A2 56-D4
14-A3 56-D4
14-A2
14-A2 55-A1
14-A2
14-A2 56-D4
14-A2
** Note
CFG#
CFG(5)
CFG(6)
CFG(9)
CFG(16)
CFG(18)
CFG(19)
CFG(20)
When CFG 13:12 are pulled down to ’00’, certain clocks within Calistoga
will become free-running clocks.
This will lead to a rise in avg. power, but eliminates any possible clock-timing
marginalities involved in clock power-up/power-down.
Intel strongly recommends leaving CFG 13:12 = NC (Internal PU to ’11’) to ensure low avg.power.
R118
56-D4 14-A2
56-D4
55-A1 14-A2
56-D4
56-D4
CFG(17:3)
CFG(20:18)
R117
R109
R112
R94
R93
R110
R111
R113
Internal Pull-up
Internal Pull-down
1K
2K
2K
2K
2K
2K 1%
2K 1%
1%
1%
1%
1%
1%
1% 2K
*POCAFEB-10 Only (Remove in MP Model)
Low
(def. : default Option)
High
DMIx4 (def.)
DDR-II (def.)
Mobile CPU (def.)
Normal
Dynamic ODT
Enabled (def.)
VCC 1.5V
DMI Lane Reversal
SDVO and PCIE X1
Simultaneously
Current Setting
DMIx2
Reserved
DT/Transportable CFG(7)
PEG Reversal
Dynamic ODT
Disabled
VCC 1.05V (def.)
DMI Lane Normal
SDVO or PCIE X1
Only(def.)
P3.3V
1
D
C
B
A
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
AK15
AK17
VSS_99
AK2
AK25
AK27
AK34
2
1
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
AH37
AH38
AH40
AH7
AH9
VSS_86
AJ2
AJ10
AJ31
AJ39
AJ4
AJ7
AJ40
AK14
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
AG3
AG31
AG32
AG34
AG36
VSS_71
AG40
AG38
AG6
AH3
AG8
AH18
AH23
AH32
AH35
AH36
3
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
AF5
AF32
AF34
AF36
AF38
AF40
AF7
AG10
AG13
AE33
AE34
AE36
AE38
AE40
AF3
4
A
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
3 4
2
1
D
B
MEM1_ADQ(63:0)
MEM1_AMA(13:0)
MEM1_ABS2
MEM1_ABS0
MEM1_ABS1
MEM1_CS0*
MEM1_CS1*
CLK1_MCLK0
CLK1_MCLK0*
CLK1_MCLK1
CLK1_MCLK1*
MEM1_CKE0
MEM1_CKE1
MEM1_ACAS*
MEM1_ARAS*
MEM1_AWE*
R845
R844
CLK3_SMBCLK
CLK3_SMBDATA
MEM1_ODT0
MEM1_ODT1
MEM1_ADM(7:0)
Address : ’A0’
MEM1_ADQS(7:0)
MEM1_ADQS*(7:0)
15-B4
19-D3
15-C4
15-C4
15-C4
15-D4
15-C4 19-C4
19-C4 15-D4
19-C4 15-C4
19-D4 14-B1
19-D4 14-B1
14-B1
14-B1
14-B1
14-B1
14-B1
19-D4
19-D4 14-B1
19-C4 15-B4
19-C4 15-B4
19-C4 15-B4
1% 10K
1% 10K
55-C3
18-B220-?3
8-C4
18-B220-?3
8-C4
55-C3
14-B1 19-C4
14-B1 19-C4
DDR1-1
DDR2-SODIMM-200P-STD
0
102
A0
1
101
A1
2
100
A2
3
99
A3
4
98
A4
5
97
A5
6
94
A6
7
92
A7
8
93
A8
9
91
A9
10
105
A10_AP
11
90
A11
12
89
A12
13
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0*
115
S1*
30
CK0
32
CK0*
164
CK1
166
CK1*
79
CKE0
80
CKE1
113
CAS*
108
RAS*
109
WE*
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
0
10
DM0
1
26
DM1
2
52
DM2
3
67
DM3
4
130
DM4
5
147
DM5
6
170
DM6
7
185
DM7
0
13
DQS0
1
31
DQS1
2
51
DQS2
3
70
DQS3
4
131
DQS4
5
148
DQS5
6
169
DQS6
7
188
DQS7
0
11
DQS*0
1
29
DQS*1
2
49
DQS*2
3
68
DQS*3
4
129
DQS*4
5
146
DQS*5
6
167
DQS*6
7
186
DQS*7
3709-001325
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
MEM1_BDQ(63:0)
P1.8V_AUX
DDR1-2
DDR2-SODIMM-200P-STD
0
5
1
7
2
17
3
19
4
4
5
6
6
14
7
16
8
23
9
25
10
35
11
37
12
20
13
22
14
36
15
38
16
43
17
45
18
55
19
57
20
44
21
46
22
56
23
58
24
61
25
63
26
73
27
75
28
62
29
64
30
74
31
76
32
123
33
125
34
135
35
137
124
37
126
38
134
39
136
40
141
41
143
42
151
43
153
44
140
45
142
46
152
47
154
48
157
49
159
50
173
51
175
52
158
160
54
174
55
176
56
179
57
181
58
189
59
191
60
180
61
182
62
192
63
194
P3.3V
C789
C790
100nF
2200nF
10V
MCH3_EXTTS0* MCH3_EXTTS0*
MEM1_VREF
C806
C805
2200nF
100nF
10V
P1.8V_AUX
2/2 2/2 1/2 1/2
14-C4 18-C1
56-A3
C802
2200nF
112
111
117
96
95
118
81
82
87
103
88
104
199
83
120
50
69
163
201
202
47
133
183
77
12
48
184
78
71
72
121
122
196
193
C792
2200nF
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDDSPD
NC1
NC2
NC3
NC4
NCTEST
1
VREF
GND0
GND1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
8
VSS15
3709-001325
C791
2200nF
C804
2200nF
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
C794
2200nF
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
MEM1_BMA(13:0)
P3.3V
CLK3_SMBDATA
MEM1_BDM(7:0)
Address : ’A4’
MEM1_BDQS(7:0)
MEM1_BDQS*(7:0)
MEM1_BBS2
MEM1_BBS0
MEM1_BBS1
MEM1_CS2*
MEM1_CS3*
CLK1_MCLK3
CLK1_MCLK3*
CLK1_MCLK2
CLK1_MCLK2*
MEM1_CKE2
MEM1_CKE3
MEM1_BCAS*
MEM1_BRAS*
MEM1_BWE*
CLK3_SMBCLK
MEM1_ODT2
MEM1_ODT3
R854
R853
15-B2
19-C3
15-C2
15-C2
15-C2
15-A2
15-D2 19-C4
15-C2 19-C4
14-B1 19-D4
14-B1 19-D4
14-B1
14-B1
14-B1
14-B1
14-B1 19-D4
14-B1 19-D4
15-B2 19-C4
15-B2 19-C4
15-B2 19-C4
10K 1%
10K 1%
55-C3
8-C4
8-C4
DDR2-1
DDR2-SODIMM-200P-RVS
0
102
A0
1
101
A1
2
100
A2
3
99
A3
4
98
A4
5
97
A5
6
94
A6
7
92
A7
8
93
A8
9
91
A9
10
105
A10_AP
11
90
A11
12
89
A12
13
116
A13
86
A14
84
A15
85
A16_BA2
19-C4 15-C2
107
BA0
106
BA1
110
S0*
115
S1*
30
CK0
32
CK0*
164
CK1
166
CK1*
79
CKE0
80
CKE1
113
CAS*
108
RAS*
109
WE*
198
SA0
200
SA1
197
SCL
20-?3 18-B4
195
SDA
20-?3 18-B4
55-C3
114
ODT0
19-C4 14-B1
119
ODT1
19-C4 14-B1
0
10
DM0
1
26
DM1
2
52
DM2
3
67
DM3
4
130
DM4
5
147
DM5
6
170
DM6
7
185
DM7
0
13
DQS0
1
31
DQS1
2
51
DQS2
3
70
DQS3
4
131
DQS4
5
148
DQS5
6
169
DQS6
7
188
DQS7
0
11
DQS*0
1
29
DQS*1
2
49
DQS*2
3
68
DQS*3
4
129
DQS*4
5
146
DQS*5
6
167
DQS*6
7
186
DQS*7
3709-001327
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
P1.8V_AUX
DDR2-2
DDR2-SODIMM-200P-RVS
0
5
1
7
2
17
3
19
4
4
5
6
6
14
7
16
8
23
9
25
10
35
11
37
12
20
13
22
14
36
15
38
16
43
17
45
18
55
19
57
20
44
21
46
22
56
23
58
24
61
25
63
26
73
27
75
28
62
29
64
30
74
31
76
32
123
33
125
34
135
35
137
36 36
124
37
126
38
134
39
136
40
141
41
143
42
151
43
153
44
140
45
142
46
152
47
154
48
157
49
159
50
173
51
175
52
158
53 53
160
54
174
55
176
56
179
57
181
58
189
59
191
60
180
61
182
62
192
63
194
P3.3V
C830
100nF
10V
MEM1_VREF
C242
100nF
10V
C831
2200nF
P1.8V_AUX
C243
2200nF
10V
C832
2200nF
56-A3
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
18-C3 14-C4
69
NC4
163
NCTEST
1
VREF
201
GND0
202
GND1
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
3709-001327
C842
C824
C821
2200nF
2200nF
2200nF
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
C844
2200nF
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
D
C C
B
A A
4
3
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
MEM1_CS0*
MEM1_CS1*
MEM1_CS2*
MEM1_CS3*
MEM1_CKE0
MEM1_CKE1
MEM1_CKE2
MEM1_CKE3
MEM1_ODT0
MEM1_ODT1
MEM1_ODT2
MEM1_ODT3
MEM1_ABS0
MEM1_ABS1
MEM1_ABS2
MEM1_ACAS*
C
MEM1_ARAS*
MEM1_AWE*
MEM1_BBS0
MEM1_BBS1
MEM1_BBS2
MEM1_BCAS*
MEM1_BRAS*
MEM1_BWE*
14-B1 18-C4
14-B1 18-C4
14-B1 18-C2
14-B1 18-C2
14-B1 18-C4
14-B1 18-C4
18-C2
14-B1
18-C2 14-B1
14-B1
18-B4
18-B4 14-B1
18-B2 14-B1
14-B1 18-B2
15-D4
18-C4
18-C4 15-C4
18-C4
15-C4
15-B4 18-C4
18-B4 15-B4
18-B4 15-B4
15-D2 18-C2
15-C2 18-C2
18-C2 15-C2
15-B2 18-C2
15-B2 18-B2
18-B2
15-B2
RA604-2
RA601-1
RA615-1
RA620-2
RA613-1
RA612-1
RA626-2
RA619-2
RA602-1
RA601-2
RA614-2
RA620-1
RA605-1
RA606-2
RA613-2
RA603-1
RA604-1
RA603-2
RA622-1
RA616-2
RA626-1
RA621-1
RA615-2
RA621-2
34
12
12
34
12
12
34
34
12
34
4
3
12
12
34
34
12
12
34
12
34
12
12
34
34
3
P0.9V
MEM1_AMA(13:0)
P0.9V
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
MEM1_BMA(13:0)
15-B4 18-D4
18-D2 15-B2
0
1
2
3
4
5
6
7
8
9
10
11
12
13
0
1
2
3
4
5
6
7
8
9
10
11
12
13
RA606-1
RA607-1
RA608-2
RA607-2
RA608-1
RA609-1
RA610-2
RA610-1
RA609-2
RA611-2
RA605-2
RA612-2
RA611-1
RA602-2
RA616-1
RA623-1
RA617-2
RA623-2
RA617-1
RA624-1
RA618-2
RA618-1
RA624-2
RA625-1
RA622-2
RA619-1
RA625-2
RA614-1
12
12
34
34
12
12
34
12
4
3
4
3
34
34
12
34
12
12
34
34
2
1
12
34
12
34
12
34
12
34
12
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
2
Memory Topology
VCCSM
DDR-II ::
P1.8V_AUX
VCCA_SM
P1.5V
VCCSM
Channel A
Calistoga
Channel B
VCCA_SM
( Dual channel for DDR-II )
(TBD) "
Address
(TBD) "
CS
(TBD) "
CKE
(TBD) "
BS
(TBD) "
CAS/RAS/WE
(TBD) "
DQ(63:0)
(TBD) "
CLK
(TBD) "
CLK
(TBD) "
DQ(63:0)
(TBD) "
Address
(TBD) "
CS
(TBD) "
CKE
(TBD) "
BS
(TBD) "
CAS/RAS/WE
1
P0.9V
P1.8V_AUX
DDR-II
Standard
Connector
Memory Channel A
P1.8V_AUX
DDR-II
Reverse
Connector
Memory Channel B
P0.9V
D
P3.3V
P3.3V
C
C776
100nF
10V
100nF
C793
100nF
10V
P1.8V_AUX
C156 C160
C799
100nF
100nF
Place near SO-DIMM0
C822
C774
100nF
100nF
10V
10V
C817
100nF
10V
C773
100nF
C816
100nF
10V
P1.8V_AUX
C840
C775
100nF
C797
100nF
C838
100nF
100nF
C820
100nF
C818
100nF
Place near SO-DIMM1
C837
100nF
10V
C841
100nF
10V
100nF
10V
C801
100nF
10V
100nF
10V
C796
100nF
10V
C836
100nF
10V
C798
100nF
10V
C833
C772
Place one cap close to every 2 pull-up resistors terminated to P0.9V
3
C771
100nF
10V
C843
100nF
10V
C825
100nF
10V
C819
100nF
10V
C795
100nF
B
EMI5
EMI3
EMI
CONTACT-PLATE-EMI
CONTACT-PLATE-EMI
EMI
EMI4
EMI1
EMI
CONTACT-PLATE-EMI
CONTACT-PLATE-EMI
EMI
A
2
1
P1.8V_AUX
B
C159
100nF
C155
100nF
Place near GMCH
P0.9V
C839
C845
C778
100nF
10V
C803
100nF
100nF
100nF
10V 10V
10V
10V
C823
100nF
10V
C800
100nF
10V
C777
100nF
10V
A
4
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
1
D
C
B
J1
HDR-2P-SMD
2
1
3711-000541
SMB3_CLK
SMB3_DATA
D616
BAT54C
R927
MICOM_P3V
3
12
1K
21-D? 23-C3 31-C3 32-C2
31-D3 23-C3 21-D?
32-C2
38-B4 39-B2
R926
56-B2 50-D1 39-B2 38-B4
56-B2
50-D1
20K
P3.3V
PRTC_BAT
C888
C889
1000nF
1000nF
6.3V
PLACE TO BOTTOM
ARROUND MEMORY DOOR
FOR RTC RESET
Q27
RHU002N06
G
1
S
D
2
3
G
1
D
3
Q28
RHU002N06
20-?3
C311
4700nF
10V
P3.3V
1%
1%
10K
10K
R332
R333
18-B4
55-C3 18-B2 8-C4
S
2
CHP3_RTCRST*
8-C4 18-B2 18-B4 55-C3
CLK3_SMBCLK
CLK3_SMBDATA
R901
Y602
32.768KHz
14
23
C890
0.007nF
10M
C885
0.007nF
CHP3_AZ_MDC_BCLK
CHP3_AZ_AUD_BCLK
CHP3_AZ_AUD_SYNC
CHP3_AZ_MDC_SYNC
CHP3_AZ_AUD_RST*
CHP3_AZ_MDC_RST*
CHP3_AZ_SDI0
CHP3_AZ_SDI1
CHP3_AZ_MDC_SDO
CHP3_AZ_AUD_SDO
CHP3_SATALED*
SATA1_RXN0
SATA1_RXP0
SATA1_TXN0
SATA1_TXP0
R403
24.9
1%
Place near to the ICH7
CHP3_RTCRST*
55-C4 41-D1
33-D4 55-C4
55-C4 33-D4
41-D2 55-B4
33-D4 55-C4
55-C4 41-D2
33-D4
55-B4
55-B4 41-D2
41-D2 55-B4
55-C4 33-D4
36-A3 55-B4
36-B4
36-B4
36-B4
36-B4
CLK1_SATA*
CLK1_SATA
IDE5_IOR*
IDE5_IOW*
IDE5_DACK*
IDE5_IDEIRQ
IDE5_IORDY
IDE5_DREQ
20-?4
R924
R925
R920
R921
R916
R918
R923
R922
C361
C362
C883
C884
8-B1
8-B1
36-C1 36-C3 55-C2
23-B3
33 5%
33 5%
33 5%
33 5%
4.7nF 25V
4.7nF 25V
4.7nF 25V
36-D1 55-C2 36-C3
36-C3 55-C2 36-C2
36-C2
36-C4 55-C2 36-C2
36-D1 55-C2 36-C3
PRTC_BAT
680K
R453
5% 33
5% 33
5% 33
5% 33
25V 4.7nF
55-C2 36-C3
680K
R452
AF18
AH10
AG10
AF15
AH15
AF16
AH16
AG16
AE15
AB1
AB2
AA3
AF3
AE3
AG2
AH2
AF7
AE7
AG6
AH6
AF1
AE1
**Note
Internal VR Strap
Enable
(VccSus1_05 : NC)
Disable
RTXC1
RTCX2
RTCRST*
Y5
INTRUDER*
W4
INTVRMEN
W1
EE_CS
Y1
EE_SHCLK
Y2
EE_DOUT
W3
EE_DIN
V3
LAN_CLK
U3
LAN_RSTSYNC
U5
LAN_RXD0
V4
LAN_RXD1
T5
LAN_RXD2
U7
LAN_TXD0
V6
LAN_TXD1
V7
LAN_TXD2
U1
ACZ_BIT_CLK
R6
ACZ_SYNC
R5
ACZ_RST*
T2
ACZ_SDIN0
T3
ACZ_SDIN1
T1
ACZ_SDIN2
T4
ACZ_SDOUT
SATALED*
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA_CLKN
SATA_CLKP
SATARBIASN
SATARBIASP
DIOR*
DIOW*
DDACK*
IDEIRQ
IORDY
DDREQ
Pull up
Pull down
U618-1
ICH7-M
1 / 5
LAD0
LAD1
LAD2
LAD3
LDRQ0*
LDRQ1*_GPIO23
LFRAME*
A20GATE
A20M*
CPUSLP*
TP1_DPRSTP*
TP2_DPSLP*
FERR*
GPIO49_CPUPWRGD
IGNNE*
INIT3_3V*
INIT*
INTR
RCIN*
SMI*
STPCLK*
THERMTRIP*
DD10
DD11
DD12
DD13
DD14
DD15
DCS1*
DCS3*
NMI
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DA0
DA1
DA2
AA6
AB5
AC4
Y6
AC3
AA5
AB3
AE22
AH28
AG27
AF24
AH25
AG26
AG24
AG22
AG21
AF22
AF25
AG23
AH24
AF23
AH22
AF26
AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
AH17
AE17
AF17
AE16
AD16
D
24-A3
38-D2
37-C3
38-D2
24-A3
55-A1
10-C3
10-C3
10-C3 55-D2
24-C4 55-B2
23-B3 55-B2 37-B3
36-C4 36-D1
55-C2
9-C3
9-B3 55-A3
9-C3 55-A3
9-B3
9-B3 55-A3
9-B3 55-C2
9-B3
LPC3_LAD(0:3)
CHP3_LDRQ0*
CHP3_LDRQ1*
LPC3_LFRAME*
KBC3_A20G
CPU1_A20M*
CPU1_DPRSTP*
CPU1_DPSLP*
CPU1_PWRGDCPU
CPU1_IGNNE*
FWH3_INIT*
CPU1_INIT*
CPU1_INTR
KBC3_CPURST*
CPU1_NMI
CPU1_SMI*
CPU1_STPCLK*
R312
IDE5_D(0:15)
**Note
IDE5_A0
IDE5_A1
IDE5_A2
IDE5_CS1*
IDE5_CS3*
VCCP
R349
56.2
1%
CPU1_FERR*
9-B3 55-A3
VCCP
R313
56.2
1%
24.9
1%
CPU1_THRMTRIP*
10-C3
12-A4
55-C2 14-C4
Place 56 ohm resistor within 2" of ICH7-M
Place PU resistor within 2" of ICH7-M
C
B
24-C3
0
38-A3
1
55-A1
2
3
55-B4 38-D2
55-B4 38-D2
38-B3
24-C3 37-C3
37-B3 55-B2 23-A3
55-B3
0
36-D2 36-B4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
36-C3 55-D2 36-C2
36-C3 55-D2 36-C2
36-C3 55-D2 36-C1
36-C3 55-D2 36-C2
36-C3 55-D2 36-C1
A
LAN DISABLE
KBC3_WKON_LAN
KBC3_WKON_LAN_D
CHP3_WKON_LAN_D
37-C4 55-A2
55-A2 37-C4
21-A? 55-B4
R911
R914
R912
0
0
0
R915
1
3
2
U622
NC7SZ175P6X
CP
VCC
C*
D
GND Q
10K
1%
PRTC_BAT
5
6
4
20-?3
CHP3_RTCRST*
A
3
2
1 4
23-B3
4
0
E18
AD0
1
C18
AD1
2
A16
AD2
3
F18
AD3
4
E16
AD4
5
A18
AD5
6
E17
AD6
7
A17
AD7
8
A15
AD8
9
C14
AD9
10
E14
AD10
11
D14
AD11
12
B12
AD12
13
C13
AD13
14
G15
AD14
15
G13
AD15
16
E12
AD16
17
C11
AD17
18
D11
AD18
19
A11
AD19
20
A10
AD20
21
F11
AD21
22
F10
AD22
23
E9
AD23
24
D9
AD24
25
B9
AD25
26
A8
AD26
27
A6
AD27
28
C7
AD28
29
B6
AD29
30
E6
AD30
31
D6
AD31
A3
PIRQA*
56-C2 23-B3
B4
PIRQB*
56-C2 23-B3
C5
PIRQC*
56-C2 23-B3
B5
PIRQD*
56-C2
AE5
SATA1RXN
AD5
SATA1RXP
AG4
SATA1TXN
AH4
SATA1TXP
AD9
SATA3RXN
AE9
SATA3RXP
AG8
SATA3TXN
AH8
SATA3TXP
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
PCI3_AD(31:0)
D
29-?4
29-B4
39-B4
56-A2
56-B2
56-C2
56-D2
C
PCI3_INTA*
PCI3_INTB*
PCI3_INTC*
PCI3_INTD*
B
SIO3_DET*
Low : SIO model
High : No SIO model
P3.3V_AUX
5
A
PLT3_RST*
14-C4 56-C2
21-B?
21-C?
1
2
3
R910
4 3
+
-
U621
7SZ08
U618-2
ICH7-M
2 / 5
4
0
GPIO22_REQ4*
GPIO48_GNT4*
GPIO1_REQ5*
GPIO17_GNT5*
DEVSEL*
GPIO2_PIRQE*
GPIO3_PIRQF*
GPIO4_PIRQG*
GPIO5_PIRQH*
MCH_SYNC*
P3.3V
R391
10K
1%
56-B2 42-C2
R392
0
BIOS RESET
24-A3
37-C3
24-C4
28-B3
31-A4
32-C2
36-A4
REQ0*
GNT0*
REQ1*
GNT1*
REQ2*
GNT2*
REQ3*
GNT3*
C_BE0*
C_BE1*
C_BE2*
C_BE3*
IRDY*
PAR
PCIRST*
PERR*
PLOCK*
SERR*
STOP*
TRDY*
FRAME*
PLTRST*
PCICLK
PME*
TP3
#5
D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8
B15
C12
D12
C15
A7
E10
B18
A12
C9
E11
B10
F15
F14
F16
C26
A9
B19
F21
G8
F7
F8
G7
AH20
P3.3V
R343
10K
1%
R344
10K
1%
PLT3_RSTF*
23-B3 56-C2 29-?4
56-C2 29-?4
39-C4
23-B3 56-C2
39-C3 56-C2
23-B3 56-C2
23-B3 56-C2
24-C4 55-B4
55-C4 29-A3
24-C4 55-B4
56-C2
39-B4 29-?4
56-C2
29-?4
39-B4
56-C2
39-B4 29-?4
56-C2
29-?4
39-B4
29-?4 39-C3 56-C2 23-B3
39-C3 56-C2 29-?4
39-C4 56-B2 29-?4
29-?4 39-C3 56-C2 23-C3
29-?4 39-C4 56-C2 23-C3
56-C2 23-C3
29-?4 39-C4 56-B2 23-C3
23-C3
29-?4 39-C3 56-B2
29-?4
39-C3 56-B2 23-B3
23-C3 56-C2 39-C3 29-?4
14-C4 56-C2 21-B? 21-??
8-C4 55-C3
23-B3
29-A3 56-C2
29-A3 56-C2 23-B3
29-A3 39-C4 56-C2 23-B3
23-B3
56-C2
14-C4 56-D4
P3.3V
R346
10K
1%
R345
10K
1%
ICH7-m Options
CHP3_SPKR
CHP3_GNT3
AC97_SDOUT
CHP3_GNT(5:4)
PCI3_REQ0*
PCI3_GNT0*
PCI3_REQ1*
PCI3_GNT1*
PCI3_REQ2*
PCI3_REQ3*
CHP3_BIOSWP*
CHP3_1394_ROMW*
CHP3_BIOSTBL*
PCI3_CBE0*
PCI3_CBE1*
PCI3_CBE2*
PCI3_CBE3*
PCI3_IRDY*
PCI3_PAR
PCI3_RST*
PCI3_DEVSEL*
PCI3_PERR*
PCI3_PLOCK*
PCI3_SERR*
PCI3_STOP*
PCI3_TRDY*
PCI3_FRAME*
PLT3_RST*
CLK3_PCLKICH
PCI3_INTE*
PCI3_INTF*
PCI3_INTG*
PCI3_INTH*
MCH3_ICHSYNC*
P3.3V
R917
47K
Function
No Reboot
A16 swap override
Safe Mode
Boot BIOS Option
3
CHP3_SATADET0*
P3.3V_AUX
R337
10K
1%
CPU3_ALERT*
R455
P3.3V
R390
10K
1%
R389
10K
1%
Default
No Stuff
No Stuff
TBD
P3.3V_AUX
R311
10K
1%
P3.3V
P3.3V_AUX
10K
R341
100K
1%
SMB3_CLK
SMB3_DATA
SMB3_LINKALERT*
CHP3_SMLINK0
CHP3_SMLINK1
CHP3_SPKR
CHP3_SUSSTAT*
ITP3_SYSRST*
MCH3_BMBUSY*
SMB3_ALERT*
CHP3_PCISTP*
CHP3_CPUSTP*
CHP3_NUMLED*
CHP3_SCLED*
CHP3_CAPSLED*
PCI3_CLKRUN*
R347
10K
1%
PEX3_WAKE*
CHP3_SERIRQ
12-A2 55-C2
37-B3
VRM3_CPU_PWRGD
CLK3_ICH14
CLK3_USB48
CHP3_SLPS3*
CHP3_SLPS4*
1%
CHP3_SLPS5*
KBC3_PWRGD
CHP3_DPRSLPVR
KBC3_PWRBTN*
PLT3_RST*
KBC3_RSMRST*
BLT_DETECT*
KBC3_RUNSCI*
KBC3_EXTSMI*
CHP3_SATA_DET*
KBC3_WAKESCI*
DCKLAN_RSTF*
CHP3_WKON_LAN_D
CHP3_SATACLKREQ*
56-B2
56-B2
38-B4 39-B2 50-D1
23-C331-C3
55-B2
R454
P3.3V
56-B2 23-D3
55-B4 23-D3
38-B3 38-D2 50-B2 37-A3
55-A1
56-B2 23-D3
55-B4 8-C4
55-B4 42-D1
55-B4 42-C1
29-?4
38-C2 39-C4
29-A3 37-C3 38-B3 23-B3
47-B4 57-B4 37-B3
55-B4 37-A3
55-B2 37-B3
21-?? 21-C? 56-C2 14-C4
55-A2
36-C3 55-B4 36-B4
55-A2 37-B3
55-A2 50-B3
55-B4 8-C1
R282
10K
1%
32-C2 20-?4
50-D1
37-B3
100
23-C3 31-D332-C2 20-?4
23-D3 55-B4
33-A3 55-B4
10-B2 55-B2
14-C4
8-C4
42-C1 55-B4
23-C3
38-A3
56-C2
56-C2
23-C3 37-B3 32-D4 31-D3
38-C2
8-B4 55-C3
8-C4 55-C3
31-A4 55-B4 37-B3
37-A3 37-C1 55-B4
12-D4 37-C4 29-?4 14-C4
14-C4 55-B4 47-C4
12-D4 55-A2 37-C3
42-A2 55-C4
37-C4
37-C4 55-B2
20-?4 55-B4
AF19
AH18
AH19
AE19
C22
B22
A26
38-B4
B25
39-B2
A25
A28
A19
A27
A22
AB18
B23
AC20
AF21
A21
B21
E23
AG18
AC19
U2
F20
AH21
55-B4
AF20
AD22
AC1
B2
C20
B24
D23
F22
AA4
AC22
C21
C23
C19
Y4
1%
AC21
AC18
E21
E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20
R2
P6
P1
P2
P5
2
GPIO21_SATA0GP
GPIO19_SATA1GP
GPIO36_SATA2GP
GPIO37_SATA3GP
SMBCLK
SMBDATA
LINKALERT*
SMLINK0
SMLINK1
RI*
SPKR
SUS_STAT*
SYS_RST*
GPIO0_BM_BUSY*
SMBALERT*_GPIO11
GPIO18_STPPCI*
GPIO20_STPCPU*
GPIO26
GPIO27
GPIO28
GPIO32_CLKRUN*
GPIO33_AZ_DOCK_EN*
GPIO34_AZ_DOCK_RST*
WAKE*
SERIRQ
THRM*
VRMPWRGD
CLK14
CLK48
SUSCLK
SLP_S3*
SLP_S4*
SLP_S5*
PWROK
GPIO16_DPRSLPVR
TP0_BATLOW*
PWRBTN*
LAN_RST*
RSMRST*
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35_SATACLKREQ*
GPIO38
GPIO39
SPI_CLK
SPI_CS*
SPI_ARB
SPI_MISO
SPI_MOSI
2
ICH7-M
3 / 5
U618-3
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
OC0*
OC1*
OC2*
OC3*
OC4*
GPIO29_OC5*
GPIO30_OC6*
GPIO31_OC7*
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBRBIAS*
USBRBIAS
1
AC caps : PCIE need to be within 250mils of the driver
Resistor for Test : Place Stuffing Option to minimize stubs
F26
F25
E28
E27
H26
H25
G28
G27
K26
K25
J28
J27
M26
M25
L28
L27
P26
P25
N28
N27
T25
T24
R28
R27
V26
V25
U28
U27
Y26
Y25
W28
W27
AB26
AB25
AA28
AA27
AD25
AD24
AC28
AC27
AE28
AE27
C25
D25
D3
C4
D5
D4
E5
C3
A2
B3
F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3
D2
D1
14-C1
14-C1
14-C1
14-C1
14-C1
14-C1
14-C1
14-C1
14-C1
14-C1
14-C1
14-C1
14-C1
14-C1
14-C1
14-C1
8-C1
8-C1
R448
22.6
1%
C863 100nF
100nF C862
C865
100nF
C864
C867
100nF
C866
C869
C868
DMI1_RXN0
DMI1_RXP0
DMI1_TXN0
DMI1_TXP0
DMI1_RXN1
DMI1_RXP1
DMI1_TXN1
DMI1_TXP1
DMI1_RXN2
DMI1_RXP2
DMI1_TXN2
DMI1_TXP2
DMI1_RXN3
DMI1_RXP3
DMI1_TXN3
DMI1_TXP3
CLK1_PCIEICH*
CLK1_PCIEICH
42-D2
42-C2
42-C2
42-C2
41-B4
41-B4
41-A4
41-A4
42-B2
42-B2
50-B3
50-B3
42-A4
42-B4
31-D3
31-D3
**Note
USB 0,1 : SYSTEM Right
USB 2,3 : SYSTEM Rear
USB 4 : BLUETOOTH
USB 5 : PORT REPLICATOR
USB 6 : FINGER PRINTER
USB 7 : EXPRESS CARD
10V 100nF
10V
10V 100nF
10V
10V 100nF
10V 100nF
P1.5V_PCIE
USB3_P0USB3_P0+
USB3_P1USB3_P1+
USB3_P2USB3_P2+
USB3_P3USB3_P3+
USB3_P4USB3_P4+
USB3_P5USB3_P5+
USB3_P6USB3_P6+
USB3_P7USB3_P7+
USB
39-D3
39-D3
39-D3
39-D3
32-C4
32-C4
32-C4
32-C4
50-B3
50-B3
50-B3
50-B3
31-C3
31-C3
31-C3
31-C3
1%
24.9
R883
PEX1_LANRXN1
PEX1_LANRXP1
PEX1_LANTXN1
PEX1_LANTXP1
PEX1_MINRXN2
PEX1_MINRXP2
PEX1_MINTXN2
PEX1_MINTXP2
PEX1_DCKRXN3
PEX1_DCKRXP3
PEX1_DCKTXN3
PEX1_DCKTXP3
PEX1_EXPRXN4
PEX1_EXPRXP4
PEX1_EXPTXN4
PEX1_EXPTXP4
P3.3V_AUX
1%
2K
R447
1
D
C
B
A
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
P3.3V_AUX P5V_AUX
D
R909
10
Place caps within 100mils of ICH7-M
near D28, T28, AD28
C
P1.5V
R884
Place 100nF within 100 mils
near pin AG28
R885
B
P3.3V
C398
100nF
Place 100nF within 100 mils
near pin AG9
P3.3V_AUX
Place 100nF within 100 mils
of ICH6-M pin ??
C392
100nF
A
P5V
R913
100
1%
1
D614
3
MMBD301LT1
C388
100nF
Place 100nF near pin F6
P1.5V
B626
BLM18PG181SN1
L605
1uH
2.2
2.2
C283
10nF
Place 100nF within 100 mils
near pin AD2
Place both within 100 mils
near pin C1
P3.3V
1
D615
MMBD301LT1
3
C351
100nF
Place 100nF near pin G10
EC607
330uF
2.5V
AL
C870
10000nF
6.3V
P1.5V
C358
1000nF
P1.5V_PCIE
C313
100nF
C314
100nF
C315
100nF
P3.3V
C385
100nF
P1.5V
C399
100nF
Place 100nF within 100 mils
near pin AG5
C400
100nF
P1.5V
C386
100nF
3
AD17
V5REF_1
G10
V5REF_2
F6
V5REF_SUS
AA22
VCC1_5_B_1
AA23
VCC1_5_B_2
AB22
VCC1_5_B_3
AB23
VCC1_5_B_4
AC23
VCC1_5_B_5
AC24
VCC1_5_B_6
AC25
VCC1_5_B_7
AC26
VCC1_5_B_8
AD26
VCC1_5_B_9
AD27
VCC1_5_B_10
AD28
VCC1_5_B_11
D26
VCC1_5_B_12
D27
VCC1_5_B_13
D28
VCC1_5_B_14
E24
VCC1_5_B_15
E25
VCC1_5_B_16
E26
VCC1_5_B_17
F23
VCC1_5_B_18
F24
VCC1_5_B_19
G22
VCC1_5_B_20
G23
VCC1_5_B_21
H22
VCC1_5_B_22
H23
VCC1_5_B_23
J22
VCC1_5_B_24
J23
VCC1_5_B_25
K22
VCC1_5_B_26
K23
VCC1_5_B_27
L22
VCC1_5_B_28
L23
VCC1_5_B_29
M22
VCC1_5_B_30
M23
VCC1_5_B_31
N22
VCC1_5_B_32
N23
VCC1_5_B_33
P22
VCC1_5_B_34
P23
VCC1_5_B_35
R22
VCC1_5_B_36
R23
VCC1_5_B_37
R24
VCC1_5_B_38
R25
VCC1_5_B_39
R26
VCC1_5_B_40
T22
VCC1_5_B_41
T23
VCC1_5_B_42
T26
VCC1_5_B_43
T27
VCC1_5_B_44
T28
VCC1_5_B_45
U22
VCC1_5_B_46
U23
VCC1_5_B_47
V22
VCC1_5_B_48
V23
VCC1_5_B_49
W22
VCC1_5_B_50
W23
VCC1_5_B_51
Y22
VCC1_5_B_52
Y23
VCC1_5_B_53
A5
VCC3_3_1
AG28
VCCDMIPLL
A1
VCC1_5_A_1
AB10
VCC1_5_A_2
AB17
VCC1_5_A_3
AB7
VCC1_5_A_4
AB8
VCC1_5_A_5
AB9
VCC1_5_A_6
AC10
VCC1_5_A_7
AC17
VCC1_5_A_8
AC6
VCC1_5_A_9
AD2
VCCSATAPLL
AA7
VCC3_3_2
AC7
VCC1_5_A_10
AC8
VCC1_5_A_11
AD10
VCC1_5_A_12
AD6
VCC1_5_A_13
AE10
VCC1_5_A_14
AE6
VCC1_5_A_15
AF10
VCC1_5_A_16
AF5
VCC1_5_A_17
AF6
VCC1_5_A_18
P7
VCCSUS3_3_19
C1
VCCUSBPLL
AA2
VCCSUS1_05_VCCLAN1_05_1
Y7
VCCSUS1_05_VCCLAN1_05_2
ICH7-M
4 / 5
U618-4
VCC1_05_1
VCC1_05_2
VCC1_05_3
VCC1_05_4
VCC1_05_5
VCC1_05_6
VCC1_05_7
VCC1_05_8
VCC1_05_9
VCC1_05_10
VCC1_05_11
VCC1_05_12
VCC1_05_13
VCC1_05_14
VCC1_05_15
VCC1_05_16
VCC1_05_17
VCC1_05_18
VCC1_05_19
VCCSUS3_3_VCCLAN3_3_1
VCCSUS3_3_VCCLAN3_3_2
VCCSUS3_3_VCCLAN3_3_3
VCCSUS3_3_VCCLAN3_3_4
VCC1_05_20
VCCSUS3_3_VCCSUSHDA
VCC3_3_VCCHDA
V_CPU_IO_1
V_CPU_IO_2
V_CPU_IO_3
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCC3_3_8
VCC3_3_9
VCC3_3_10
VCC3_3_11
VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
VCC3_3_19
VCC3_3_20
VCC3_3_21
VCCRTC
VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
VCCSUS3_3_5
VCCSUS3_3_6
VCCSUS3_3_7
VCCSUS3_3_8
VCCSUS3_3_9
VCCSUS3_3_10
VCCSUS3_3_11
VCCSUS3_3_12
VCCSUS3_3_13
VCCSUS3_3_14
VCCSUS3_3_15
VCCSUS3_3_16
VCCSUS3_3_17
VCCSUS3_3_18
VCC1_5_A_19
VCC1_5_A_20
VCC1_5_A_21
VCC1_5_A_22
VCC1_5_A_23
VCC1_5_A_24
VCC1_5_A_25
VCCSUS1_05_1
VCCSUS1_05_2
VCCSUS1_05_3
VCC1_5_A_26
VCC1_5_A_27
VCC1_5_A_28
VCC1_5_A_29
VCC1_5_A_30
2
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
V1
V5
W2
W7
R7
U6
AE23
AE26
AH26
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
AH11
B13
B16
B27
B7
C10
D15
F9
G11
G12
G16
W5
A24
C24
D19
D22
E3
G19
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
AF9
AG5
AG9
AH5
AH9
F17
G17
C28
G20
K7
H6
H7
J6
J7
T7
100nF
P3.3V
VCCP
C357 C354
100nF
C349
100nF
PRTC_BAT
C396
100nF
C353
100nF
C397
100nF
C352
4700nF
10V
C395
100nF
C347
100nF
C391
100nF
C356
100nF
VCCP
C355
1000nF
Place 100nF within 100 mils
near pin ??
P3.3V_AUX
P3.3V
C393
100nF
P3.3V
C384
C350
100nF
100nF
P3.3V_AUX
C390
C312
100nF
100nF
P1.5V
C360
100nF
P1.5V
1
EC606
330uF
2.5V
AL
C394
100nF
Distribute in PCI section
C348
100nF
C387
100nF
C359
100nF
C389
Place both within 100 mils
100nF
near pin ??
Place within 100 mils
of Pin ??
D
C
B
A
4
3
2
1