Samsung KM62256DLRG-5, KM62256DLP-7, KM62256DLP-5L, KM62256DLP-5, KM62256DLG-7L Datasheet
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KM62256D Family CMOS SRAM
Document Title
32Kx8 bit Low Power CMOS Static RAM
Revision History
Revision No
0.0
0.1
1.0
History
Initial draft
First revision
- KM62256DL/DLI ISB1 = 100 → 50µA
KM62256DL-L ISB1 = 20 → 10µA
KM62256DLI-L ISB1 = 50 → 15µA
- CIN = 6 → 8pF, CIO = 8 → 10pF
- KM62256D-4/5/7 Family
tOH = 5 → 10ns
- KM62256DL/DLI IDR = 50→30µA
KM62256DL-L/DLI-L IDR = 30 → 15µA
Finalize
- Remove ICC write value
- Improved operating current
ICC2 = 70 → 60mA
- Improved standby current
KM62256DL/DLI ISB1 = 50 → 30µA
KM62256DL-L ISB1 = 10 → 5µA
KM62256DLI-L ISB1 = 15 → 5µA
- Improved data retention current
KM62256DL/DLI IDR = 30 → 5µA
KM62256DL-L/DLI-L IDR = 15 → 3µA
- Remove 45ns part from commercial product and 100ns part
from industrial product.
Replace test load 100pF to 50pF for 55ns part
Draft Data
May 18, 1997
April 1, 1997
November 11, 1997
Remark
Design target
Preliminily
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
Revision 1.0
November 1997
KM62256D Family CMOS SRAM
32Kx8 bit Low Power CMOS Static RAM
FEATURES
• Process Technology : TFT
• Organization : 32Kx8
• Power Supply Voltage : 4.5~5.5V
• Low Data Retention Voltage : 2V(Min)
• Three state output and TTL Compatible
• Package Type : 28-DIP-600B, 28-SOP-450
28-TSOP1-0813.4 F/R
GENERAL DESCRIPTION
The KM62256D families are fabricated by SAMSUNG′s
advanced CMOS process technology. The families support
various operating temperature ranges and have various
package types for user flexibility of system design. The families also support low data retention voltage for battery backup operation with low data retention current.
PRODUCT FAMILY
Product Family Operating Temperature VCC Range Speed
(ISB1, Max)
KM62256DL
KM62256DL-L 5µA
KM62256DLI
KM62256DLI-L 5µA
1. The parameter is tested with 50pF test load.
PIN DESCRIPTION
A14
1
A12
2
3
A7
4
A6
5
A5
6
A4
28-DIP
7
A3
28-SOP
8
A2
9
A1
10
A0
11
I/O1
12
I/O2
13
I/O3
14
VSS
Pin Name Function Pin Name Function
CS Chip Select Input I/O1~I/O8 Data Inputs/Outputs
OE Output Enable Input Vcc Power
WE Write Enable Input Vss Ground
A0~A14 Address Inputs NC No connect
Commercial (0~70°C)
4.5 to 5.5V
Industrial (-40~85°C) 70ns
1
OE
2
A11
3
A9
4
A8
VCC
28
27
WE
26
A13
25
A8
A9
24
A11
23
22
OE
21
A10
20
CS
19
I/O8
18
I/O7
17
I/O6
16
I/O5
15
I/O4
A13
VCC
A14
A12
A12
A14
VCC
A13
A11
WE
WE
5
6
7
8
9
10
A7
11
A6
12
A5
13
A4
14
A3
14
A3
13
A4
A5
12
A6
11
A7
10
9
8
7
6
5
A8
4
A9
3
2
1
OE
28-TSOP
Type1 - Forward
28-TSOP
Type1 - Reverse
28
27
26
25
24
23
22
21
20
19
18
17
16
15
15
16
17
18
19
20
21
22
23
24
25
26
27
28
551)/70ns
FUNCTIONAL BLOCK DIAGRAM
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
A2
A1
A0
I/O1
I/O2
I/O3
VSS
I/O4
I/O5
I/O6
I/O7
I/O8
CS
A10
CS
WE
OE
I/O1
I/O8
A13
A8
A12
A14
A4
A5
A6
A7
Control
Logic
Power Dissipation
Standby
Operating
(Icc2, Max)
30µA
30µA
Clk gen.
Row
select
Data
cont
Data
cont
28-DIP,28-SOP
28-TSOP1-F/R
60mA
28-SOP
28-TSOP1-F/R
Precharge circuit.
Memory array
256 rows
128×8 columns
I/O Circuit
Column select
A10 A3 A0 A1 A2 A11A9
PKG Type
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
Revision 1.0
November 1997
KM62256D Family CMOS SRAM
PRODUCT LIST
Commercial Temperature Products(0~70°C) Industrial Temperature Products(-40~85°C)
Part Name Function Part Name Function
KM62256DLP-5
KM62256DLP-5L
KM62256DLP-7
KM62256DLP-7L
KM62256DLG-5
KM62256DLG-5L
KM62256DLG-7
KM62256DLG-7L
KM62256DLTG-5
KM62256DLTG-5L
KM62256DLTG-7
KM62256DLTG-7L
KM62256DLRG-5
KM62256DLRG-5L
KM62256DLRG-7
KM62256DLRG-7L
FUNCTIONAL DESCRIPTION
28-DIP, 55ns, L-pwr
28-DIP, 55ns, LL-pwr
28-DIP, 70ns, L-pwr
28-DIP, 70ns, LL-pwr
28-SOP, 50ns, L-pwr
28-SOP, 50ns, LL-pwr
28-SOP, 70ns, L-pwr
28-SOP, 70ns, LL-pwr
28-TSOP1 F, 55ns, L-pwr
28-TSOP1 F, 55ns, LL-pwr
28-TSOP1 F, 70ns, L-pwr
28-TSOP1 F, 70ns, LL-pwr
28-TSOP1 R, 55ns, L-pwr
28-TSOP1 R, 55ns, LL-pwr
28-TSOP1 R, 70ns, L-pwr
28-TSOP1 R, 70ns, LL-pwr
KM62256DLGI-7
KM62256DLGI-7L
KM62256DLTGI-7
KM62256DLTGI-7L
KM62256DLRGI-7
KM62256DLRGI-7L
28-SOP, 70ns, L-pwr
28-SOP, 70ns, LL-pwr
28-TSOP1 F, 70ns, L-pwr
28-TSOP1 F, 70ns, LL-pwr
28-TSOP1 R, 70ns, L-pwr
28-TSOP1 R, 70ns, LL-pwr
CS OE WE I/O Mode Power
H
L H H High-Z Output Disabled Active
L L H Dout Read Active
L
1. X means don′t care (Must be in high or low states)
1)
X
1)
X
ABSOLUTE MAXIMUM RATINGS
Item Symbol Ratings Unit Remark
Voltage on any pin relative to Vss VIN,VOUT -0.5 to 7.0 V Voltage on Vcc supply relative to Vss VCC -0.5 to 7.0 V Power Dissipation PD 1.0 W Storage temperature TSTG -65 to 150 °C -
Operating Temperature TA
Soldering temperature and time TSOLDER 260°C, 10sec (Lead Only) - -
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
1)
X
L Din Write Active
1)
High-Z Deselected Standby
0 to 70 °C KM62256DL
-40 to 85 °C KM62256DLI
Revision 1.0
November 1997
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