Samsung Dresden-INT Schematics
http://mycomp.su/x/
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
DRESDEN-INT
CPU :
Chip Set :
Remarks :
C
Model Name :
PBA Name :
PCB Code :
Dev. Step :
Revision :
T.R. Date :
DRAW
PCB Thinckness:1.1mm
AMD GRIFFIN
AMD RS780MN + SB700
AMD PUMA Platform w/ IGP
2 SODIMMs DDR2
DRESDEN-INT
MAIN
BA41-01024A (GCE)
BA41-01025A (NY)
BA41-01026A (HST)
MP(PR)
1.00
2008.12.24
CHECK
- -
-
APPROVAL
3
2
1
Table of Contents
Page.
Page.
Page. POWER SEQUENCE
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page. 37
Page.
Page.
Page.
Page. LEDS & TOUCHPAD
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
1
2
3Page.
4
5
6
7
8~9
10
11
12~14
15~17
18~20
21~24
25
26
27
28
29
30
31
32
33~36
38
39
40
41
42
43
44
45
46
47
48
49
50
51Page.
52
53
54~55
56Page.
COVER
OPERATION BLOCK DIAGRAM
POWER DIAGRAM
DIAGRAM
TIMING DIAGRAM,POWER ON
CLOCK DISTRIBUTION
BOARD INFORMATION
BLOCKS
CLOCK GEN.
THERMAL SENSOR&FAN CONTROL
S1g2 CPU
RS780MN
SODIMM DDR2
SB700
HW STRAP
SPI ROM (BIOS)
HDMI REPEATER
LVDS (LCD CONNECTOR)
CRT CONNECTOR
EXPRESS CARD
MEMORY CARD (2 IN 1)
WLAN
HD AUDIO (MIC / SPK / HP)
HDD / ODD
MICOM
LOM(88E8057)
CAMERA, MDC CONN. & BLUETOOTH
SUB, DEBUG & KEYBOARD CONN.
CHARGER
P3.3V_AUX / P5.0V_AUX / P12V_ALW
CS POWER(P1.2V / VCC_NB)
CS POWER(P2.5V,P1.5V,P1.1V,P1.2V_AUX)
DDR2 POWER
CPU VRM
SWITCHED POWER (5.0V, 3.3V, 1.8V)
POWER DISCHARGER
EMC
MOUNT HOLE & ICT
TP PAGE
SUB BOARD
INDEX PAGE
DD
C
BB
4
3
AA
DRAW
CHECK
HS LEE / BM LEE
APPROVAL
MODULE CODE
2
HS CHO
YB CHUN
DATE
DEV. STEP
REV
LAST EDIT
11/26/2007
MP(PR)
TITLE
1.00
DRESDEN-INT
COVER
CONTENTS
December 24, 2008 14:36:53 PM
1
SRP Sheet Number: 1 of 55
SAMSUNG
PART NO.
1 49
PAGE
ELECTRONICS
BA41-01024~6A
OF
http://mycomp.su/x/
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
OPERATION BLOCK DIAGRAM
1
D
C
B
A
Charging
Circuit
SPEAKER
PG 34
Smart
Battery
Module
PG 36
JACK
Internal MIC
L
R
RTC
Batt.
CPU VR
CPU_CORE0/1
CPU_VDD_NB
PG 29
TFT_LCD
14.1" WIDE
1280 X 800
PG 28
PG 55
EXTERNAL MIC
HEADPHONE
PG 35
Audio AMP
TPA6017A2
PG 34
2P
PG 21
SATA
4
AMD PN!
PG 48PG 43 PG 43
CRT
HDMI
SUB BOARD
PG 54,55
CHIPSET
VR
PG 45/46
AUDIO CODEC
ALC272
PG 33
CABLE
2.5inch
SATA only
AUX PWR
VR
PG 44
RJ11
HDD
SODIMM0
MAX 2 GB
SODIMM1
MAX 2 GB
WLAN
802.11abg
EXPRESS CARD
INSERT
THIS SIDE UP
34mm
PG 30
USB (Right)
DATE
11/26/2007
DEV. STEPCHECK
REV
LAST EDIT
PG 18
PG 19
LANTransformer
PG 32
SD / MMC
USB PORT 6 USB PORT 8 USB PORT 5
TITLE
MP(PR)
1.00
SPI
PG 26
Channel A (Reverse)
Dual channel
Channel B (Reverse)
Clock Gen.
CK for AMD CPU
USB2.0
PS/2
SYNAPTICS
TOUCHPAD
PG 41
PG 10
PCI-E x1 Lane2
2
DDR II 800
PCI-E X1 Lane0
PCI-E x1 Lane1
USB PORT 4
USB PORT 10
USB PORT 0
USB PORT 2
DRAW
APPROVAL
MODULE CODE
LOM
GbE
Marvell
88E8057
PG 39
EXPRESS CARD
ALCOR
AU6371B51
PG 31
USB (UP)
USB (Down)
SUB BOARD
PG 54,55
HS CHO
HS LEE / BM LEE
YB CHUN
Switched
PWR
PG 49
HDMI
Repeater
PG 27
FAN
PG 11
CPU
Thermistor
EMC2012
PG 11
CRT
LCD
HDMI
Mobile Processor
AMD Griffin CPU
(S1g2 socket)
PG 12~14
North Bridge
RS780MN
PG 15~17
HD0
636pin
L2 Cache : 2M/1M/512K
HyperTransport Gen3
528 FCBGA
PCI Express x4
(A-LINK GEN2)
South Bridge
12P
Samsung
Samsung
PG 40
HD1
SATA1
SATA0
3.3V LPC, 33MHz
KBC
Confidential
Confidential
80 Port
PG 14
POWER BUTTON
3 1
H8S - 2110B
LID SWITCH
PG 38
SB700
528 BGA
PG 21~25
Space bar
KEYBOARD
PG 42
SPI EEPROM
MX25L1605AODD
Termination
PG 39
WEB CAMERA
DRESDEN-INT
MAIN
BLOCK DIAGRAM
December 24, 2008 14:36:53 PM
PG 20
DDR II Power
MultiMedia Crad
2in1 SOCKET
PG 40
PG 47
RJ45
PG 39
PG 31
ANT
BLUETOOTH
PG 40
SAMSUNG
ELECTRONICS
PART NO.
BA41-01024~6A
PAGE
SRP Sheet Number: 2 of 55
OF
D
C
B
A
492
http://mycomp.su/x/
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
3
POWER DIAGRAM
24
1
D
ALWAYS ON
KBC3_SUSPWR
KBC3_PWRON
KBC3_VRON /
D
VCCP3_PWRGD
P5.0V_AUX
DDR2 Power VRM
VRMs
AC Adapter
19V
Battery DC
11.1V
C
RTC Battery
3V
SB700
B
VDC
P12.0V_ALW
SWITCHED POWER
VRMs
P3.3V_MICOM
MICOM
P5.0V_ALW
USB Ports
P3.3V_AUX
SB700
MDC
MINICARD
LOM
THERMAL
EXPCARD
P1.8V_AUX
SODIMM (DDR II)
CPU
Samsung
Samsung
P5.0V
CAMERA
ICH9M
TOUCHPAD
CRT
FAN
MICOM
HDD
P3.3V
THERMAL SENSOR
RX781
SB700 MEMORY CARD
BLUETOOTH
LAN
LEDs
GFX
CLOCK
LCD/CRT
SODIMM
EXP-CARD
HDD
MICOM
SPI AUDIO
P1.2V_AUX
SB700
P0.9V
DDR II-Termination
CPU
P1.8V
RX781
GDDR3
GFX
EGFX_CORE
NB9M
VDD_CPU_NB
CPU
P1.2V
CPU
RX781
SB700
Rail
+V*Always +V*AUX
State
ON ON
Full On
S3
ON
S4 ON
S5 OFF
ON
ON
ON
OFF
+V
OFF
OFF
OFF
SUSPWR
H
H
H
L
PWRON
H
L
L
L
C
VRON
H
L
L
L
B
Confidential
Confidential
S5 / S4
A
4
S3
RX781
GFX
P1.1V
S0
CPU_CORE
CPU
A
DRAW
CHECK
HS LEE / BM LEE
APPROVAL
MODULE CODE
2
HS CHO
YB CHUN
DATE
DEV. STEP
REV
LAST EDIT
11/26/2007
MP(PR)
TITLE
1.00
DRESDEN-INT
MAIN
POWER DIAGRAM
December 24, 2008 14:36:53 PM
13
SRP Sheet Number: 3 of 55
SAMSUNG
PART NO.
3 49
PAGE
ELECTRONICS
BA41-01024~6A
OF
http://mycomp.su/x/
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
POWER SEQUENCE
2
Rev. 0.1
1
D
2) VDC
POWER S/W
C
7.3) AUX5_PWRGD
B
ALWAYS
POWER
P5V_AUX & P3V_AUX
TPS51120
P1.2V_AUX
MIC5291
DDR2 POWER
SC486
EGFX_CORE
SC471
3) P12.0V_ALWS
3) P5.0V_ALWS
3) P3.3V_MICOM
RST Circuit
5) KBC3_CHKPWRSW#
6) KBC3_SUSPWR
11) KBC3_PWRON
13) VCCP_PWRGD
7.1) P3.3V_AUX
7.1) P5V_AUX
7.2) P1.2V_AUX
8) P1.8V_AUX
12.2) P0.9V
12.3) EGFX_CORE
PRTC
SB700
22) PLT3_RST#
INTVRMEN
EN
LAN100_SLP
EN
RTCRST#
CK_PWRGD
CPUPWRGD
CL_RST#
PLTRST#SUS_STAT#
PCIRST#
PRTC
17) CHP3_CLK_PWRGD 18) Clock Running
20) CPU1_PWRGDCPU
4) KBC3_RST#
RES#
10ms Delay
110ms Delay
MICOM
Samsung
Samsung
9) KBC3_RSMRST*
19) KBC3_PWRGD
14) KBC3_VRON(NC)
16) VRM3_CPU_PWRGD
IMVP6
ISL6266
7) P3.3V_AUX
7) P5V_AUX
10.1/2) CHP3_SLPS5#/S4#
10.3) CHP3_SLPS3#
15) CPU_CORE
7) P1.05V_AUX
7) P1.5V_AUX
7) P1.5V_CL
7) P1.05V_CL
7) P1.05V_LAN
RSMRST#
SLP_M#
SLP_S3#
SLP_S4#
S4_STATE#
SLP_S5#
VRMPWRGD
PWROK
CLPWROK
1) CHP3_RTCRST#
15) VCC_CORE
21) CHP3_CL_RST0#
RTC
Battery
CLOCK
CK505
PWRGOOD
CPU
RESET#
23) CPU1_CPURST#
CPURST#
PWROK
CLPWROK
CL_RST#
RSTIN#
GMCH
Discrete
GFX.
D
C
B
P1.5V
SC486
Switched
Power
A
12.4) P1.5V
12.1) P5.0V
12.2) P3.3V
12.5) P1.8V
Confidential
Confidential
3
A
DRAW
CHECK
HS LEE / BM LEE
APPROVAL
MODULE CODE
2
HS CHO
YB CHUN
DATE
DEV. STEP
REV
LAST EDIT
11/26/2007
MP(PR)
TITLE
1.00
DRESDEN-INT
MAIN
POWER SEQUENCE
December 24, 2008 14:36:53 PM
14
SRP Sheet Number: 4 of 55
SAMSUNG
PART NO.
PAGE
ELECTRONICS
BA41-01024~6A
OF
494
http://mycomp.su/x/
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
Timing Diagram, Power ON
2
Rev. 0.1 Phil 2008-04-15
1
S5 S3
D
VDC
P12.0V_ALW
P5.0V_ALW
P3.3V_MICOM
KBC3_RST#
KBC3_CHKPWRSW#
KBC3_SUSPWRON
P5.0V_AUX
P3.3V_AUX
P1.8V_AUX
SUSPWRGD
KBC3_RSMRST#
C
B
A
4
CHP3_SLPS5#
CHP3_SLPS4#
CHP3_SLPS3#
KBC3_PWRON
P5.0V
P3.3V
EGFX_CORE
P1.8V
P1.5V
P1.1V
P1.05V
VCCP_PWRGD
CPU_CORE
VRM3_CPU_PWRGD
CHP3_CLK_PWRGD
Samsung
Samsung
KBC3_PWRGD
CPU1_CPUPWRGD
CHP3_CL_RST0#
CHP3_SUSSTAT#
PLT3_RST#
CPU1_CPURST#
SPI Signals
CL0 (MCH-ICH)
DMI
BSEL[2:0]
Confidential
Confidential
CHP3_CPUSTP#
CHP3_PCISTP#
CLK0_HOST_CPU
CLK0_HOST_GMCH
200ms
3
S3
S5 S0S0
100ms
Tr 2ms
Tr 2ms
Tr 300us
~1.6ms
15.26ms
97.85ms
30.5us
61us
3.6ms
Tr 37us
Tr 48us
Tr 86us
Valid
Tr 913us
Tr 210us
Tr 985us
Tr 1.1ms
170us
Tr 372us
D
C
170us
300ns
0 ~ 1ms
117.5ms
1.038ms
139.8us
61us
1.182ms
>=1ms
>= 1ms
soft strap read
MCH soft straps
CPU_RST_DONE/ACK
Toggling (Valid)
Toggling (Valid)
Toggling (Valid)
2
BIOS Boot
BIOS Boot
DRAW
CHECK DEV. STEP
HS LEE / BM LEE
APPROVAL
MODULE CODE
HS CHO
YB CHUN
DATE
REV
LAST EDIT
11/26/2007
MP(PR)
TITLE
1.00
DRESDEN-INT
MAIN
TIMING DIAGRAM
December 24, 2008 14:36:53 PM
1
SAMSUNG
ELECTRONICS
PART NO.
BA41-01024~6A
5 49
PAGE OF
SRP Sheet Number: 5 of 55
B
A
http://mycomp.su/x/
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
CLOCK DISTRIBUTION
2
Rev. 0.1
1
D
CHP3_CLK_PWRGD
BSEL(2:0)
CK505
266 MHz
CLK0_HCLK0 / HCLK0#
PENRYN
CPU
BSEL
D
FSB
CPU_STP#
C
SEL_LCDCLK#
PCI_STP#
B
ITP_EN
Main PLL
SSC
48/96MHz
NO SSC
100MHz
/33MHz
SSC
266 MHz
100 MHz CLK1_MCH3GPLL / 3GPLL#
100 MHz
100 MHz
100 MHz
48 MHz
14.318 MHz
33 MHz
Samsung
Samsung
100 MHz
100 MHz
100 MHz
CLK0_HCLK1 / HCK1#
MCH3_CLKREQ#
CLK1_27M
CLK1_27M_SS
CLK1_PEG / PEG#
CLK1_PCIEICH / ICH#
CHP3_SATACLKREQ#
CLK1_SATA / SATA#
CLK3_USB48
CLK3_ICH14
CLK3_PCLKICH
MIN3_CLKREQ#
CLK1_MINIPCIE / MINIPCIE#
EXP3_CLKREQ#
CLK1_EXPCARD / EXPCARD#
LOM3_CLKREQ#
CLK1_PCIELOM / PCIELOM#
NB9M
X16 PEG
HPLL
MPLL
PM45
3GPLL
Cantiga
MCH
X4 DMI
PCIEPLL
SATAPLL
USBPLL
ICH9-M
32.768 KHz
OSC
MINI CARD (WLAN)
EXPRESS CARD
LOM
25 MHz
2801-004668
333/400 MHz
333/400 MHz
333/400 MHz
333/400 MHz
RTC Clock
32.768 KHz
2801-000111
CLK1_MCLK0/0#
CLK1_MCLK1/1#
CLK1_MCLK2/2#
CLK1_MCLK3/3#
HDA3_MDC_BCLK
HDA3_AUD_BCLK
HDA3_HDMI_BCLK
SPI3_CLK
17.86 / 31.25 MHz
HD 24 MHz
667/800 MHz
SODIMM A
SODIMM B
C
MDC
HD Audio
NB9M
SPI
B
Confidential
Confidential
33 MHz CLK3_PCLKMICOM
A
14.318 MHz
2801-004667
4
14 MHz
OSC
48 MHz
33 MHz
CLK3_FM48
CLK3_DBGLPC
3
MICOM
AU6371
DEBUG PORT
10 MHz
2801-004665
12 MHz
2801-004666
A
DRAW
CHECK
HS LEE / BM LEE
APPROVAL
MODULE CODE
2
HS CHO
YB CHUN
DATE
DEV. STEP
REV
LAST EDIT
11/26/2007
MP(PR)
TITLE
1.00
DRESDEN-INT
MAIN
CLOCK DISTRIBUTION
December 24, 2008 14:36:53 PM
1
SRP Sheet Number: 6 of 55
SAMSUNG
ELECTRONICS
PART NO.
BA41-01024~6A
6 49
OFPAGE
http://mycomp.su/x/
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
BOARD INFORMATION
2
1
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
D
PCI Devices
Devices
-
IDSEL#
-
REQ/GNT#
-
Interrupts
-
Voltage Rails
VDC
VCC_CORE
P1.05V
P1.8V_AUX
P0.9V
C
B
P1.8V
P1.1V
P1.5V
P3.3V
P5.0V
P3.3V_AUX
P5V_AUX
PRTC_BAT
P3.3V_MICOM
P5.0V_ALW
P12.0V_ALW
2
I C / SMB Address
Devices
ICH
SODIMM0
SODIMM1
CK-505 (Clock Generator)
MICOM
BATTERY
EMC2102(Thermal Sensor)
Primary DC system power supply (7 to 21V)
Core voltage for Processor (1.308~1.068V)
Processor System Bus(PSB) Termination (1.05V)
GMCH & ICH8 Core Voltage
1.8V power rail for DDR2 (off in S4-S5)
0.9V switched power rail (off in S3-S5)
1.8V power rail for GDDR3 (off in S3-S5)
1.1V power rail for GFX (off in S3-S5)
1.5V power rail for ICH (off in S3-S5)
3.3V switched power rail (off in S3-S5)
5.0V switched power rail (off in S3-S5)
3.3V power rail (off in S4-S5)
5.0V power rail (off in S4-S5)
3.0V power rail (ALWAYS ON)
3.3V always on power rail for MICOM
5V power rail (Always On)
12V power rail (Always On)
Address
Master
1010 000X
1010 010X
1101 001x
Master
0001 011X
0111 101X
Hex
A0h
A4h
D2h
16h
7Ah
Bus
SMBUS Master
-
Clock, Unused Clock Output Disable
Samsung
Samsung
SMBUS Master
Thermal Sensor
USB PORT Assign
PORT NUMBER
0
1
4
5
6
8
9
10
ASSIGNED TO
SYSTEM PORT A
SYSTEM PORT B
EXPRESS CARD
BLUETOOTH
SYSTEM PORT C
CAMERA
MINIPCI-E (WLAN)
MEMORY CARD
Confidential
Confidential
System Power States
A
CHP3_SLPS1* S1, Powered-On-Suspend(POS) : In this state, all clocks(except the 32.768KHz clock) are stopped.
CHP3_SLPS3* S3, Suspend-To-RAM(STR) : The system context is maintained in system DRAM, but power is shut off to non-critical circuits.
CHP3_SLP4S* S4, Suspend-To-Disk(STD) : The Context of the system is maintained on the disk. All power is then shut off to the system except for the logic required to resume.
CHP3_SLPS5* S5, Soft Off(SOFF) : System context is not maintained. All power is shut off except for the logic required to restart. A full boot is required when waking.
The system context is maintained in system DRAM. Power is maintained to PCI, the CPU, memory controller, memory, and all other criticial subsystems.
Note that this state does not preclude power being removed from non-essential devices, such as disk drives. During this state, CPU can be selected
for either Deep Sleep or Deeper Sleep.
In Deeper Sleep, CPU voltage reduced in this state to reduce the leakage power.
Memory is retained, and refreshes continue. All clocks stop except RTC clock.
Externally appears same as S5, but may have different wake events.
4
3
Crystal / Oscillator
TYPE
Crystal
Crystal
Crystal
Crystal
Crystal
FREQUENCY
32.768KHz
10MHz
14.318MHz
12MHz
25MHz
CPU Core Voltage Table
Active Mode
VID(6:0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1 0
0
0
0
1
0
0
0
1
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
1
0
0
0
1
0
0
0
1
0
1
0
0
1
0
1
0
1
0
0
1
0
1
0
1
0
0
1
1
0
1
0
0
1
1
0
0
1
0
1
0
1
0
0
0
0
1
0
0
0
1
0
1
0
0
0
1
0
0
0
1
0
0
1
0
0
0
0
1
0
0
1
0
1
0
0
DPRSLPVR
DPRSTP*
PSI2*
2
Voltage
0
0
1.5000 V
0
0
0
1
1.4875 V
1
1.4750 V
0
0
0
1
1.4625 V
1
1.4500 V
0
0
1
0
1
1.4375 V
1
1
0
1
1.4250 V
1
1
1
1
1
1.4125 V
1.4000 V
0
0
0
1
1.3875 V
0
0
1.3750 V
1
0
0
1.3625 V
1
1
1
0
1.3500 V
0
0
1
1.3375 V
1
1.3250 V
1
0
1
1
1
1.3125 V
1
1.3000 V
0
0
0
0
1
1.2875 V
0
1.2750 V
1
0
0
0
1
1.2625 V
1
0
1
1.2500 V
0
0
1.2375 V
1
1
1
1.2250 V
0
1
1
1
1
1.2125 V
1
1
0
0
0
1.2000 V
0
1
1.1875 V
0
1
1.1750 V
0
0
0
1
1.1625 V
1
1.1500 V
1
0
0
1
1.1375 V
0
1
1.1250 V
1
1
0
1
1.1125 V
1
1
0
1.1000 V
0
0
0
0
1
1.0875 V
0
1
0
1.0750 V
0
1
1 1
1.0625 V
0
0
1.0500 V
1
1
0
1.0375 V
1
1
0
1.0250 V
1
1
1
1
1
1.0125 V
Active
0
1
0 or 1
DRAW
CHECK
APPROVAL
MODULE CODE
VID(6:0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DPRSLPVR
DPRSTP*
PSI2*
HS CHO
HS LEE / BM LEE
YB CHUN
DEVICE
ICH
MICOM
CLOCK-GENERATOR
MEMORY CARD
LAN
IMVP-6
Active/Deeper Sleep
Dual Mode Region
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
0
0
1
0
1
0
0
1
1
0
0
1
1
1
0
0
1
0
1
1
1
1
1
0
1
0
0
1
0
0
0
1
0
1
1
0
1
1
0
0
1
0
1
0
1
1
0
0
1
1
1
0
1
0
1
1
1
0
1
0
1
1
0
0
1
1
0
1
1
0
1
1
1
1
0
1
1
1
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
1
0
1
0
1
1
0
0
0
1
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
11
0
0
1
0
1
1
1
0
1
1
1
1
0
1
1
0
0
0
0
1
0
Deeper Slp
1
0
0 or 1
DATE
11/26/2007
DEV. STEP
MP(PR)
REV
1.00
LAST EDIT
Voltage
0
1.0000 V
0.9875 V
1
0.9750 V
0
0.9625 V
1
0.9500 V
0
1
0.9375 V
0
0.9250 V
1
0.9125 V
1
0
0.9000 V
1
0.8875 V
0.8750 V
0
0.8625 V
1
0.8500 V
0
0.8375 V
1
0
0.8250 V
1
0.8125 V
0
0.8000 V
0.7875 V
1
0
0.7750 V
1
0.7625 V
0
0.7500 V
1
0.7375 V
0
0.7250 V
1
0.7125 V
1
0.7000 V
0
1
0.6875 V
0.6750 V
0
0.6625 V
1
0.6500 V
0
0.6375 V
1
0.6250 V
0
1
0.6125 V
0
0.6000 V
1
0.5875 V
0
0.5750 V
0.5500 V
0
0.5375 V
1
0
0.5250 V
1
0.5125 V
0
0.5000 V
TITLE
USAGE
Real Time Clock
H8S/2110BV
ICS951461
MEMORY CARD
LAN
Deeper Sleep/Extended Deeper Sleep
Dual Mode Region
VID(6:0)
1
1
1
10
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
*"1111111" : 0V power good asserted.
1
0
0
1
1
0
1
0
0
1
01
1
0
1
1
0
1
0
0
1
0
1
0
1
0
1
0
1
1
0
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
0
1
0
111
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
0
1
1
0
0
1
1
0
0
1
0
10
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
0
1
0
1
1
0
0
1
0
1
1
0
1
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
00.5625 V
1
0
1
0
1
0
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
DRESDEN-INT
MAIN
BOARD INFORMATION
December 24, 2008 14:36:53 PM
1
Voltage
1 0.4875 V
0
0
1
0.4750 V
1
1
0.4625 V
0.4500 V
0
0
1
0.4375 V
0
1
0.4250 V
0
0.4125 V
1
0
0
0
0.4000 V
0.3875 V
1
0
0
0.3750 V
1
0.3625 V
1
1
0
0.3500 V
0
0
0.3375 V
1
1
0.3250 V
0
1
0.3125 V
1
0.3000 V
0
0
0
0.2875 V
1
1
0
0.2750 V
0.2625 V
1
1
0.2500 V
0
0
0
0.2375 V
1
1
0.2250 V
0
0.2125 V
1
1
0
0
0.2000 V1
1
0.1875 V
0
1
0
1
0.1750 V1
0.1625 V
1
1
0.1500 V
0
01
1
0
0.1375 V
1
0.1250 V
0
1
1
0.1125 V
0
0.1000 V
0
0
1
0.0875 V
0.0750 V
0
1
0.0625 V
1
1
0.0500 V
0
0
0.0375 V
1
0
1
0
0.0250 V
1
0.0125 V
1
1
0
0.0000 V
0
1
0.0000 V
0
1
0.0000 V
0
1
0.0000 V
1
0.0000 V
0
0
1
0
0.0000 V
0.0000 V
1
0
1
0.0000 V
1
SAMSUNG
ELECTRONICS
PART NO.
BA41-01024~6A
7 49
PAGE
OF
SRP Sheet Number: 7 of 55
D
C
B
A
http://mycomp.su/x/
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
1
D
C
Samsung
B
Samsung
D
C
B
Confidential
Confidential
A
4
3
A
11/26/2007
MP(PR)
TITLE
1.00
DRESDEN-INT
MAIN
BLOCKS (1/2)
December 24, 2008 14:36:53 PM
1
SRP Sheet Number: 8 of 55
SAMSUNG
PART NO.
PAGE
ELECTRONICS
BA41-01024~6A
OF
498
DATEDRAW
CHECK
APPROVAL
MODULE CODE
2
HS CHO
HS LEE / BM LEE
YB CHUN
DEV. STEP
REV
LAST EDIT
http://mycomp.su/x/
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
1
D
MCD3_SDDATA2
MCD3_SDDATA3
MCD3_SDWP
USB3_P10+
MCD3_SDDATA0
MCD3_SDDATA1
MCD3_SDWP
MCD3_SDDATA0
MCD3_SDDATA1
MCD3_SDDATA2
MCD3_SDDATA3
SMB3_DATA
USB3_P4+
USB3_P4-
USB3_P4-
USB3_P4+
SMB3_DATA
EXP3_CLKREQ#
PEX1_EXPCARDRXN1
PEX1_EXPCARDRXP1
PEX3_WAKE#
USB3_P10-
USB3_P10-
USB3_P10+
EXP3_CLKREQ#
PEX1_EXPCARDRXN1
PEX1_EXPCARDRXP1
PEX3_WAKE#
MCD3_SDCD#
MCD3_SDCLK
MCD3_SDCMD
CRT5_DDCCLK
CRT5_DDCDATA
CLK3_FM48
PLT3_RST#
CRT5_DDCCLK
CRT3_BLUE
CRT3_DDCCLK
CRT3_DDCDATA
CRT3_GREEN
CRT3_HSYNC
CRT3_RED
CRT3_VSYNC
C C
CRT5_DDCDATA
CRT3_BLUE
CRT3_DDCCLK
CRT3_DDCDATA
CRT3_GREEN
CRT3_HSYNC
CRT3_RED
CRT3_VSYNC
Graphics_IF_CRT
CHP3_SLPS3#
CLK1_EXPCARD
CLK1_EXPCARD#
PEX1_EXPCARDTXN1
PEX1_EXPCARDTXP1
PEX3_RST#
MCD3_SDCLK
MCD3_SDCD#
MCD3_SDCMD
CLK3_FM48
PLT3_RST#
Multi_MV_Au6371
EXP3_CPPE#
EXP3_CPUSB#
EXP3_PERST#
SMB3_CLK
SMB3_CLK
EXP3_CPPE#
EXP3_PERST#
EXP3_CPUSB#
CHP3_SLPS3#
CLK1_EXPCARD
CLK1_EXPCARD#
PEX1_EXPCARDTXN1
PEX1_EXPCARDTXP1
PEX3_RST#
Express_Card
LCD3_BKLTON
LCD3_EDID_DATA
B B
LCD3_BKLTON
LCD3_EDID_DATA
KBC3_BKLTON
LCD1_ACLK
LCD1_ACLK#
LCD1_ADATA0
LCD1_ADATA0#
LCD1_ADATA1
LCD1_ADATA1#
LCD1_ADATA2
LCD1_ADATA2#
LCD3_BRIT
LCD3_EDID_CLK
PEG3_BKLTEN
PEG3_LCDVDDON
KBC3_BKLTON
LCD1_ACLK
LCD1_ACLK#
LCD1_ADATA0
LCD1_ADATA0#
LCD1_ADATA1
LCD1_ADATA1#
LCD1_ADATA2
LCD1_ADATA2#
LCD3_BRIT
LCD3_EDID_CLK
PEG3_BKLTEN
PEG3_LCDVDDON
Samsung
Samsung
CLK1_MINIPCIE
CLK1_MINIPCIE#
KBC3_RFOFF#
PEX1_MINITXN0
PEX1_MINITXP0
PEX3_RST#
CLK1_MINIPCIE
CLK1_MINIPCIE#
KBC3_RFOFF#
PEX1_MINITXN0
PEX1_MINITXP0
PEX3_RST#
MIN3_CLKREQ#
PEX1_MINIRXN0
PEX1_MINIRXP0
PEX3_WAKE#
WLON_LED#
MIN3_CLKREQ#
PEX1_MINIRXN0
PEX1_MINIRXP0
PEX3_WAKE#
WLON_LED#
PCIE_Minicard_Slot
CHP3_BIOSWP#
SPI3_CS0#
SPI3_MOSI
SPI3_MISO
Confidential
Confidential
SPI3_CLK
CHP3_BIOSWP#
SPI3_CLK
SPI3_CS0#
SPI3_MOSI
SPI3_MISO
SPI_BIOS_ROM_16Mbit
LCD_IF_14p1
D
A
4
3
A
DRAW
CHECK
HS LEE / BM LEE
APPROVAL
MODULE CODE
2
HS CHO
YB CHUN
DATE
DEV. STEP
REV
LAST EDIT
11/26/2007
MP(PR)
TITLE
1.00
DRESDEN-INT
MAIN
BLOCKS (2/2)
December 24, 2008 14:36:53 PM
1
SAMSUNG
ELECTRONICS
PART NO.
BA41-01024~6A
PAGE OF
499
SRP Sheet Number: 9 of 55
http://mycomp.su/x/
COM-22C-015(1996.6.5) REV. 3
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4 3
Clock Gen.
P3.3V
P1.5V
2
1
10K 1%
R603
B29
BLM18PG181SN1
nostuff
U509
SLG8SP628VTR
56
VDD_REF
60
VSS_REF
17
VDD_SRC_IO_1
11
VDD_SRC_IO_0
47
VDD_CPU_IO
25
VDD_ATIG_IO
34
VDD_SB_SRC_IO
63
VDD_48
26
VDD_ATIG
48
VDD_CPU
4
VDD_DOT
55
VDD_HTT
40
VDD_SATA
35
VDD_SB_SRC
16
VDD_SRC
2
SCL
3
SDA
61
XTAL_IN
62
XTAL_OUT
51
PD#
23
CLKREQ_0#
45
CLKREQ_1#
44
CLKREQ_2#
39
CLKREQ_3#
38
CLKREQ_4#
1
VSS_48M
24
VSS_ATIG
46
VSS_CPU
7
VSS_DOT
52
VSS_HTT
43
VSS_SATA
33
VSS_SB_SRC
18
VSS_SRC_1
10
VSS_SRC_0
1205-003515
This part is 64pin QFN package.
D
10V
10V
100nF
C629
nostuff
nostuff
nostuff
6.3V
10V
100nF
22000nF-X5R
100nF
C609
C626
C623
1%10K
1%10K
10K 1%
R592
R595
R597
0
3
10V
10V
10V
100nF
100nF
100nF
C618
C305
C607
P3.3V
B512
BLM18PG181SN1
C
10V
2200nF
C632
VDD_48
SMB3_CLK
SMB3_DATA
B
C308
0.022nF
50V
CLK REQ
CLK REQ 0
CLK REQ 1
CLK REQ 2
A
CLK REQ 3
CLK REQ 4 -
10V
10V
100nF
2200nF
C601
C304
VDD_REF
R227
1
2801-004667
Y1
14.31818MHz
Place 14.318MHz within
500mils of CLOCK GEN.
DEVICE
LOM3_CLKREQ#
MIN3_CLKREQ#
EXP3_CLKREQ#
10V
10V
10V
100nF
100nF
C307
C608
1M
1%
2
C309
0.022nF
50V
10V
100nF
C624
nostuff
SB Link
LOM
MINI CARD
EXP CARD
SB_SRC
10V
10V
100nF
100nF
100nF
C630
C628
C297
nostuff
CLK3_PWRGD#
Confidential
Confidential
SRC PORT
R604
Samsung
Samsung
LOM3_CLKREQ#
MIN3_CLKREQ#
4
B513
BLM18PG181SN1
CPU_K8_0
CPU_K8_0#
ATIGCLK_1
ATIGCLK_1#
ATIGCLK_0
ATIGCLK_0#
SB_SRC_1
SB_SRC_1#
SB_SRC_0
SB_SRC_0#
SRC_7_27M_SS
SRC_7#_27M
SRC_6_SATA
SRC_6#_SATA#
SRC_4
SRC_4#
SRC_3
SRC_3#
SRC_2
SRC_2#
SRC_1
SRC_1#
SRC_0
SRC_0#
HTT_0#_66M_1
HTT_0_66M_0
48MHZ_0
REF_0_SEL_HTT66
REF_1_SEL_SATA
REF_2_SEL_27
THERMAL
nostuff
nostuff
nostuff
D
P3.3V
1%10K
10K 1%
R221
R224
R617
50
49
1%
28
27
30
29
32
31
37
36
6
5
42
41
9
8
13
12
15
14
20
19
22
21
53
54
64
59
58
57
65
1%
10K
10K 1% 1%10K
10K 1%
R222
R618
R223
nostuff
R613
R616
R602
R608
R594
R599
R590
R589
R635
R639
R596
R591
R645
R646
R642
R643
R637
R638
R624
R630
R619
R623
R609
R614
R633
R632
R620
158 ohm, 1608
C816
0.01nF
0.5pF
50V
for EMC Review
PV-16
on 31-Oct-08
DRAW
CHECK
APPROVAL
MODULE CODE
10K
10K
0
0
10K 1%
1%10K
1%10K
10K 1%
10K 1%
10K
1%
1%10K
10K 1%
0
0
0
0
0
0
0
0
0
0
0
0
33
33 1%
150
1%
HS LEE / BM LEE
1%
nostuff
1%
R621
75
1%
90.9 ohm
HS CHO
YB CHUN
2
nostuff
nostuff
nostuff
nostuff
nostuff
nostuff
nostuff
nostuff
nostuff
nostuff
DATE
DEV. STEP
REV
LAST EDIT
CLK0_HCLK0
CLK0_HCLK0#
CLK1_NBGFX
CLK1_NBGFX#
CLK1_SBSRC
CLK1_SBSRC#
CLK1_EXPCARD
CLK1_EXPCARD#
CLK1_MINIPCIE
CLK1_MINIPCIE#
CLK1_PCIELOM
CLK1_PCIELOM#EXP3_CLKREQ#
CLK1_SBLINK
CLK1_SBLINK#
CLK0_HTT#
CLK0_HTT
CLK3_FM48
CLK3_USB48
CLK3_NB14
SEL_HTT66
SEL_SATA
SEL_27M
TITLE
11/26/2007
MP(PR)
1.00
RS780M/RX781M : 1.1V (OSC_14MHz)
1
(Pin 59)
(Pin 58)
(Pin 57)
66MHz 3.3V single HTT clock
100MHz differential clock
0 *
SRC6 diff. clock
1
100MHz spreading diff. clock
0 *
1*
27MHz/27MHz_SS graphics clock
SRC7 diff. clock
0
DRESDEN-INT
MAIN
CLOCK GEN
December 24, 2008 14:36:53 PM
1
SAMSUNG
PART NO.
10 49
PAGE
C
B
A
ELECTRONICS
BA41-01024~6A
OF
SRP Sheet Number: 10 of 55
http://mycomp.su/x/
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
THERMAL SENSOR & FAN CONTROL
1
D
P5.0V
C606
C604
100nF
10000nF
10V
6.3V
C
B
KBC3_PWRGD
FAN5_VDD
FAN3_FDBACK#
CPU3_THRMTRIP#
P3.3V_AUX
R628
200K
R1
1%
R631
R2
51.1K
1%
R634
20K
1%
TRIP_SET pin voltage = (T-75)/21
3.3 * [R2/(R1+R2)] = (T-75)/21
P3.3V_AUX P3.3V
R600
49.9
1%
C610
100nF
10V
R629
nostuff
93 degree C
24
27
14
16
10
25
26
28
13
0
11
15
21
U508
EMC2102
1
VDD_3V
VDD_5V_1
VDD_5V_2
POWER_OK
RESET#
FAN_MODE
FAN_1
FAN_2
TACH
THERMTRIP#
9
SHDN_SEL
TRIP_SET
8
NC_1
NC_2
NC_3
1209-001718
SMBUS Address 7Ah
SMDATA
SYS_SHDN#
CLK_SEL
THRM_PAD
Samsung
Samsung
Confidential
Confidential
SMCLK
ALERT#
DN1
DP1
DN2
DP2
DN3
DP3
CLK_IN
GND
22
23
19
12
2
3
4
5
6
7
17
18
20
29
1%
10K
R605
P3.3V_AUX
1%
1%
10K
10K
R598
R607
C612
0.47nF
50V
C617
2.2nF
50V
CPU1_THRMTRIP#
CPU1_THRMTRIP#
1%
10K
R627
C620
2.2nF
50V
KBC3_THERM_SMDATA
KBC3_THERM_SMCLK
THM3_ALERT#
THM3_STP#
CPU2_THERMDC
CPU2_THERMDA
CHP3_NB_THERMDN
CHP3_NB_THERMDP
2
MMBT3904
1
Q508
3
Opposite side of CPU.
P1.8V
R625
2K
1%
P1.8V
R644
2K
1%
10mil width and 10mil spacing.
P3.3V
FAN5_VDD
FAN3_FDBACK#
3
Q506
1
MMBT3904
2
3
1
Q507
MMBT3904
2
CHP1_THRMTRIP#
P3.3V
R626
10K
1%
nostuff
CPU3_THRMTRIP#
C605
10000nF
6.3V
R593
10K
1%
Line Width = 20 mil
J505
HDR-4P-1R-SMD
1
2
3
4
5
MNT1
6
MNT2
3711-000456
D
C
B
A
4 1
3
A
DRAW
CHECK
HS LEE / BM LEE
APPROVAL
MODULE CODE
2
HS CHO
YB CHUN
DATE
DEV. STEP
REV
LAST EDIT
TITLE
11/26/2007
MP(PR)
THERMAL SENSOR&FAN CONTROL
1.00
December 24, 2008 14:36:53 PM
DRESDEN-INT
MAIN
SAMSUNG
PART NO.
11 49
PAGE
ELECTRONICS
BA41-01024~6A
OF
SRP Sheet Number: 11 of 55
http://mycomp.su/x/
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
CPU1_HTIN(15:0) CPU1_HTOUT(15:0)
C
CPU1_HTIN#(15:0)
CPU1_CLKIN_0
CPU1_CLKIN_1
CPU1_CLKIN_0#
CPU1_CLKIN_1#
CPU1_CTLIN_0
CPU1_CTLIN_1
CPU1_CTLIN_0#
CPU1_CTLIN_1#
B
S1g2 CPU (1/3)
P1.2V
CPU500-1
S1G2
D1
VLDT_A0
D2
D3
D4
0
E3
1
E1
2
G3
3
G1
4
J1
5
L3
6
L1
7
N3
8
E5
9
F3
10
G5
11
H3
12
K3
13
L5
14
M3
15
N5
0
E2
1
F1
2
G2
3
H1
4
K1
5
L2
6
M1
7
N2
8
F5
9
F4
10
H5
11
H4
12
K4
13
M5
14
M4
15
P5
J3
J5
J2
K5
N1
P3
P1
P4
0185482000
VLDT_A1
VLDT_A2
VLDT_A3
L0_CADIN_H0
L0_CADIN_H1
L0_CADIN_H2
L0_CADIN_H3
L0_CADIN_H4
L0_CADIN_H5
L0_CADIN_H6
L0_CADIN_H7
L0_CADIN_H8
L0_CADIN_H9
L0_CADIN_H10
L0_CADIN_H11
L0_CADIN_H12
L0_CADIN_H13
L0_CADIN_H14
L0_CADIN_H15
L0_CADIN_L0
L0_CADIN_L1
L0_CADIN_L2
L0_CADIN_L3
L0_CADIN_L4
L0_CADIN_L5
L0_CADIN_L6
L0_CADIN_L7
L0_CADIN_L8
L0_CADIN_L9
L0_CADIN_L10
L0_CADIN_L11
L0_CADIN_L12
L0_CADIN_L13
L0_CADIN_L14
L0_CADIN_L15
L0_CLKIN_H0
L0_CLKIN_H1
L0_CLKIN_L0
L0_CLKIN_L1
L0_CTLIN_H0
L0_CTLIN_H1
L0_CTLIN_L0
L0_CTLIN_L1
HT LINK
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
L0_CADOUT_H0
L0_CADOUT_H1
L0_CADOUT_H2
L0_CADOUT_H3
L0_CADOUT_H4
L0_CADOUT_H5
L0_CADOUT_H6
L0_CADOUT_H7
L0_CADOUT_H8
L0_CADOUT_H9
L0_CADOUT_H10
L0_CADOUT_H11
L0_CADOUT_H12
L0_CADOUT_H13
L0_CADOUT_H14
L0_CADOUT_H15
L0_CADOUT_L0
L0_CADOUT_L1
L0_CADOUT_L2
L0_CADOUT_L3
L0_CADOUT_L4
L0_CADOUT_L5
L0_CADOUT_L6
L0_CADOUT_L7
L0_CADOUT_L8
L0_CADOUT_L9
L0_CADOUT_L10
L0_CADOUT_L11
L0_CADOUT_L12
L0_CADOUT_L13
L0_CADOUT_L14
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_H1
L0_CLKOUT_L0
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_H1
L0_CTLOUT_L0
L0_CTLOUT_L1
CPU Socket : 0185482000 (3704-001228)
P1.2V
1 / 5
AE2
AE3
AE4
AE5
AD1
AC2
AB1
AA2
W2
V1
U2
T1
AD4
AD5
AB4
AB5
Y5
V4
V5
T4
AC1
AC3
AA1
AA3
W3
U1
U3
R1
AD3
AC5
AB3
AA5
W5
V3
U5
T3
Y1
Y4
W1
Y3
R2
T5
R3
R5
Samsung
Samsung
Confidential
Confidential
3
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
CPU1_CLKOUT_0
CPU1_CLKOUT_1
CPU1_CLKOUT_0#
CPU1_CLKOUT_1#
CPU1_CTLOUT_0
CPU1_CTLOUT_1
CPU1_CTLOUT_0#
CPU1_CTLOUT_1#
P1.2V
CPU1_HTOUT#(15:0)
C205
C212
4700nF-X7R
4700nF-X7R
6.3V
6.3V
C201
4700nF-X7R
6.3V
220nF
10V
P2.5V
CLK0_HCLK0
CLK0_HCLK0#
P1.2V
P1.8V_AUX
C94
220nF
10V
B22
BLM18PG181SN1
C248
4700nF-X7R
6.3V
C587
C586
CPU1_PWRGDCPU
CPU1_VDD0_FB
CPU1_VDD0_FB#
CPU1_VDD1_FB
CPU1_VDD1_FB#
nostuff
nostuff
nostuff
nostuff
nostuff
C92
C91C217
0.18nF
0.18nF
50V
50V
C230
220nF
10V
3.9nF
50V
3.9nF
50V
CPU1_LDTRST#
CPU1_LDTSTP#
CPU1_LDTREQ#
CPU1_SIC
CPU1_SID
CPU1_ALERT#
R96
R97
R94
R161
R163
R192
R196
R91
R564
R558
R559
R95
R565
R575
2
44.2
44.2
301
301
301
301
301
301
301
301
301
301
301
1
P1.8V_AUX
1%
1%
M11
W18
A6
A4
AF6
AC7
AA8
W7
W8
W9
Y9
H6
G6
E10
AE9
J7
H8
D7
E7
F7
C7
C3
K8
C4
C9
C8
H18
H19
AA7
D5
C5
R171
R572
R573
R582
R556
R562
R557
R172
R173
301
R563
1%
301
R89
nostuff
301
R100
R170
CPU1_SVC
CPU1_SVD
CPU1_THRMTRIP#
CPU1_PROCHOT#
CPU2_THERMDC
CPU2_THERMDA
CPU1_VDDIO_FB
CPU1_VDDIO_FB#
CPU1_VDDNB_FB
CPU1_VDDNB_FB#
P1.8V
1%
301
301
1%
nostuff
nostuff
P1.8V
301
1%
301
1%
1%
301
301
1%
P1.8V_AUX
390
390
1K 1%
0
C218
3.3nF
50V
CPU500-4
S1G2
F8
VDDA1
F9
AF4
AF5
AE6
AB6
G10
AA9
AC9
AD9
AF9
AD7
H10
AB8
AF7
AE7
AE8
AC8
AF8
AA6
A9
A8
B7
A7
F10
C6
R6
P6
F6
E6
Y6
G9
E9
E8
C2
A3
A5
B3
B5
C1
VDDA2
CLKIN_H
CLKIN_L
RESET_L
PWROK
LDTSTOP_L
LDTREQ_L
SIC
SID
ALERT_L
HT_REF0
HT_REF1
VDD0_FB_H
VDD0_FB_L
VDD1_FB_H
VDD1_FB_L
DBRDY
TMS
TCK
TRST_L
TDI
TEST23
TEST18
TEST19
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST9
TEST6
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
0185482000
CPU1_PWRGDCPU
R574
169
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
0
4 / 5
KEY1
(VSS)
KEY2
(RSVD)
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC
THERMDA
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
CPU1_LDTREQ#
CPU1_LDTRST#
CPU1_LDTSTP#
CPU1_SIC
CPU1_SID
CPU1_ALERT#
SVC
SVD
TDO
D
C
B
A
4
DRAW
CHECK
APPROVAL REV
MODULE CODE
23
HS CHO
HS LEE / BM LEE
YB CHUN
A
DATE
DEV. STEP
LAST EDIT
11/26/2007
MP(PR)
TITLE
1.00
DRESDEN-INT
MAIN
S1G2 CPU 1/3
December 24, 2008 14:36:53 PM
1
SAMSUNG
PART NO.
PAGE
ELECTRONICS
BA41-01024~6A
OF
4912
SRP Sheet Number: 12 of 55
http://mycomp.su/x/
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4 23
1
S1g2 CPU (2/3)
7
2
0
133
H13
G15
C21
MA_DQS_L0
MA_DQS_L1
MA_DQS_L2
MA_DQS_H7
MB_DQS_H7
MB_DQS_L0
MB_DQS_L1
MB_DQS_L2
B12
A23
C16
0
1
7
MEM1_ADQS(7:0)
7
5
4
6
W15
W13
G21
AC23
AB20
MA_DQS_L6
MA_DQS_L7
MA_DQS_L3
MA_DQS_L4
MA_DQS_L5
MB_DQS_L3
MB_DQS_L4
MB_DQS_L5
MB_DQS_L6
MB_DQS_L7
E26
AF22
AE12
AC26
AD16
6
4 5
7
3
MEM1_BDQS(7:0)
3
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MEM1_BDQS#(7:0)
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
5252
53
54
55
56
57
58
59
60
61
62
63
4
3
6
0
2
5
5260
AC24
Y19
MA_DM4
MA_DM5
MB_DM4
MB_DM5
AB26
AE22
5
6
7
AB16
Y13
G13
MA_DM6
MA_DM7
CPU500-3
S1G2
3 / 5
0185482000
MB_DM6
MB_DM7
C12
AC16
AD12
7
1
G22
AD23
AB19
Y15
W12
G16
C22
MA_DQS_H3
MA_DQS_H4
MA_DQS_H5
MA_DQS_H6
MA_DQS_H0
MA_DQS_H1
MA_DQS_H2
Samsung
Samsung
Confidential
Confidential
MB_DQS_H0
MB_DQS_H1
MB_DQS_H2
MB_DQS_H3
MB_DQS_H4
MB_DQS_H5
MB_DQS_H6
F26
A24
D16
AF21
AF12
AE16
AC25
0
5
2
3
6
4
1
D
MEM1_ADM(7:0) MEM1_ADQS#(7:0)
MEM1_ADQ(63:0) MEM1_BDQ(63:0)
C
B
A
0
G12
1
F12
2
H14
G14
4
H11
5
H12
C13
7
E13
8
H15
9
E15
10
E17
11
H17
12
E14
13
F14
14
C17
15
G17
16
G18
17
C19
18
D22
19
E20
20
E18
21
F18
22
B22
23
C23
24
F20
25
F22
26
H24
27
J19
28
E21
29
E22
30
H20
31
H22
32
Y24
33
AB24
34
AB22
35
AA21
36
W22
37
W21
38
Y22
39
AA22
40
Y20
41
AA20
42
AA18
43
AB18
44
AB21
45
AD21
46
AD19
47
Y18
48
AD17
49
W16
50
W14
51
Y14
Y17
53
AB17
54
AB15
55
AD15
56
AB13
57
AD13
58
Y12
59
W11
60
AB14
61
AA14
62
AB12
63
AA12
MEM1_BDM(7:0)
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
1
E12
MA_DM0
MB_DM0
A12
0
1
3
2
C15
E19
MA_DM1
MA_DM2
MB_DM1
MB_DM2
B16
A22
264
3
4
F24
MA_DM3
MB_DM3
E25
4
P3.3V
R159
R566
PLACE EACH CAP NEAR W17 pin
MEM1_VREF
1%
10K
1%
10K
MCH3_EXTTS0#
MCH3_EXTTS1#
C111
100nF
10V
P1.8V_AUX
2
R561
R560
MEM1_ODT0
MEM1_ODT1
MEM1_CS0#
MEM1_CS1#
MEM1_CKE0
MEM1_CKE1
CLK1_MCLK0
CLK1_MCLK1
CLK1_MCLK0#
CLK1_MCLK1#
MEM1_AMA(15:0)
MEM1_ABS(2:0)
MEM1_ARAS#
MEM1_ACAS#
MEM1_AWE#
C122
1nF
50V
DRAW
CHECK
APPROVAL
MODULE CODE
39.2
39.2
P0.9V
1%
1%
P0.9V
undefined
CPU500-2
S1G2
D10
VTT1
C10
B10
AD10
AF10
AE10
H16
T19
V22
U21
V19
T20
U19
U20
V20
J22
J20
N19
E16
Y16
P19
N20
F16
AA16
P20
0
N21
1
M20
2
N22
3
M19
4
M22
5
L20
6
M24
7
L21
8
L19
9
K22
10
R21
11
L22
12
K20
13
V24
14
K24
15
K19
0
R20
1
R23
2
J21
R19
T22
T24
VTT2
VTT3
VTT4
MEMZP
MEMZN
RSVD_M1
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
MA_CKE0
MA_CKE1
MA_CLK_H5
MA_CLK_H1
MA_CLK_H7
MA_CLK_H4
MA_CLK_L5
MA_CLK_L1
MA_CLK_L7
MA_CLK_L4
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MA_BANK0
MA_BANK1
MA_BANK2
MA_RAS_L
MA_CAS_L
MA_WE_L
0185482000
C90
4700nF-X7R
6.3V
C97
1nF
50V
MEM:CMD/CTRL/CLK
C80
4700nF-X7R
6.3V
C85
C240
C87
1nF
1nF
1nF
50V
50V
50V
C95
4700nF-X7R
6.3V
C86
0.18nF
50V
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
MB_CKE0
MB_CKE1
MB_CLK_H5
MB_CLK_H1
MB_CLK_H7
MB_CLK_H4
MB_CLK_L5
MB_CLK_L1
MB_CLK_L7
MB_CLK_L4
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MB_BANK0
MB_BANK1
MB_BANK2
MB_RAS_L
MB_CAS_L
MB_WE_L
C219
4700nF-X7R
6.3V
C241
0.18nF
50V
2 / 5
VTT5
VTT6
VTT7
VTT8
VTT9
W10
AC10
AB10
AA10
A10
Y10
W17
B18
W26
W23
Y26
V26
W25
U22
J25
H26
P22
A17
AF18
R26
R22
A18
AF17
R25
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
R24
U26
J26
U25
U24
U23
C96
220nF
10V
C243
0.18nF
50V
P0.9V
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
1
2
C220
220nF
10V
C242
0.18nF
50V
CPU1_VTTSENSE
MEM1_VREF
MEM1_ODT2
MEM1_ODT3
MEM1_CS2#
MEM1_CS3#
MEM1_CKE2
MEM1_CKE3
CLK1_MCLK2
CLK1_MCLK3
CLK1_MCLK2#
CLK1_MCLK3#
MEM1_BMA(15:0)
MEM1_BBS(2:0)
MEM1_BRAS#
MEM1_BCAS#
MEM1_BWE#
C227
220nF
10V
C221
220nF
10V
D
C
B
A
SAMSUNG
ELECTRONICS
PART NO.
LAST EDIT
1
SRP Sheet Number: 13 of 55
http://mycomp.su/x/
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
CPU_CORE0
C
VDD_CPU_NB
B
M10
M16
M18
M21
M23
M25
J11
J13
J15
K10
K12
K14
L11
L13
L15
M2
M6
M8
N11
K16
P16
T16
V16
H25
J17
K18
K21
K23
K25
L17
N17
G4
H2
J9
K6
L4
L7
L9
N7
N9
CPU500-5
S1G2
VDD0_1
VDD0_2
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
VDD0_11
VDD0_12
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
0185482000
CPU Socket : 0185482000
S1g2 CPU (3/3)
CPU_CORE1
5 / 5
P8
VDD1_1
P10
VDD1_2
R4
VDD1_3
R7
VDD1_4
R9
VDD1_5
R11
VDD1_6
T2
VDD1_7
T6
VDD1_8
T8
VDD1_9
T10
VDD1_10
T12
VDD1_11
T14
VDD1_12
U7
VDD1_13
U9
VDD1_14
U11
VDD1_15
U13
VDD1_16
U15
VDD1_17
V6
VDD1_18
V8
VDD1_19
V10
VDD1_20
V12
VDD1_21
V14
VDD1_22
W4
VDD1_23
VDD1_24
VDD1_25
VDD1_26
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
Y2
AC4
AD2
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
P1.8V_AUX
Samsung
Samsung
Confidential
Confidential
3 1
2
Bottom side decoupling
CPU_CORE0
6.3V
22000nF-X5R
C193
CPU_CORE1
6.3V
22000nF-X5R
C144
6.3V
6.3V
22000nF-X5R
22000nF-X5R
C150
C162
10V
6.3V
220nF
4700nF-X7R
C115
C183
CORE0_RUN
6.3V
22000nF-X5R
C174
CORE1_RUN
6.3V
22000nF-X5R
C155
P1.8V_AUX
10V
220nF
C116
6.3V
22000nF-X5R
C175
6.3V
22000nF-X5R
C156
22000nF-X5R
C136
10V
220nF
C102
6.3V
6.3V
6.3V
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B11
B13
B15
B17
B19
B21
B23
B25
D11
D13
D15
D17
D19
D21
D23
D25
H21
H23
1%
100
CPU1_VDD0_FB
CPU1_VDD0_FB#
J6
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
VSS63
VSS64
J4
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
CPU1_VDD1_FB
CPU1_VDD1_FB#
R160
1%
100
R162
1%
100
R107
1%
100
R103
VDD_CPU_NB
6.3V
22000nF-X5R
C176
Decoupling between processor and Memory
Place close to processor as possible
P1.8V_AUX
6.3V
6.3V
6.3V
4700nF-X7R
4700nF-X7R
4700nF-X7R
C182
C112
C181
22000nF-X5R
C161
22000nF-X5R
C134
6.3V
22000nF-X5R
C189
10V
220nF
C114
10V
220nF220nF
C192
10V
C127
10V
220nF
C157
16V
10nF
C177
10V
220nF
C145
16V
10nF
C197
16V
10nF
C135
16V
10nF
C113
50V
0.18nF
C164
50V
0.18nF
C195
50V
0.18nF
C133
50V
0.18nF
C196
50V
0.18nF
C184
D
C
B
A
4
3
A
DRAW
CHECK
HS LEE / BM LEE
APPROVAL
MODULE CODE
2
HS CHO
YB CHUN
DATE
DEV. STEP
REV
LAST EDIT
11/26/2007
MP(PR)
1.00
TITLE
DRESDEN-INT
S1G2 CPU 3/3
December 24, 2008 14:36:53 PM
MAIN
SAMSUNG
ELECTRONICS
PART NO.
BA41-01024~6A
14 49
PAGE
1
OF
SRP Sheet Number: 14 of 55
http://mycomp.su/x/
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
RS780MN(1/3)
3
2 1
D
U507-2
216-0674026
D4
GFX_RX0P
A3
U507-1
216-0674026
0
Y25
HT_RXCAD0P
1
V22
HT_RXCAD1P
2
V25
HT_RXCAD2P
3
U24
HT_RXCAD3P
4
T25
HT_RXCAD4P
5
P22
HT_RXCAD5P
6
P25
HT_RXCAD6P
7
N24
HT_RXCAD7P
8
AC24
HT_RXCAD8P
9
AB25
HT_RXCAD9P
10
AA24
HT_RXCAD10P
11
Y22
HT_RXCAD11P
12
W21
HT_RXCAD12P
13
V21
HT_RXCAD13P
14
U20
HT_RXCAD14P
15
U19
C
B
CPU1_HTOUT#(15:0) CPU1_HTIN#(15:0)
CPU1_CLKOUT_0
CPU1_CLKOUT_1
CPU1_CTLOUT_0
CPU1_CTLOUT_1
CPU1_CLKOUT_0#
CPU1_CLKOUT_1#
CPU1_CTLOUT_0#
CPU1_CTLOUT_1#
R165
HT_RXCAD15P
0
Y24
HT_RXCAD0N
1
V23
HT_RXCAD1N
2
V24
HT_RXCAD2N
3
U25
HT_RXCAD3N
4
T24
HT_RXCAD4N
5
P23
HT_RXCAD5N
6
P24
HT_RXCAD6N
7
N25
HT_RXCAD7N
8
AC25
HT_RXCAD8N
9
AB24
HT_RXCAD9N
10
AA25
HT_RXCAD10N
11
Y23
HT_RXCAD11N
12
W20
HT_RXCAD12N
13
V20
HT_RXCAD13N
14
U21
HT_RXCAD14N
15
U18
HT_RXCAD15N
T22
HT_RXCLK0P
AB23
HT_RXCLK1P
M22
HT_RXCTL0P
R21
HT_RXCTL1P
T23
HT_RXCLK0N
AA22
HT_RXCLK1N
M23
HT_RXCTL0N
R20
HT_RXCTL1N
C23
HT_RXCALP
A24
301
HT_RXCALN
1%
0904-002431
HYPER TRANSPORT CPU I/F
1 / 5
HT_TXCAD0P
HT_TXCAD1P
HT_TXCAD2P
HT_TXCAD3P
HT_TXCAD4P
HT_TXCAD5P
HT_TXCAD6P
HT_TXCAD7P
HT_TXCAD8P
HT_TXCAD9P
HT_TXCAD10P
HT_TXCAD11P
HT_TXCAD12P
HT_TXCAD13P
HT_TXCAD14P
HT_TXCAD15P
HT_TXCAD0N
HT_TXCAD1N
HT_TXCAD2N
HT_TXCAD3N
HT_TXCAD4N
HT_TXCAD5N
HT_TXCAD6N
HT_TXCAD7N
HT_TXCAD8N
HT_TXCAD9N
HT_TXCAD10N
HT_TXCAD11N
HT_TXCAD12N
HT_TXCAD13N
HT_TXCAD14N
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK1P
HT_TXCTL0P
HT_TXCTL1P
HT_TXCLK0N
HT_TXCLK1N
HT_TXCTL0N
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
CPU1_HTIN(15:0)CPU1_HTOUT(15:0)
0
D24
1
E24
2
F24
3
F23
4
H23
5
J25
6
K24
7
K23
8
F21
9
G20
10
J20
11
J18
12
L19
13
M19
14
M21
15
P18
0
D25
1
E25
2
F25
3
F22
4
H22
5
J24
6
K25
7
K22
8
G21
9
H21
10
J21
11
K17
12
J19
13
L18
14
P21
15
M18
H24
L21
M24
P19
H25
L20
M25
Samsung
Samsung
R18
B24
B25
R164
301
1%
CPU1_CLKIN_0
CPU1_CLKIN_1
CPU1_CTLIN_0
CPU1_CTLIN_1
CPU1_CLKIN_0#
CPU1_CLKIN_1#
CPU1_CTLIN_0#
CPU1_CTLIN_1#
PEX1_MINIRXP0
PEX1_MINIRXN0
PEX1_EXPCARDRXP1
PEX1_EXPCARDRXN1
PEX1_GLAN_RXP2
PEX1_GLAN_RXN2
PEX1_SB_TXP(3:0)
PEX1_SB_TXN(3:0)
GFX_RX1P
C2
GFX_RX2P
E5
GFX_RX3P
G5
GFX_RX4P
H5
GFX_RX5P
J6
GFX_RX6P
J7
GFX_RX7P
L5
GFX_RX8P
M8
GFX_RX9P
P7
GFX_RX10P
P5
GFX_RX11P
R8
GFX_RX12P
R6
GFX_RX13P
P4
GFX_RX14P
T4
GFX_RX15P
C4
B3
C1
F5
G6
H6
J5
J8
L6
L8
M7
M5
P8
R5
P3
T3
AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7
0
AA8
1
AA7
2
AA5
3
W5
0
Y8
1
Y7
2
AA6
3
Y5
GFX_RX0N
GFX_RX1N
GFX_RX2N
GFX_RX3N
GFX_RX4N
GFX_RX5N
GFX_RX6N
GFX_RX7N
GFX_RX8N
GFX_RX9N
GFX_RX10N
GFX_RX11N
GFX_RX12N
GFX_RX13N
GFX_RX14N
GFX_RX15N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
SB_RX0P
SB_RX1P
SB_RX2P
SB_RX3P
SB_RX0N
SB_RX1N
SB_RX2N
SB_RX3N
0904-002431
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F SB
PCE_CALRN_PCE_BCALRN
PCE_CALRP_PCE_BCALRP
2 / 5
GFX_TX0P
GFX_TX1P
GFX_TX2P
GFX_TX3P
GFX_TX4P
GFX_TX5P
GFX_TX6P
GFX_TX7P
GFX_TX8P
GFX_TX9P
GFX_TX10P
GFX_TX11P
GFX_TX12P
GFX_TX13P
GFX_TX14P
GFX_TX15P
GFX_TX0N
GFX_TX1N
GFX_TX2N
GFX_TX3N
GFX_TX4N
GFX_TX5N
GFX_TX6N
GFX_TX7N
GFX_TX8N
GFX_TX9N
GFX_TX10N
GFX_TX11N
GFX_TX12N
GFX_TX13N
GFX_TX14N
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX1P
SB_TX2P
SB_TX3P
SB_TX0N
SB_TX1N
SB_TX2N
SB_TX3N
A5
A4
C3
D1
E2
F4
F1
H4
H1
J2
K4
K1
M4
M1
N2
P1
B5
B4
B2
D2
E1
F3
F2
H3
H2
J1
K3
K2
M3
M2
N1
P2
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
AD7
AE6
AB6
AD5
AE7
AD6
AC6
AE5
AB8
AC8
C598
C597
C603
C602
C600
C599
C591
C592
C594
C596
C589
C590
C593
C595
R187
R199
100nF
10V
100nF
10V
10V
100nF
10V100nF
100nF 10V
100nF 10V
100nF 10V
100nF 10V
100nF 10V
100nF 10V
2K 1%
1.24K
PEX1_MINITXP0
PEX1_MINITXN0
PEX1_EXPCARDTXP1
PEX1_EXPCARDTXN1
PEX1_GLAN_TXP2
PEX1_GLAN_TXN2
0
1
10V100nF
2
10V100nF
3
10V100nF
0
1
2
3
10V100nF
1%
PEG3_TX2P_HDMI
PEG3_TX1P_HDMI
PEG3_TX0P_HDMI
PEG3_TXCP_HDMI
PEG3_TX2N_HDMI
PEG3_TX1N_HDMI
PEG3_TX0N_HDMI
PEG3_TXCN_HDMI
PEX1_SB_RXP(3:0)
PEX1_SB_RXN(3:0)
P1.1V
D
C
B
Confidential
Confidential
A
4
3
AMD recommandation 1608, 1.27Kohm (2007-007669)
A
DRAW
CHECK
HS LEE / BM LEE
APPROVAL
MODULE CODE
2
HS CHO
YB CHUN
DATE
DEV. STEP
REV
LAST EDIT
11/26/2007
MP(PR)
TITLE
DRESDEN-INT
MAIN
1.00
RS780MN 1/3
December 24, 2008 14:36:53 PM
1
SAMSUNG
PART NO.
15 49
PAGE
ELECTRONICS
BA41-01024~6A
OF
SRP Sheet Number: 15 of 55
http://mycomp.su/x/
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
B27
BLM18PG181SN1
CRT3_RED
CRT3_GREEN
C
CPU1_LDTRST#
CHP3_NB_PWRGD
B
CRT3_HSYNC
A
CRT3_VSYNC
BLM18PG181SN1
PLT3_RST#
P3.3V
D
3
G
1
S
2
CRT3_BLUE
P1.1V
nostuff
R210
10K
1%
Q28
RHU002N06
B511
R201
R200
R585
50V
0.012nF
C224
C582
2200nF-X5R
10V
nostuff
0
0
0
P1.8V
R583
1K
1%
D
3
G
1
S
2
R209
0
nostuff
KBC3_NB_PWRGD#
KBC3_PWRGD
P3.3V
R579
2.2K
R578
2.2K
50V
0.012nF
C225
CPU1_ALL_LDTSTP
RHU002N06
P3.3V
4
P1.8V
50V
1%
1%
1%
150
140
150
0.012nF
C214
R175
R169
R166
P1.8V
B19
B20
B25
6.3V
C239
22000nF-X5R
CPU1_LDTSTP#
CPU1_LDTREQ#
R194
4.7K
Q27
1%
R189
4.7K
1%
R581
2.2K
R580
2.2K
nostuff
nostuff
RS780MN(2/3)
P3.3V
B28
BLM18PG181SN1
P1.8V
C292
2200nF-X5R
10V
C270
100nF
R176
R177
2200nF
C273
10V
R186
R185
CLK0_HTT
CLK0_HTT#
CLK3_NB14
nostuff
10V
301
C238
10V
2200nF-X5R
0
0
C281
2200nF-X5R
10V
CRT3_HSYNC
CRT3_VSYNC
CRT3_DDCCLK
CRT3_DDCDATA
10V
C237
2200nF
P1.1V
CLK1_NBGFX
CLK1_NBGFX#
CLK1_SBLINK
CLK1_SBLINK#
LCD3_EDID_CLK
LCD3_EDID_DATA
PEG5_HDMI_CLK
PEG5_HDMI_DATA
CHP3_STRAP
CRT3_HSYNC (Side Port Memory Option)
High : Not Available *
Low : Available
CRT3_VSYNC (Debug Bus Access)
High : Disable *
Low : Enable
U507-3
216-0674026
F12
AVDD1_NC
E12
AVDD2_NC
F14
AVDDDI_NC
G15
AVSSDI_NC
H15
AVDDQ_NC
H14
AVSSQ_NC
1%
E17
NC_1
F17
NC_2
F15
NC_3
G18
NC_4
G17
VSS35
E18
NC_5
F18
VSS36
E19
NC_6
F19
VSS37
A11
DAC_HSYNC_PWM_GPIO4
B11
DAC_VSYNC_PWM_GPIO6
F8
NC_7
E8
NC_8
1%
715
G14
NC_9
A12
PLLVDD_NC
D14
PLLVDD18_NC
B12
PLLVSS_NC
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESET#
A10
POWERGOOD
C10
LDTSTOP#
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P_OSCIN_OSCIN
F11
REFCLK_N_PWM_GPIO3
T2
GFX_REFCLKP
T1
GFX_REFCLKN
Samsung
Samsung
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP_SB_REFCLKP
V3
GPPSB_REFCLKN_SB_REFCLKN
B9
NC_10
A9
NC_11
A8
NC_12
B8
NC_13
B7
NC_14
A7
NC_15
B10
STRP_DATA
G11
RSVD
C8
NC_16
0904-002431
Confidential
Confidential
R190
150
1%
23
1
D
3 / 5
A22
CRT / TVOUTPLL PWRPMCLOCKs
MIS.
LVTM
SUS_STAT#_PWM_GPIO5
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
VDDLTP18_NC
VSSLTP18_NC
VDDLT18_1_NC
VDDLT18_2_NC
VDDLT33_1_NC
VDDLT33_2_NC
VSSLT1_VSS
VSSLT2_VSS
VSSLT3_VSS
VSSLT4_VSS
VSSLT5_VSS
VSSLT6_VSS
VSSLT7_VSS
GPIO3
GPIO2
GPIO4
NC_37
NC_38
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
B22
A21
B21
B20
A20
A19
B19
B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17
A13
B13
A15
B15
A14
B14
C14
D15
C16
C18
C20
E20
C22
E9
F7
G12
D9
D10
D12
AE8
AD8
D13
1.8k ohm
R191
R202
4.7K
1%
R178
1.91K
1%
LCD1_ADATA0
LCD1_ADATA0#
LCD1_ADATA1
LCD1_ADATA1#
LCD1_ADATA2
LCD1_ADATA2#
LCD1_ACLK
LCD1_ACLK#
B21
BLM18PG181SN1
C247
2200nF-X5R
10V
B18
BLM18PG181SN1
C226
C216
100nF
4700nF-X7R
10V
6.3V
R195
R188
4.7K
4.7K
1%
1%
0
PEG3_HPD_HDMI
CHP3_SUSSTAT#
CHP3_NB_THERMDP
CHP3_NB_THERMDN
P1.8V
P1.8V
PEG3_LCDVDDON
LCD3_BRIT
PEG3_BKLTEN
P1.8V
nostuff
nostuff
R184
R181
40.2
40.2
C
U507-4
216-0674026
AB12
NC_39
AE16
NC_40
V11
NC_41
AE15
NC_42
AA12
NC_43
AB16
NC_44
AB14
NC_45
AD14
NC_46
AD13
NC_47
AD15
NC_48
AC16
NC_49
AE13
NC_50
AC14
NC_51
Y14
NC_52
AD16
NC_53
AE17
NC_54
AD17
NC_55
W12
NC_56
Y12
NC_57
AD18
NC_58
AB13
NC_59
AB18
NC_60
V14
NC_61
V15
NC_62
W14
NC_63
AE12
AD12
NC_64
NC_65
0904-002431
1%
1%
SBD_MEM / DVO_I/F
4 / 5
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
IOPLLVDD18_NC
IOPLLVDD_NC
IOPLLVSS_NC
MEM_VREF_NC
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
AE18
P1.1V
B
P1.8V
A
DRAW
CHECK
HS LEE / BM LEE
APPROVAL PART NO.
MODULE CODE
3
2
HS CHO
YB CHUN
DATE
DEV. STEP
REV
LAST EDIT
11/26/2007
MP(PR)
1.00
TITLE
DRESDEN-INT
RS780MN 2/3
December 24, 2008 14:36:53 PM
MAIN
SAMSUNG
ELECTRONICS
BA41-01024~6A
4916
PAGE
1
OF
SRP Sheet Number: 16 of 55
http://mycomp.su/x/
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/Project/dresden-int/081224_pr/DRESDEN-INT_MAIN
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
RS780MN(3/3)
P1.1V
C271
4700nF
6.3V
2
VCC_NB
C250
C254
100nF
10V
C251
100nF
10V
C258
100nF
10V
10000nF-X5R
6.3V
C233
10000nF-X5R
6.3V
1
D
3
C265
C267
C269
100nF
10V
100nF
10V
1000nF-X5R
6.3V
C272
1000nF-X5R
6.3V
C234
P1.1V
R838
0
C229
C235
C228
C202
100nF
4700nF-X7R
10V
6.3V
C204
C209
10000nF
100nF
6.3V
C211
100nF
10V
C256
100nF
10V
P1.8V
10V
C213
100nF
10V
C264
100nF
10V
C266
1000nF-X5R
6.3V
P1.2V
C C
P1.8V
C278
22000nF-X5R
20%
6.3V
R839
0
C200
4700nF-X7R 100nF
6.3V
B23
CIC21J601NE
C257
C277
4700nF-X7R
4700nF-X7R
6.3V
6.3V
B
100nF
10V
C208
100nF
10V
C203
10V
C262
100nF
10V
100nF
10V
C207
100nF
10V
C223
100nF
10V
C263
100nF
10V
U507-5
216-0674026
J17
VDDHT_1
K16
VDDHT_2
L16
VDDHT_3
M16
VDDHT_4
P16
VDDHT_5
R16
VDDHT_6
T16
VDDHT_7
H18
VDDHTRX_1
G19
VDDHTRX_2
F20
VDDHTRX_3
E21
VDDHTRX_4
D22
VDDHTRX_5
B23
VDDHTRX_6
A23
VDDHTRX_7
AE25
VDDHTTX_1
AD24
VDDHTTX_2
AC23
VDDHTTX_3
AB22
VDDHTTX_4
AA21
VDDHTTX_5
Y20
VDDHTTX_6
W19
VDDHTTX_7
V18
VDDHTTX_8
U17
VDDHTTX_9
T17
VDDHTTX_10
R17
VDDHTTX_11
P17
VDDHTTX_12
M17
VDDHTTX_13
J10
VDDA18PCIE_1
P10
VDDA18PCIE_2
K10
VDDA18PCIE_3
M10
VDDA18PCIE_4
L10
VDDA18PCIE_5
W9
VDDA18PCIE_6
H9
VDDA18PCIE_7
T10
VDDA18PCIE_8
R10
VDDA18PCIE_9
Y9
VDDA18PCIE_10
AA9
VDDA18PCIE_11
AB9
VDDA18PCIE_12
AD9
Samsung
Samsung
VDDA18PCIE_13
AE9
VDDA18PCIE_14
U10
VDDA18PCIE_15
F9
VDD18_1
G9
VDD18_2
AE11
VDD18_MEM1_NC
AD11
VDD18_MEM2_NC
0904-002431
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
POWER
VDD_MEM1_NC
VDD_MEM2_NC
VDD_MEM3_NC
VDD_MEM4_NC
VDD_MEM5_NC
VDD_MEM6_NC
VDD33_1_NC
VDD33_2_NC
5 / 5
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
100nF
10V
C236
100nF
A25
D23
E22
G22
G24
G25
H19
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
J22
L17
C253
100nF
10V10V
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
C252
100nF
10V
GROUND
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
B
Confidential
Confidential
A
4
3
C287
100nF
R203
C291
100nF
10V10V
P3.3V
0
A
DRAW
CHECK
HS LEE / BM LEE
APPROVAL
MODULE CODE
2
HS CHO
YB CHUN
DATE
DEV. STEP
REV
LAST EDIT
11/26/2007
MP(PR)
TITLE
DRESDEN-INT
MAIN
1.00
RS780MN 3/3
December 24, 2008 14:36:53 PM
1
SAMSUNG
ELECTRONICS
PART NO.
BA41-01024~6A
PAGE OF
4917
SRP Sheet Number: 17 of 55
Loading...