DIGITAL HOME THEATHER SYSTEM
1. SERVICING PRECAUTIONS...............................................................................................................................................3/4
2. ESD PRECAUTIONS............................................................................................................................................................... 5
3. SPECIFICATIONS....................................................................................................................................................................6
4. DVD PROGRAM DOWNLOAD METHOD.............................................................................................................................7
5. INTERNAL BLOCK DIAGRAM OF ICs................................................................................................................................8/9
6. BLOCK DIAGRAM ................................................................................................................................................................. 20
7. WIRING DIAGRAM................................................................................................................................................................21
8. SCHEMATIC DIAGRAM...................................................................................................................................................22/28
－FRONT SCHEMATIC DIAGRAM
－DAC SCHEMATIC DIAGRAM
－VIDEO SCHEMATIC DIAGRAM
－MAIN SCHEMATIC DIAGRAM
1) MICOM SCHEMATIC DIAGRAM
2) AMP AND POWER SCHEMATIC DIAGRAM
3) PRE SCHEMATIC DIAGRAM
4) CONNECTION SCHEMATIC DIAGRAM
9. PRINTED CIRCUIT DIAGRAM.......................................................................................................................................... 29/33
－FRONT PCB
1) TOP VIEW
2) BOTTOM VIEW
－LOADER PCB
1) TOP SIDE
2) BOTTOM SIDE
－MAIN PCB
1) TOP VIEW
2) BOTTOM VIEW
－DAC PCB
1) TOP SIDE
2) BOTTOM SIDE
10. EXPLODED VIEW AND MECHANICAL PARTS LIST........................................................................................................34
11. ELECTRICAL PARTS LIST.............................................................................................................................................. 35/48
NOTES REGARDING COMPACT DISC PLAYER REPAIRS
1. Preparations
2. Notes for repair
CLEARING MALFUNCTION
Input Power 30W/ch.( Music Power)
Impedance 4
Connected Cable Front, Center 2.5m / Subwoofer 3m / Rear 10m
Front Speaker Type 3full-range driver(Magnetic-Shielded)
Center Speaker Type 3full-range driver(Magnetic-Shielded)
Rear Speaker Type 3full-range driver
Subwoofer Type Passive subwoofer with 6.5driver
Front Speaker Dimensions(WHD)/Weight 10216193mm / 760g
Center Speaker Dimensions(WHD)/Weight 30010293mm / 1,430g
Rear Speaker Dimensions(WHD)/Weight 10216193mm / 770g
Subwoofer Dimensions(WHD)/Weight 200330324mm / 5,450g
Speaker Section
INSERT THE UPDATE DISC INTO THE DISC TRAY, THEN THE DVD RECEIVER READS
THE DISC AND UPDATE THE FIRMWARE ITSELF AS FOLLOWINGS.
INSERT THE UPDATE DISC.
NOTE
1. DOOR OPEN, FINISHED THE UPDATING, THEN REMOVE UPDATE DISC.
2. AFTER UPDATING, POWER OFF AND POWER ON AGAIN.
3. AFTER NOTE STEP 2. MUST PERFORM RESET IN SETUP MENU.
CAUTION
DURING UPDATING ,PLEASE DO NOT POWER OFF OR OPEN THE DOOR.
NO STATUS VFD MONITOR SET CONDITION
1 LOADING LOADING DISC LOADING DOOR CLOSE
2 DETECT THE UPDATE DISC LOADING ERASE DOOR CLOSE
3 PROGRAM UPDATING LOADING WRITING DOOR CLOSE
4 COMPLETED UPDATING LOADING DONE DOOR OPEN
A29400
n SOP
RY/BY
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
VSS
OE
I/O
0
I/O14I/O8
I/O7
I/O15 (A-1)
VSS
BYTE
A16
A15
A14
A12
A11
A10
WE
A8
A9
A13
A29400
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
NC
RESET
17
18
19
20
21
22
28
27
26
25
24
23
I/O
1
I/O9
I/O2
I/O10
I/O3
I/O11
I/O6
I/O13
I/O5
I/O12
I/O4
VCC
Pin No. Description
A0 - A17 Address Inputs
I/O0 - I/O14 Data Inputs/Outputs
I/O15
Data Input/Output, Word Mode
I/O15 (A-1)
A-1 LSB Address Input, Byte Mode
CE
Chip Enable
Write Enable
OE
Output Enable
RESET
Hardware Reset (N/A A294001)
Selects Byte Mode or Word Mode
RY/BY
Ready/
BUSY
- Output
VSS Ground
VCC Power Supply
State
Control
Command
Register
Address Latch
X-decoder
Y-Decoder
Chip Enable
Output Enable
Logic
Cell Matrix
Y-Gating
VCC Detector
PGM Voltage
Generator
Data Latch
Input/Output
Buffers
Erase Voltage
Generator
VCC
VSS
WE
CE
OE
A0-A17
I/O
0 - I/O15 (A-1)
Timer
STB
STB
RESET
Sector Switches
BYTE
RY/BY
A290011
RESET
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O
0
I/O1
I/O2
I/O3VSS
I/O
4
I/O5
I/O6
I/O7
CE
A10
OE
A9
A8
A13
WE
NC
A14
VCC
A11
A29001/A290011
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
NC on A290011
Pin No. Description
A0 - A16 Address Inputs
I/O0 - I/O7 Data Inputs/Outputs
CE
Chip Enable
Write Enable
OE
Output Enable
RESET
Hardware Reset (N/A A290011)
VSS Ground
VCC Power Supply
State
Control
Command
Register
Address Latch
X-decoder
Y-Decoder
Chip Enable
Output Enable
Logic
Cell Matrix
Y-Gating
VCC Detector
PGM Voltage
Generator
Data Latch
Input/Output
Buffers
Erase Voltage
Generator
VCC
VSS
WE
CE
OE
A0-A16
I/O
0 - I/O7
Timer
STB
STB
RESET
(N/A A290011)
WE
WE
BYTE
AME1117
V
IN
ADJ/GND
V
OUT
AME1117
Therm al
Protection
Bandgap
Reference
Current
Limiting
Amplifier
Input
Output
ADJ/COM
Error
Amp.
AT24C02
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
Pin Nam e Function
A0 - A2 Address Inputs
SDA Serial Data
SCL Serial Clock Input
WP Write Protect
NC No Connect
BU4052BCF
CS4955
CS98000
H_D_[15:0]
H_CS_[3:0]
H_A_[4:0]
H_ALE
H_RD
H_WR
H_CKO
H_RDY
VIN_ D[7:0]
VIN_HSNC
VIN_VSNC
VIN_CLK
VIN_FLD
M_A_[11:0]
M_BS_N
M_D_[31:0]
M_DQM_[3:0]
M_RAS_N
M_CAS_N
M_WE_N
M_AP
M_CKE
M_CKO
NVR_OE_N
NVR_WR_N
HSYNC
VSYNC
CLK27_O
VDAT_[7:0]
AUD_BCK
AUD_LRCK
AUD_DO_[3:0]
AIN_BCK
AIN_LRCK
AIN_DATA
CDC_DI
CDC_DO
CDC_RST
CDC_CK
CDC_SY
GPIO
_
D[20-0]
IR_IN
MFG_TST
XTLCLOCK
RST_N
CS98000
Host/Loader
(30)
Video In
(12)
Memory IF
(57)
Video out
(11)
DAC Out
(7)
MISC.
(41)
CODEC IF
(5)
ADC In
(3)
SPDIF_O
GPIO
_
H[16-14]
GPIO_V10
GPIO_[15-10, 8-7, 4-2, 0]
CXP82532
LA7952
MC74HCU04A
11
12
13
14
8
9
105
4
3
2
1
7
6
Y5
A5
Y6
A6
V
CC
Y4
A4
Y2
A2
Y1
A1
GND
Y3
A3
Y1A1
A2
A3
A4
A5
A6
Y2
Y3
Y4
Y5
Y6
1
3
5
9
11
13
2
4
6
8
10
12
Y = A
PIN 14 = Vcc
PIN 7 = GND
Inputs
A
L
H
Outputs
Y
H
L
HY57V651620B
VSS
DQ15
V
SSQ
DQ14
DQ13
V
DDQ
DQ12
DQ11
V
SSQ
DQ10
DQ9
V
DDQ
DQ8
V
SS
NC
UDQM
CLK
CKE
NC
A11
A9
A8
A7
A6
A5
A4
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
VDD
DQ0
V
DDQ
DQ1
DQ2
V
SSQ
DQ3
DQ4
V
DDQ
DQ5
DQ6
V
SSQ
DQ7
V
DD
LDQM
/W E
/CA S
/RA S
/CS
BA0
BA1
A10/AP
A0
A1
A2
A3
V
DD
54 pin TSOP II
400mil x 875mil
0.8mm pin pitch
PIN PIN NAME DESCRIPTION
CLK Clock
The system clock input. All other inputs are registered to the SDRAM on the
rising edge of CLK
CKE Clock Enable
Controls internal clock signal and when deactivated, the SDRAM will be one
of the states among power down, suspend or self refresh
CS
Chip Select Enables or disables all inputs except CLK, CKE and DQM
BA0,BA1 Bank Address
Selects bank to be activated during RAS
activity
Selects bank to be read/written during CAS
activity
A0 ~ A11 Address
Row Address : RA0 ~ RA11, Column Address : CA0 ~ CA7
Auto-precharge flag : A10
RAS
, CAS, WE
Row Address Strobe,
Column Address Strobe,
Write Enable
RAS
, CAS and WE define the operation
Refer function truth table for details
LDQM, UDQM Data Input/Output Mask Controls output buffers in read mode and masks input data in write mode
DQ0 ~ DQ15 Data Input/Output Multiplexed data input / output pin
V
DD/VSS Power Supply/Ground Power supply for internal circuits and input buffers
V
DDQ/VSSQ Data Output Power/Ground Power supply for output buffers
NC No Connection No connection
NJM2068
NJM4560
NJW1150
T224162B TDA7264
IN (L)
MUTE/
ST-BY
GND
OUT (L)
OUT (R)
2
4
6
7
5
8
1
3
+
+
-
-
D94AU069A
+V
S
-V
S
CS4340
Loading...