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BU9833GUL-W
Technical data
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ROHM BU9833GUL-W Technical data

A
WL-CSP EEPROM family I2C BUS
BU9833GUL-W
●Description
BU9833GUL-W series is a serial EEPROM of I available at 400kHz.
●Features
1) Completely conforming to the world standard I and serial data(SDA)
2) Other devices than EEPROM can be connected to the same port, saving microcontroller port.
3) Actions available at 400kHz clock (1.7V~5.5V)
4) 1.7~5.5V single power source action most suitable for battery use.
5) Page write mode useful for initial value write at factory shipment.
6) Auto erase and auto end function at data rewrite.
7) Low current consumption At write action (5V) : 1.2mA (Typ.) At read action (5V) : 0.2mA (Typ.) At standby action (5V) : 0.1μA (Typ.)
8) Write mistake prevention function Write (write protect) function added. Write mistake prevention function at low voltage.
9) Data rewrite up to 1,000,000times.
10) Data kept for 40 years.
11) Noise filter built in SCL / SDA terminal
12) Shipment data all address FFh.
●Page write
2
C BUS interface method. 1.7V single power source action and actions
2
C BUS. All controls available by 2 ports of serial clock (SCL)
No.10001EAT17
Product number Number of pages
BU9833GUL-W 16Byte
●BU9833GUL-W
Type Capacity Bit format
BU9833GUL-W
●Absolute maximum ratings (Ta=25℃)
Parameter Symbol Ratings Unit
Impressed voltage Vcc
Permissible dissipation Pd 220 mW
Storage temperature range Tstg -65~125 ℃
Operating temperature range Topr -40~85 ℃
Terminal voltage – -0.3~Vcc+1.0 V
・When using at Ta=25℃ or higher, 2.2mW (*1) to be reduced per 1℃
2Kbit 256×8 1.7~5.5V VCSP50L1
-0.3~+6.5*1
Power source
voltage
V
Package
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1/18
2010.10 - Rev.
A
BU9833GUL-W
●Recommended action conditions
Parameter Symbol Ratings Unit
Power source voltage Vcc 1.7~5.5
Input voltage Vin 0~Vcc
●Memory cell characteristics (Ta=25℃, Vcc=1.7~5.5V)
Parameter
Number of data rewrite times
*1
1,000,000 - - Times
Min Typ. Max
Limits
Technical Note
V
Unit
Data hold years
*
1:Not 100% TESTED
*1
40 - - Years
●Electrical characteristics (Unless otherwise specified, Ta=-40~+85℃, Vcc=1.7~5.5V)
Parameter Symbol
“HIGH” input voltage1 V
“LOW” Input voltage1 V
“HIGH” input voltage2 V
“LOW” input voltage2 V
“HIGH” input voltage3 V
“LOW” input voltage3 V
“LOW” output voltage1 V
“LOW output voltage2 V
Min. Typ. Max.
0.7Vcc - Vcc+1.0 V 2.5V≦Vcc≦5.5V
IH1
-0.3 - 0.3Vcc V 2.5V≦Vcc≦5.5V
IL1
0.8Vcc - Vcc+1.0 V 1.8V≦Vcc<2.5V
IH2
-0.3 - 0.2Vcc V 1.8V≦Vcc<2.5V
IL2
0.9Vcc - Vcc+1.0 V 1.7V≦Vcc<1.8V
IH3
-0.3 - 0.1Vcc V 1.7V≦Vcc<1.8V
IL3
- - 0.4 V IOL=3.0mA, 2.5V≦Vcc≦5.5V, (SDA)
OL1
- - 0.2 V IOL=0.7mA, 1.7V≦Vcc<2.5V, (SDA)
OL2
Limits
Unit Conditions
Input leak current ILI -1 - 1 μA VIN=0V~Vcc
Output leak current ILO -1 - 1 μA V
I
- - 2.0 mA
CC1
Current consumption at action
I
- - 0.5 mA
CC2
Standby current ISB - - 2.0 μA
○This product is not designed for protection against radioactive rays.
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2/18
=0V~Vcc(SDA)
OUT
Vcc=5.5V, f
=400kHz, tWR=5ms,
SCL
Byte write, Page write
Vcc=5.5V, f
=400kHz
SCL
Random read, vurrent read, sequential read
Vcc=5.5V, SDA·SCL=Vcc, A2=GND, WP=GND
2010.10 - Rev.
A
BU9833GUL-W
ACK
A
A
A
A
Technical Note
●Action timing Characteristics (Unless otherwise specified, Ta=-40～+85℃,Vcc=1.7~5.5V)
FAST-MODE
Parameter Symbol
2.5V≦Vcc≦5.5V
STANDARD-MODE
2.5V≦Vcc≦5.5V
Min. Typ. Max. Min. Typ. Max.
SCL frequency fSCL - - 400 - - 100 kHz
Data clock “HIGH” time tHIGH 0.6 - - 4.0 - - μs
Data clock “LOW” time tLOW 1.2 - - 4.7 - - μs
SDA, SCL rise time *1 tR *1 - - 0.3 - - 1.0 μs
SDA< SCL fall time *1 tF *1 - - 0.3 - - 0.3 μs
Start condition hold time tHD:STA 0.6 - - 4.0 - - μs
Start condition setup time tSU:STA 0.6 - - 4.7 - - μs
Input data hold time tHD:DAT 0 - - 0 - - ns
Input data setup time tSU:DAT 100 - - 250 - - ns
Output data delay time tPD 0.1 - 0.9 0.2 - 3.5 μs
Output data hold time tDH 0.1 - - 0.2 - - μs
Stop condition setup time tSU:STO 0.6 - - 4.7 - - μs
Bus release time before transfer start tBUF 1.2 - - 4.7 - - μs
Internal write cycle time tWR - - 5 - - 5 ms
Noise removal valid period (SDA, SCL terminal) tI - - 0.1 - - 0.1 μs
WP hold time tHD:WP 0 - - 0 - - ns
WP setup time tSU:WP 0.1 - - 0.1 - - μs
WP valid time tHIGH:WP 1.0 - - 1.0 - - μs
*1 Not 100% tested.
●Sync data input / output timing
SCL
SDA (Input)
SDA (Output)
tHD:STA tHD:DAT tSU:DAT
tBUF tPD tDH
○Input read at the rise edge of SCL ○Data output in sync with the fall of SCL
Fig.-1(a) Sync data input / output timing
SCL
tSU:ST
SDA
START BIT
Fig.1-(b) Start – stop bit timing
SCL
SDA
D0 ACK
Write data
(n-th address)
Stop condition Start c ondition
tLOW
tHIGH tR tF
SCL
SDA
WP
DATA(1)
D1 D0ACK
tSU：WP
DATA(n)
stop condition
fig.1-(d) WP timing at write execution
SCL
DATA(1)
D1 D0
SDA
tSU :STO tHD:ST
STOP BIT
WP
CK
tHIGH:WP
DATA(n)
CK
Fig.1-(e) WP timing at write cancel
○At write execution, in the area from the DO taken clock rise of the first
DATA (1), to tWR, set WP=“LOW”
○By setting WP “HIGH” in the area, write can be cancelled.
When it is set WP=“HIGH” during tWR, write is forcibly ended, and data of address under access is not guaranteed, therefore write it once again.
tWR
Fig.1-(c) Write cycle timing
tWR
tWR
ｔHD：
Unit
WP
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3/18
2010.10 - Rev.
A
BU9833GUL-W
●Block diagram
VCC
GND
A2
●Pin assignment and description
Land No. Terminal name Input/ Output Function
2Kbit EE PROM array
9bit
Addr ess decoder
Control circuit
High vol tage
generating circuti
Slav e – word
9bit
address register
START STOP
Power source
voltage detection
Fig.2 Block diagram
C
B
A
C1
○○
B1 B2
○○
A1
○○
C2
A2
12
Fig.3 BU9833GUL－W (bottom view)
ACK
8bit
Data
register
INDEX POST
Technical Note
WP
SCL
SDA
C2 VＣＣ
-
Power Supply
C1 A2 IN Slave Address Set
B2 WP IN Write Protect Input
B1 GND
-
Ground （0V）
A2 SCL IN Serial Clock Input
A1 SDA IN/OUT
Slave and Word Address, Serial Data Input, Serial Data Output *1
*1 An open drain output requires a pull-up resister.
●Characteristic data (The following values are Typ. ones.)
6
5
4
3
VIH1,2,3[V]
2
1
0
0123456
SPEC
Ta= 85 ℃
Ta= -4 0℃
Ta= 25 ℃
Vcc[V]
Fig.4 H input voltage VIH1,2,3
(A2,SCL,SDA,WP)
6
5
4
Ta= 85 ℃
3
VIL1,2,3[V]
Ta= -4 0℃
2
Ta= 25 ℃
1
0
0123456
Fig.5 L input voltage VIL1,2,3
(A2,SCL,SDA,WP)
Vcc[V]
SPEC
1
0.8
0.6
VOL2[V]
0.4
SPEC
0.2
0
0123456
Ta= 85 ℃
Ta= 25 ℃
Ta= -4 0℃
IOL2[mA]
Fig.6 L output voltage VOL2-IOL2
CC=1.7V)
(V
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4/18
2010.10 - Rev.
A
BU9833GUL-W
Technical Note
●Characteristic data
1
0.8
0.6
VOL1[V]
0.4
Ta= 85 ℃
0.2
0
0123456
Fig.7 L input voltage
VOL1-IOL1 (Vcc=2.5V)
2.5
2
fSCL=400kHz DATA=AAh
1.5
ICC1[mA]
1
Ta= 25 ℃
Ta= 85 ℃
0.5
0
0123456
Fig.10 Consumption current
at write action Icc1 (f
10000
1000
fSCL[kHz]
Ta= 85 ℃
100
10
1
0123456
1
0.8
0.6
SPEC
0.4
tHD:STA[μs]
0.2
0
0123456
Fig.16 Start condition
hold time tHD:STA
200
100
0
tSU:DAT(HIGH)[ns]
-100
-200 0123456
SPEC
Ta= 85 ℃
Fig.19 Input data
setup time tSU:DAT
SPEC
IOL1[mA]
SPEC
Vcc[V]
SPEC
Vcc[V]
Vcc[V]
Vcc[V]
Ta= 25 ℃
Ta= -4 0℃
Ta= -4 0℃
SCL=400kHz)
Ta= -4 0℃ Ta= 25 ℃
SCL
Ta= 85 ℃
Ta= 25 ℃
Ta= -4 0℃
Ta= -4 0℃
Ta= 25 ℃
1.2
1
0.8
0.6
ILI[μA]
0.4
0.2
0
0123456
SPEC
Vcc[V]
Ta= 85 ℃ Ta= 25 ℃
Ta= -4 0℃
Fig.8 Input leak current
ILI (A2,SCL, WP)
0.6
fSCL=400kHz DATA=AAh
SPEC
Ta= 25 ℃
Ta= 85 ℃
Vcc[V]
0.5
0.4
0.3
ICC2[mA]
0.2
0.1
0
0123456
Fig.11 Consumption current
at write action Icc2 (f
1
0.8
0.6
0.4
tHIGH [μs]
0.2
0
0123456
1
0.8
0.6
0.4
0.2
tHD:DAT(HIGH)[ns ]
0
-0.2 0123456
SCL=400kHz)
SPEC
Ta= 85 ℃
Ta= 25 ℃
Ta= -4 0℃
Vcc[V]
SPEC
Ta= 85 ℃
Ta= 25 ℃
Ta= -4 0℃
Vcc[V]
Fig.17 Start condition
setup time tSU:STA
1
0.8
0.6
0.4
tPD0 [μs]
0.2
0
SPEC
Ta= 85 ℃
Ta= 25 ℃
Ta= -4 0℃
SPEC
0123456
Vcc[V]
Fig.20 Output data delay time
tPD0
Ta= -4 0℃
1.2
1
0.8
0.6
ILO[μA]
0.4
0.2
0
SPEC
Ta= 85 ℃
Ta= 25 ℃
Ta= -4 0℃
0123456
Vcc[V]
Fig.9 Output leak current
ILO (SDA)
2.5
2
1.5
ISB[μA]
1
0.5
0
0123456
SPEC
Ta= 85 ℃
Ta= 25 ℃
Ta= -4 0℃
Vcc[V]
Fig.12 Standby current I
1.6
1.2
0.8
tLOW[μs]
0.4
0
0123456
SPEC
Ta= 85 ℃
Ta= 25 ℃
Vcc[V]
Ta= -4 0℃
Fig.15 Data clock “L” time tLOWFig.14 Data clock “H” time tHIGHFig.13 SCL frequency f
50
0
-50
-100
tHD:DAT(HIGH)[ns ]
-150
-200
SPEC
Ta= 85 ℃
Ta= 25 ℃
Ta= -4 0℃
0123456
Vcc[V]
Fig.18 Input data
hold time tHD:DAT
1
0.8
0.6
0.4
tPD1 [μs]
0.2
0
0123456
SPEC
Ta= 85 ℃
Ta= 25 ℃
Ta= -4 0℃
SPEC
Vcc[V]
Fig.21 Output data delay time
tPD1
SB
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5/18
2010.10 - Rev.
A
BU9833GUL-W
●Characteristic data
1
0.8
0.6
tDH0[μs]
0.4
0.2
0
SPEC
0123456
Fig.22 Output data hold time
5
4
3
tBUF[μs]
2
1
SPEC
0
0123456
Fig.25 Bus release time
before transfer start tBUF
0.6
0.5
0.4
0.3
Ta= 25 ℃
tI(SCL L) [μ s]
0.2
0.1
0
0123456
SPEC
Fig.28 Noise removal time
tI (SCL L)
0.2
0
SPEC
-0.2
tSU:WP[μs]
-0.4
Ta= 25 ℃
-0.6
0123456
Fig.31 WP setup time
tSU:WP
Vcc[V]
tDH1
Vcc[V]
Ta= -4 0℃
Vcc[V]
Vcc[V]
Ta= 85 ℃
Ta= 25 ℃
Ta= -4 0℃
Ta= -4 0℃
Ta= 25 ℃
Ta= 85 ℃
Ta= 85 ℃
Ta= 85 ℃
Ta= -4 0℃
4
3
2
tDH1[μs]
1
SPEC
0
0123456
Ta= 85 ℃
Ta= 25 ℃
Ta= -4 0℃
Vcc[V]
Fig.23 Output data hold time
SPEC
tDH1
Ta= -4 0℃
Ta= 85 ℃
Vcc[V]
Ta= 25 ℃
6
5
4
3
tWR[ms]
2
1
0
0123456
Fig.26 Internal write cycle time
tWR
0.6
0.5
0.4
Ta= 25 ℃
0.3
0.2
tI(SDA H) [μ s]
0.1
0
0123456
Fig.29 Noise removal time
Ta= -4 0℃
Ta= 85 ℃
SPEC
Vcc[V]
tI (SDA H)
1.2
1
0.8
0.6
tHIGH:WP[μs]
0.4
0.2
0
SPEC
Ta= -4 0℃
Ta= 25 ℃
Ta= 85 ℃
0123456
Vcc[V]
Fig.32 WP valid time
tHIGH: WP
Technical Note
5
4
3
2
tSU:STO[μs]
1
0
Fig.24 Stop condition setup time
SPEC
0123456
Vcc[V]
tSU:STO
0.6
0.5
0.4
Ta= -4 0℃
0.3
tI(SCL H) [μ s]
0.2
0.1
0
SPEC
0123456
Fig.27 Noise removal time
Vcc[V]
tI (SCL H)
0.6
0.5
0.4
0.3
Ta= 25 ℃
tI(SDA L) [μ s]
0.2
0.1
0
Fig.30 Noise removal time
SPEC
0123456
Vcc[V]
tI (SDA L)
Ta= 85 ℃
Ta= 25 ℃
Ta= -4 0℃
Ta= 25 ℃
Ta= 85 ℃
Ta= -4 0℃
Ta= 85 ℃
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2010.10 - Rev.
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