Datasheet BU1850MUV Datasheet (ROHM)

GPIO ICs Series

GPIO Expander IC

BU1850MUV

●Description GPIO expander is useful especially for the application that is in short of IO ports. It can

1. Control GPIO output states by I

2. Know GPIO input states by I Furthermore,it has the interrupt function that can release CPU from polling the registers in the GPIO expander. GPIO expander are also equipped with Built-in power on reset, 3V tolerant input,and NMOS open-drain output.

●Features

1) An 8-Port General purpose input/output interface 150kΩPull-down resistance.

2) NMOS Open-drain output interrupt controller with up to 1us pulse noise filter and bit mask function for individual GPIO port.

3) 3volt tolerant Input

4) Built-in Power On Reset

5) 3mmx3mm small package

●Absolute maximum ratings (Ta=25

o

C)

Parameter Symbol Rating Unit comment

Supply Voltage*1

Input voltage

Storage temperature range Tstg -55 ~ +125

Package power PD 272*2 mW

2

C write protocol.

2

C read protocol.

VDD -0.3 ~ +4.5 V VDD≦VDDIO

VDDIO -0.3 ~ +4.5 V

VI -0.3 ~ VDD +0.3

*1

V XRST, ADR

VIT -0.3 ~ 4.5 V XINT, SCL, SDA, GPIO[7:0]

℃

No.09098EAT02

This IC is not designed to be X-ray proof.

*1 It is prohibited to exceed the absolute maximum ratings even including +0.3 V.

*2 Package dissipation will be reduced each 2.72mW/

o

C when the ambient temperature increases beyond 25 oC.

●Operating conditions

Parameter Symbol Min Typ Max Unit Conditions

Core, XINT, XRST,

Supply voltage range (VDD) V

1.65 1.80 3.6 V

VDD

SCL, SDA, ADR, Power On Reset

Supply voltage range (VDDIO) V

Input voltage range

1.65 1.80 3.6 V GPIO[7:0]

VDDIO

-0.2 - V

V

IN

V

-0.2 - 3.6 V

INT

+0.2 V XRST, ADR

VDD

XINT, SCL, SDA,

GPIO[7:0]

Operating temperature range Topr -30 - +85 ℃

I2C operating frequency F

- - 400 kHz Slave

I2C

www.rohm.com

1/17

2009.09 - Rev.A

BU1850MUV

●Package Specification

Technical Note

B U 1 8 5 0

Lot No.

(UNIT: mm)

Fig.1 Package Specification (VQFN016V3030)

www.rohm.com

2/17

2009.09 - Rev.A

BU1850MUV

●Pin Assignment

12 GPIO3

11 GPIO2

10 GPIO1

Technical Note

9 GPIO0

●Block Diagram

13 GPIO4

14 GPIO5

15 GPIO6

16 GPIO7

1 XINT

2 XRST

3 SCL

4 ADR

Fig.2 Pin Diagram (Top View)

Functional Block Diagram

8 VSS

7 VDDIO

6 VDD

5 SDA

XINT

VDD

ADR

SCL

SDA

XRST

VSS

Interrupt

Filter

Input Filter

Power

On

Reset

Gen

Interrupt

Logic

I2C Bus Control

INT_MASK

IN/OUT

Control

Shift

8bit

Register

Write Pulse Read Pulse

Fig.3 Functional Block Diagram

GPIO

[7:0]

8bit

VDDIO

GPIO[7:0]

www.rohm.com

3/17

2009.09 - Rev.A

BU1850MUV

●Pin-out Functional Descriptions

PIN No.

1 XINT O VDD 2 XRST I VDD Reset（Low Active） I E

3 SCL I VDD Clock for I2C I A 4 ADR I VDD Select dev ice address of I2C I E

5 SDA I/O VDD

6 VDD - 7 VDDIO - - Power supply (I/O) - -

8 VSS - - GND - 9 GPIO0 I/O VDDIO

10 GPIO1 I/O VDDIO

PIN name I/O

Power source

system

Function Init

Interrupt signal (1s pulse cut)*1

(NMOS Open-drain)

2

Serial data inout for I

(NMOS Open-drain)

Power supply (Core, I/O, Power On

Reset)

C

Technical Note

Cell

Type

Hi-Z B

Hi-Z C

- -

11 GPIO2 I/O VDDIO 12 GPIO3 I/O VDDIO 13 GPIO4 I/O VDDIO 14 GPIO5 I/O VDDIO 15 GPIO6 I/O VDDIO 16 GPIO7 I/O VDDIO

*1 Specific bit mask control is decided by internal register value. *2

Pull-up more than VDDIO voltage. It is possible to select Pull-down ON or OFF with register.

*3

A

B

General purpose input/output.

(NMOS Open-drain

150kΩPull-down

*2

/CMOS Output,

C

I

*3

)

Pull-down

D

E

Fig.4 Equivalent IO circuit diagram

www.rohm.com

4/17

2009.09 - Rev.A

BU1850MUV

Technical Note

●Functional Description

1. Power Modes

The device enters the state of Power Down when XRST=”Low” or enters the operation state when XRST=High after powered. Refer to “Electrical Specification” section 5 for a detailed startup sequence.

1-1 Power supply A single supply to Core power supply (VDD) and IO power supply (VDDIO) is prohibited. Supply the power supply to the Cor e power supply and the IO power supply at the same time.

1-2 Power On Reset

A Power On Reset logic is implemented in this device. Therefore, it will operate correctly eve n if the XRST port is

not used. In this case, the XRST port must be connected to high(VDD).

1-3 State of Power Down

The device enters the state of Power Down by XRST =”Low”. An internal circuit is initialized and I

2

C interface is

invalid is input. Power On Reset becomes inactive during this state.

1-4 State of operation

The device enters the operation state by setting XRST to "High". The I

2

C interface starts communication is

the START condition. It becomes standby by the STOP condition. Power On Reset is active in this state.

www.rohm.com

5/17

2009.09 - Rev.A

BU1850MUV

Technical Note

2

C Bus Interface

2. I Each function of GPIO is controlled by an internal register. The I

2

C Slave interface is used to write or read this internal

register. The device supports up to 400kHz Fast-mode data transfer rate. 2-1 Slave address

Two device addresses (Slave address) can be selected by ADR port.

ADR=0 ADR=1

A7 A6 A5 A4 A3 A2 A1 R/W

0 0 0 1 0 0 1 0 0 0 1 1 1 0

2-2 Data transfer

One bit of data is transferred during SCL = “1”. During the bit transfer SCL = “1” cycle, the signal SDA should

keep the value. If SDA changes during SCL = “1”, a START condition or STOP condition occur and it is interpreted as a control signal.

SDA

SCL

Data is valid

when SDA is

stable

SDA is

variable

1/0

Fig.5 Data transfer

2-3 START-STOP-Repeated START conditions

When SDA and SCL are “1”, the data isn’t transferred on the 2-wire bus. If SCL remains “1” and SDA transfers from “1” to “0”, it means a “Start condition” is occurred and access is started. If SCL remains “1” and SDA transfers from “0” to “1”, it means a “Stop condition” is occurred and access is stopped. It becomes repeated START condition (Sr) the START condition enters again although the STOP condition is not done.

SDA

SCL

START Condition Repeated START Condition

S Sr

P

STOP Condition

Fig.6 START-STOP-Repeated START conditions

www.rohm.com

6/17

2009.09 - Rev.A

BU1850MUV

Technical Note

2-4 Acknowledge

After start condition is occurred, 8 bits data will be transferred. SDA is latched by the rising edge of SCL.

Then the “Master” opens SDA to “1” and “Slave” de-asserts SDA to “0” as an “Acknowledge” returned.

Fig.7 Acknowledge

2-5 Writing protocol

Register address is transferred after one byte of slave address with R/W bit. The 3 register which defined by the 2

nd

byte. However, when the register address increased to the final address (13h), it

rd

byte data is written to internal

will be reset to (00h) after the byte transfer.

S A A A P

R/W=0(write)

Transmit from master

Transmit from slave

D7D6D 5 D4 D3D2D1 D0 D7D6D5D4D3D2D1D0X X X A4A3A2A1A0XXXX XX 0X

A=acknowledge A

=not acknowledge S=Start condition P=Stop condition

data

A

Register address

increment

dataRegister addressSlave address

Register address

Fig.8 Writing protocol

increment

www.rohm.com

7/17

2009.09 - Rev.A

BU1850MUV

Technical Note

2-6 Reading protocol

After Writing the slave address and Read/Write commend bits, the next byte is read. The reading register address is next of previous accessed address. Therefore, the data is read with a ddress increment. When the address in increased to the last, the following read address will be reset to (00h).

Fig.9 Readout protocol

2-7 Complex reading protocol After the specifying the internal register address, a repeated START condition occurs and the direction of data transfer is changed then reading access is done. Therefore, the data is read followed by address increment. If the address is increased to the last, it will be reset to (00h).

S A A A

XXXX XX 0X

Slave address

R/W=0(write)

X X X A4A3A2 A1A0

Register address

Sr 1

XXXX XXX

Slave address

R/W=1(read)

D7D6D5D4D3D2D1D0

data

Transmit from master

Transmit from slave

A

Register address

increment

D7D6D5 D4D3D2D1D0 A

A=acknowledge

=not aclnowledge

A S=Start condition P=Stop condition Sr=Repeated Start condition

Fig.10 Complex reading protocol

2-8 Illegal access of I

2

C

The data accessed at that time is annulled, and access it again.

The illegal accesses are as follows.

 The START condition and the STOP condition are continuously generated.  When the Slave address and the R/W bit is written, repeated START condition and the STOP

condition are generated.

 Repeated START condition and the STOP condition are generated while writing data.

data

P

Register address

increment

www.rohm.com

8/17

2009.09 - Rev.A

BU1850MUV

3. Register configuration

The address is increased one by one when data is continuously writt en.

When the final address is set to 13h, then the next address 00h will be written.

By making XRST “Low”, the setting register value will be initialed shown in following register map.

3-1 Register map

Addr Init Type D7 D6 D5 D4 D3 D2 D1 D0

Technical Note

00h - 01h - 02h - 03h - 04h 00h R/W 05h - 06h - 07h - 08h 00h R/W 09h - 0Ah - 0Bh - 0Ch - 0Dh - 0Eh - 0Fh - 10h 00h R

reserved reserved reserved reserved reserved reserved reserved reserved

RESET reserved reserved reserved reserved reserved reserved reserved

reserved reserved reserved reserved reserved reserved reserved reserved

INTEN7 INTEN6 INTEN5 INTEN4 INTEN3 INTEN2 INTEN1 INTEN0

reserved reserved reserved reserved reserved reserved reserved reserved

GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0

11h 00h R/W 12h 00h R/W 13h 00h R/W

※ Do not write reserved resisters excluding "0". 10h address register is disregarded even if it is written.

GPO7 GPO6 GPO5 GPO4 GPO3 GPO2 GPO1 GPO0

WRSEL7 WRSEL6 WRSEL5 WRSEL4 WRSEL3 WRSEL2 WRSEL1 WRSEL0

XPD7 XPD6 XPD5 XPD4 XPD3 XPD2 XPD1 XPD0

3-2 Resister function

※ n is the number of GPIO[7:0] ports.

Symbol Addr Description RESET 04h

INTENn 08h Interrupt of GPIOn port is enabled by "1". It is masked by "0".

GPIn 10h Read GPIOn port. Writing is disregarded.

GPOn 11h Output value of GPIOn port.

WRSELn 12h GPIOn port is input by "0" and output by "1".

XPDn 13h Pull-down of GPIOn port is on by "0" and off by "1". GPIOn should be input.

The register is returned to an initial value by writing "1". This register value is returned to "0". GPIn register is not initialized.

www.rohm.com

9/17

2009.09 - Rev.A

BU1850MUV

Technical Note

4. GPIO-Interrupt 4-1 GPIO configuration

As the default value, GPIO[7:0] ports are input and Pull-down.

At this time, WRSELn is "0" and XPDn is "0". (n is the number of GPIO[7:0] ports.)

Refer to the following for the configuration of GPIO.

Register

State of GPIO

GPOn WRSELn XPDn

Input, Pull-down ON * 0 0

Input, Pull-down OFF * 0 1

Output, H drive 1 1 *

Output, L drive 0 1 *

1

Output, Hi-Z -1

1

※

Make external Pull-up the terminal potential which is the potential of V

※

0 0 1

or more.

VDDIO

 About GPIO port not used

When making it to the output, open it.

When making it to the input, do not open it. It is forced by "0" or Pull-down on. When interrupt is enabled, mask INTEN register in which the port is not used to "0".

4-2 Interrupt configuration

When interrupt is generated, L is output from XINT port. The default value is Hi-Z. Make it Pull-up.

For the default value, interrupt is masked with INTEN register "0".

The bit to be used is made "1", and the mask is released. WRSEL register should be "0"(input).

4-3 Write to GPIO port

After setting the internal register address, the data from master is written from MSB. After Acknowledge is returned, the value of each GPIO port will be changed. When the register is written, Write Config uration Pulse is generated according to the timing of Acknowledge.

SCL

SDA

Write Configuration

Pulse

GPIO[7:0]

123456789SCL

SDA

S X X X X X X X 0 Ack AckReg AddressMSB LSB AckData1 (GPO[7:0])MSB LSB P

Acknowledge From Slave

Stop Condition

tDV

Data1 Valid

Write Configuration

Pulse

GPIO[7:0]

Start Condition

Write Acknowledge From Slave

123456789

S X X X X X X X 0 Ack AckReg AddressMSB LSB AckData1 (GPO[7:0])MSB LSB AckWRSEL = Write ModeMSB LSB P

Start Condition

Write Acknowledge From Slave

Acknowledge From Slave

Stop Condition

tDV

Fig.11 Write to GPIO port

Data1

Valid

www.rohm.com

10/17

2009.09 - Rev.A

BU1850MUV

Technical Note

4-4 Read from GPIO port

After writing of the Slave address and R/W bits, reading GPIO port is begun from the following byte. The data that had been being fixed between the following Acknowledge after Acknowledge is taken into the GPI register, and it is transmitted to Master.

All ports that are the input by WRSEL register are read to the GPI register according to the timing of Read Configuration Pulse. Therefore, the data of each bit that SDA transmits is the GPI register value taken immediately before that.

SCL

SDA

Read Configuration

Pulse

GPI[7:0] Reg

GPIO[7:0]

123456789

S X X X X X X X 1 Ack

Start Condition

Read

tDS

D1 [7]D1[6]D1[5]

Acknowledge From Slave

D1

tDH

D1 [4]D2[3]D2[2]D2[1]D2[0]

D2

tDS

P

NA

Stop Condition

No Acknowledge From Mast er

tDH

Fig.12 Read from GPIO port

4-5 Interrupt Valid/Reset

If GPIO port becomes different from the GPIn register (default is "0"), XINT port is changed from "1" into "0". It becomes "1" to release "0" of XINT port after acknowledge by reading GPI register. Because the value of GPIO port is reflected in the output as it is and is not latched, XINT becomes "1" again if the port returns to the same value.

If the ports with INTEN register "1" are different even by one, XINT becomes "0". If it is distinguished which GPIO port changes, it is necessary to keep the GPI register value on the master side and compare with the value that is read after XINT is asserted.

SCL

SDA

GPIOn

XINT

123456789

S X X X X X X X 1 Ack NA

Start Condition

Data1 Data2

Data1 Data2GPIn Reg

Read Acknowledge From Slave

Data2 (GPI[7:0])MSB LSB

tIV tIR

Fig.13 Interrupt Valid/Reset

P

Stop Condition

No Acknowledge From Master

tIV tIR

Data3 Data2

www.rohm.com

11/17

2009.09 - Rev.A

BU1850MUV

●Electrical Specification

1. DC characteristics V

=1.8V，V

VDD

VDDIO

Technical Note

=1.8V，Topr=25℃

Parameter Symbol

Specification

Min Typ Max

Input H Voltage1 VIH1

0.7xV

Input L Voltage1 VIL1 -0.2 -

Input H Voltage2 VIH2

0.7xV

Input L Voltage2 VIL2 -0.2 -

Input H Voltage3 VIH3 Input H Current1

(3V Tolerant)

I

IH

0.7xV

1 -1 - 1

VDDIO

VDD

- 3.6 V

0.3xV

VDDIO

- 3.6 V SCL, SDA,

0.3xV

VDD

V

-

VDD

+0.2

Input H Current2 IIH2 -1 - 1

Input L Current IIL -1 - 1

Output H Voltage1 VOH1

Output L Voltage1 VOL1 - -

Output H Voltage2 VOH2

0.75xV

V

VDDIO

-0.25

- - V IOH=-2mA, GPIO[7:0]

0.25xV

VDDIO

- - V IOH=-0.2mA, GPIO[7:0]

Unit Conditions

GPIO[7:0]

V

V SCL, SDA, XRST, ADR

V XRST, ADR

=3.6V*1

A

V

IN

V

=1.8V, XRST,ADR

IN

=0V*1, XRST ,ADR

V

IN

V IOL=2mA, GPIO[7:0]

Output L Voltage2 VOL2 - -

Output L Voltage3 VOL3 - -

*1 XINT(Hi-Z), XRST, SCL, SDA(IN), ADR, GPIO[7:0](IN, Pull-down OFF)

2. Circuit Current

V

=1.8V，V

VDD

=1.8V，Topr=25℃

VDDIO

Specification

Parameter Symbol

Min Typ Max

Power Down Current

(VDD)

Power Down Current

(VDDIO)

Standby Current

(VDD)

Standby Current

(VDDIO)

Operating Current1 (VDD)

*1 All GPIO ports are output, and they repeat 01010101 and 10101010. *2 The period when I

2

C did not operate was inserted in *1 pattern by 99%.

1 - - 1.0

I

PD

I

2 - - 1.0

PD

1 - - 3.0

I

STBY

I

2 - - 1.0

STBY

1 - 14 25

I

OP

I

2 - 2 8

OP

0.25

0.3

V IOL=0.2mA, GPIO[7:0]

V IOL=3mA, SDA, XINT

Unit Condition

A

XRST=VSS

XRST=VDD, SCL=VDD, SDA=VDD

2

I

C 400kHz

100% traffic density

2

I

C 400kHz

1% traffic density

*1

*2

www.rohm.com

12/17

2009.09 - Rev.A

BU1850MUV

3. I2C AC characteristics

State

SCL

SDA

（Repeated）

START

tSU;STA

BIT 7 BIT 6 Ack STOP

1/fSCLK

tHIGH

tLOW

Technical Note

tBUF

V

=1.8V，V

VDD

=1.8V，Topr=25℃

VDDIO

Parameter Symbol

SCL Clock Frequency f

Bus free time t

(Repeated)START Condition Setup Time

(Repeated)START Condition Hold Time

SCL Low Time t

SCL High Time t

Data Setup Time t

tHD;STA

tSU;DAT

tHD;DAT

tSU;STO

Fig.14 I2C AC Timing

Specification

Unit Conditions

Min Typ Max

- - 400 kHz

SCLK

1.3 - -

BUF

0.6 - -

t

SU;STA

0.6 - -

t

HD;STA

1.3 - -

LOW

0.6 - -

HIGH

100 - -

SU;DAT

s

Data Hold Time t

STOP Condition Setup Time t

0 - - ns

HD;DAT

0.6 - -

SU;STO

s

www.rohm.com

13/17

2009.09 - Rev.A

BU1850MUV

4. GPIO AC Characteristics

SCL

GPIO[7:0](Output)

GPIO[7:0](Input)

XINT

V

=1.8V，V

VDD

=1.8V，Topr=25℃

VDDIO

Parameter Symbol

AckState BIT 0BIT 1

tDV

tDS tDH

tIV tIR

Fig.15 GPIO AC timing

Specification

Min Typ Max

Technical Note

AckBIT 0BIT 1

Unit Conditions

Output Data Valid Time tDV - - 0.8

Input Data Setup Time tDS 100 - - ns

Input Data Hold Time tDH 0.8 - -

Interrupt Valid Time tIV - - 5

Interrupt Reset Time tIR - - 5

s

See Fig.11

See Fig.12

See Fig.13

www.rohm.com

14/17

2009.09 - Rev.A

BU1850MUV

5. Startup sequence

VDD,

VDDIO

XRST

SCL

Technical Note

t

VDD

t

RWAIT

t

VDD

t

I2CWAIT

RV

t

I2CWAIT

t

VDD

t

VDD

t

RWAIT

SDA

Fig.16 Start Sequence timing

V

VDD

=1.8V，V

=1.8V，Topr=25℃

VDDIO

Specification

Parameter Symbol

Unit Conditions

Min Typ Max

VDD Stable Time t

Reset Wait Time t

Reset Valid Time tRV 10 - -

I2C Wait Time t

*1 Even if XRST port is not used, it operates because Power On Reset is built in.

- - 5 ms

VDD

0 - -

RWAIT

s

10 - -

I2CWAIT

s

VDD and VDDIO are ON at the same time.

*1

XRST controlling

In this case, connect XRST port with VDD on the set PCB.

Note) At VDD=0V, when SCL port is changed from 0V to 0.5V or more, SCL port pulls the current. It is same in SDA, XINT,

and GPIO[7:0] ports of 3V tolerant I/O. (VDDIO=0V in case of GPIO[7:0] ports)

VDD

0V 3V

Port

(2kΩ Pull-Up)

0V

0.1～1mA

Port

Pull Current

2～3ms

Fig.17 Port operating at VDD=0V

www.rohm.com

15/17

2009.09 - Rev.A

BU1850MUV

●Application circuit example

MPU

IN XINT

SCL

SDA

1.8V

0.1uF

VDD

XRST

ADR ADR

SCL

SDA

BU1850MUV

0.1uF

VSS

GPIO7

GPIO6

GPIO5

GPIO4

GPIO3

GPIO2

GPIO1

GPIO0

3.0V

VDDIO

XINT

SCL

SDA

1.8V

Technical Note

0.1uF

VSS

VDD

XRST

BU1850MUV

VDDIO

GPIO7

GPIO6

GPIO5

GPIO4

GPIO3

GPIO2

GPIO1

GPIO0

Other I2C Devices

Fig.18 Application circuit example

www.rohm.com

16/17

2009.09 - Rev.A

BU1850MUV

●Ordering part number

B U 1 8 5 0 M U V - E 2

Part No.

VQFN016V3030

1.0MAX

0.08 S C0.2

0.4±0.1

0.75

16

13

3.0±0.1

1PIN MARK

1.4±0.1

1

12 9

Part No.

0.5

4

5

8

+0.05

0.25

–0.04

3.0±0.1

+0.03

0.02

–0.02

1.4±0.1

(0.22)

S

(Unit : mm)

Package

MUV: VQFN016V3030

Embossed carrier tapeTape

Quantity

Direction of feed

3000pcs E2

The direction is the 1pin of product is at the upper left when you hold

()

reel on the left hand and you pull out the tape on the right hand

Reel

1pin

Packaging and forming specification E2: Embossed tape and reel

Order quantity needs to be multiple of the minimum quantity.

∗

Technical Note

Direction of feed

www.rohm.com

17/17

2009.09 - Rev.A

Notes

No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd.

The content specied herein is subject to change for improvement without notice.

The content specied herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specications, which can be obtained from ROHM upon request.

Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production.

Great care was taken in ensuring the accuracy of the information specied in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage.

The technical information specied herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other par ties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information.

Notice

The Products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, communication devices, electronic appliances and amusement devices).

The Products specied in this document are not designed to be radiation tolerant.

While ROHM always makes ef forts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons.

Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any Product, such as derating, redundancy, re control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual.

The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing.

If you intend to export or ship overseas any Product or technology specied herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.

Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us.

ROHM Customer Support System

http://www.rohm.com/contact/

R0039

A

Datasheet BU1850MUV Datasheet (ROHM)

Specifications and Main Features

Frequently Asked Questions

User Manual