ROHM BD3816K1, BD3817KS Technical data

Sound Processors for Home Theater Systems
6.1ch Sound Processor
BD3816K1,BD3817KS
Description
The BD3816K1 and BD3817KS are 6.1ch sound processors. Functions required for applications, such as AV receivers and home theater systems, are integrated into a single chip. A wide dynamic range of 132dB is achieved by utilizing the BiCMOS process.
Features
1) Dynamic range: 132dB (Volume Direct Mode, VOL=MUTE, IHF-A)
2) Independent 7 channels for Master Volume (0 to -95 dB, MUTE 1dB/Step)
3) Supporting 2
4) Low current consumption design achieved by adopting the Bi-CMOS process.
5) Maximum output voltage: 4.2Vrms (VCC=7V, VEE=-7V, RL=10k).
6) Built-in Input Gain Amp useful for amplifying input signals (0-7dB, 1dB/Step).
7) Built-in Output Gain Amp useful for adjusting output signal voltages (0-17dB, 1dB/Step)
8) Built-in mixing circuit for distributing the output signals from Center and Subwoofer channel to Front R/L channels (0, -3, -4.5dB).
9) 2ch Volume control BD3812F or 6ch Function Switch BD3843FS can be controlled simultaneously by the serial control bus.
10) REC A output terminal with a REC input/output switch useful for monitoring Equalizer Amp. (For BD3816K1, available as an input function of the seventh line.)
11) Output mute controlled by either serial data or an external control terminal.
12) 2-wire serial control (For both 3.3V and 5V)
Applications
AV receivers, home theater systems, and mini-audio systems.
Line up matrix
nd
room entertainment/2nd source recording.
No.10081EAT06
Parameter BD3816K1 BD3817KS
6(+1) inputs
Number of Input Selectors
Input Gain 0 ~ 7dB 1dB/step 0 ~ 7dB 1dB/step
Volume 0 ~ -95dB 1dB/step7ch 0 ~ -95dB 1dB/step7ch
Bass, Treble ±14dB 2dB/step ±14dB 2dB/step
Output Gain 0 ~ 17dB 1dB/step 0 ~ 17dB 1dB/step
Mix i n g Yes Yes
Package QFP80 SQFP100
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ROUTA terminal: available as an input selector of the seventh line
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2010.06 - Rev.A
BD3816K1,BD3817KS
Absolute maximum ratings (Ta=25)
Parameter Symbol Ratings Unit
Technical Note
Power Supply Voltage
Power Dissipation Pd
VCC 7.5 *1
VEE -7.5
1200 (BD3816K1)
1300 (BD3817KS)
*2 mW
Operating Temperature Range Topr -20 ~ +75
Storage Temperature Range Tstg -55 ~ +125
*1 Even in the specified range of Power Supply Voltage, applying voltage only to the VCC side may cause an excessive current to give a permanent damage to the IC. When starting up power supplies, VEE and VCC should be powered on simultaneously or VEE first; then followed by VCC. *2 Reduced by 12 mW/ over 25 (BD3816K1), when installed on the standard board (size: 70x70x1.6mm). Reduced by 13 mW/ over 25 (BD3817KS), when installed on the standard board (size: 70x70x1.6mm)
Operating conditions
Must function normally at Ta=25C.
Parameter Symbol
Operating source voltage
Min. Typ. Max.
VCC 5.0 7.0 7.3
VEE -7.3 -7.0 -5.0
Ratings
Unit
Electrical characteristics
Ta =2 5, V
CC=7V, f=1kHz, Vin=1Vrms, RL=10k, Rg=600, Input Gain=0dB, Volume=0dB, Output Gain=0dB, Bass=0dB,
Treble=0dB, Mixing c/sw=OFF, unless otherwise noted.
Parameter Symbol
Min. Typ. Max.
Limits
Unit Conditions
V
V
Circuit Current
VCC
IQ
24 40 mA No signal
VEE -40 -24
Output Voltage Gain Gv -2 0 2 dB
Total Harmonic Distortion Ratio THD 0.001 0.03 % BW=400Hz-30kHz
Maximum Output Voltage Vomax 3.6 4.2 Vrms THD=1%
Rg=0Ω, BW=IHF-A (Output gain ON, Tone ON)
Rg=0Ω, BW=IHF-A (Output gain ON, Tone OFF)
Rg=0Ω, BW=IHF-A (*OM=Volume Direct)
Output Noise Voltage Vno
2.0 12 µVrms
1.5 8 µVrms
1.2 8 µVrms
Cross-talk between Channels CTC -95 -80 dB Rg=0Ω, BW=IHF-A
Cross-talk between Selectors CTS -95 -80 dB Rg=0Ω, BW=IHF-A
Volume Output Voltage GVV -2 0 2 dB
Volume Total Harmonic Distortion Ratio
THDV 0.001 0.03 % BW=400Hz-30kHz
Volume Output Noise Voltage VnoV 1.2 8 µVrms Rg=0Ω, BW=IHF-A
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2/17
2010.06 - Rev.A
BD3816K1,BD3817KS
Parameter Symbol
Volume Control Range VOL -97.5 -95 -92.5 dB
Volume Setting Error 1 VOLE1 -1.5 0 1.5 dB
Volume Setting Error 2 VOLE2 -2.5 0 2.5 dB
Maximum Attenuation VOLmin -115 -105 dB
Treble Maximum Boost Gain GTB 12 14 16 dB f=15kHz, Vin=0.4Vrms
Treble Maximum Cut Gain GTC -16 -14 -12 dB f=15kHz, Vin=0.4Vrms
Treble Step Resolution TR 2 dB f=15kHz, Vin=0.4Vrms
Treble Gain Setting Error TE -2 0 2 dB f=15kHz, Vin=0.4Vrms
Bass Maximum Boost Gain GBB 12 14 16 dB f=100Hz, Vin=0.4Vrms
Bass Maximum Cut Gain GBC -16 -14 -12 dB f=100Hz, Vin=0.4Vrms
Min. Typ. Max.
Limits
Unit Conditions
Vin=3Vrms *OM=Volume Direct
0 to -53dB, Vin=3Vrms *OM=Volume Direct
-54dB to -95dB, Vin=3Vrms *OM=Volume Direct
Vin=3Vrms, BW=IHF-A *OM=Volume Direct
Technical Note
Bass Step Resolution BR 2 dB f=100Hz, Vin=0.4Vrms
Bass Gain Setting Error BE -2 0 2 dB f=100Hz, Vin=0.4Vrms
C Mixing Gain Control Range GMCG -6.5 -4.5 -2.5 dB *OM=Volume Direct
C Mixing Gain Setting Error GMCE -2 0 2 dB *OM=Volume Direct
SW Mixing Gain Control Range
SW Mixing Gain Setting Error GMSWE -2 0 2 dB *OM=Volume Direct
Input Gain Control Range GIG 5 7 9 dB
Input Gain Setting Error GIE -2 0 2 dB
Output Gain Control Range GOG 15 17 19 dB
Output Gain Setting Error GOE -2 0 2 dB
ROUT Output Impedance RoutR 20 100 Ω
ROUT Voltage Gain GVR -2 0 2 dB RL=47kΩ
ROUT Total Harmonic Distortion Ratio
* OM:Output mode
GMSW
G
THDR 0.005 0.09 % RL=47kΩ, BW=400Hz-30kHz
-6.5 -4.5 -2.5 dB *OM=Volume Direct
Vin=0.4Vrms *OM=Volume Direct
Vin=0.4Vrms *OM=Volume Direct
Vin=0.4Vrms *OM=Output gain ON(Tone OFF)
Vin=0.4Vrms *OM=Output gain ON(Tone OFF)
* Note: This IC is not designed to be radiation-resistant.
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3/17
2010.06 - Rev.A
BD3816K1,BD3817KS
Timing chart
1) Signal Timing Cond itions
Data is read on the rising edge of the clock. Latch is read out on the falling edge of the clock. Latch signal must terminate with the LOW state.
* To avoid malfunctions, clock and data signals must terminate with the LOW state.
1byte=17bit
CL
CLOCK
DA
DATA
LATCH
90% 90% 90%
Parameter Symbol
90% 90% 90% 90%
tsu
twd
DATA
twc
10% 10% 10%
twc
thd thd th ts tsl thl tsd
twh
10%
Fig. 1
Min. Typ. Max.
DATA
Limits
90% 90%
twl
10% 10%
LATCH
Unit
Technical Note
Terminate with Low
Minimum Clock Width twc 1.0 µs
Minimum Data Width twd 1.0 µs
Minimum Latch Width twl 1.0 µs
LOW Hold Width twh 1.0 µs
Data Set-up Time (DATACLK) tsd 0.5 - µs
Data Hold Time (CLKDATA) thd 0.5 - µs
Latch Set-up Time (CLKLATCH) tsl 0.5 - µs
Latch Hold Time (DATALATCH) thl 0.5 - µs
Latch Low Set-up Time ts 0.5 µs
Latch Low Hold Time th 0.5 µs
2) Voltage Conditions for Control Signals
Parameter Condition
“H” Input Voltage
“L” Input Voltage 0 1.0 V
Vcc=5 ~ 7.3V V
EE=-5 ~ -7.3V
Limits
Min. Typ. Max. (≦Vcc)
2.2 5.5 V
Unit
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4/17
2010.06 - Rev.A
BD3816K1,BD3817KS
3) Control Data Format List
Data input Direction
MSB LSB
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Data
(1)BD3816K1 Control Data Formats
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Data
FRL select
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Data
Data
Data
Data
Data
Data
Data
By changing Select Address, eight different control formats are selectable.
At power-on sequence, initialize all data.
(Example)
REC A
mode select
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Input gain
FRLch
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Master volume
and Output gain
D16 D15 D14 D13 D12 D11 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Master volume
and Output gain
D16 D15 D14 D13 D12 D11 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Master volume
and Output gain
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Master volume
and Output gain
For Select Address, the values, except for those shown above, must not be specified.
Data input Direction
MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB
6.1ch
select
REC B REC C
Treble Bass
Input gain
SRLch
Input select 0 0 0 0 0 0
Output
mode select
SWch
FRch
SRch
Cch
Data Select Address
0 0 1 0 0 0
Mixing
Cch
Input gain
Cch
Input gain
SWch
Master volume
and Output gain
Master volume
and Output gain
Master volume
and Output gain
Mixing
SWch
Input gain
CBch
1 0 0 0 0
1 1 0 0 0
0 0 0 1
FLch 0 1 0
SLch 0 1 1
CBch 1 0 1
Technical Note
Select Address
Data L Data LData③ L Data④ LData⑤ LData L Data⑦ L Data⑧ L
“L” means latch.
After power-on, for the second and subsequent times, only the necessary data can be selected for setting.
Example: When changing the input gain in the example:
Data input Direction
MSB LSB
Data L
“L” means latch.
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5/17
2010.06 - Rev.A
BD3816K1,BD3817KS
(2)BD3817K1 Control Data Formats
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Data
FRL select
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Data
Data
Data
Data
Data
Data
Data
REC A
mode select
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
By changing Select Address, eight different control formats are selectable.
At power-on sequence, initialize all data.
Example:
MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB
Input gain
FRLch
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Master volume
and Output gain
D16 D15 D14 D13 D12 D11 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Master volume
and Output gain
D16 D15 D14 D13 D12 D11 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Master volume
and Output gain
D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Master volume
and Output gain
For Select Address, the values, except for those shown above, must not be specified.
Data input Direction
6.1ch select
REC B REC C
Treble Bass
Input gain
SRLch
Input select1 Input select2 0 0 0 0 0
Output
mode select
SWch
FRch
SRch
Cch
Input gain
Cch
Input gain
0 0 1 0 0 0
Mixing
Cch
SWch
Master volume
and Output gain
Master volume
and Output gain
Master volume
and Output gain
Mixing
SWch
Input gain
CBch
1 0 0 0 0
1 1 0 0 0
0 0 0 1
FLch 0 1 0
SLch 0 1 1
CBch 1 0 1
Technical Note
Select Address
Data L Data LData③ L Data④ LData⑤ LData L Data⑦ L Data⑧ L
“L” means latch.
After power-on, for the second and subsequent times, only the necessary data can be selected for setting.
Example: When changing the input gain in the example:
Data input Direction
MSB LSB
Data L
“L” means latch.
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6/17
2010.06 - Rev.A
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