ROHM BD35281HFN Technical data

A

High Performance Regulators for PCs

Nch FET Ultra LDO
for Desktop PCs

BD35281HFN

●Description

The BD35281HFN ultra low-dropout linear regulator operates from a very low input supply, and offers ideal performance in
low input voltage to low output voltage applications. It incorporates a built-in N-MOSFET power transistor to minimize the
input-to-output voltage differential to the ON resistance (R
the regulator realizes high current output (Iomax=1.5A) with reduced conversion loss, and thereby obviates the switching
regulator and its power transistor, choke coil, and rectifier diode. Thus, the BD35281HFN designed to enable significant
package profile downsizing and cost reduction. In BD35281HFN, The NRCS (soft start) function enables a controlled output
voltage ramp-up, which can be programmed to whatever power supply sequence is required.

●Features

1) Internal high-precision reference voltage circuit (0.65V±1%)

2) Internal high-precision output voltage circuit

3) Built-in V

4) NRCS (soft start) function reduces the magnitude of in-rush current

5) Internal Nch MOSFET driver offers low ON resistance (100mΩ typ)

6) Built-in short circuit protection (SCP)

7) Built-in current limit circuit (1.5A min)

8) Built-in thermal shutdown (TSD) circuit

9) Small package HSON8 : 2.9mm×3.0mm×0.6mm

10) Tracking function

●Applications

Notebook computers, Desktop computers, LCD-TV, DVD, Digital appliances

●Absolute maximum ratings (Ta=25℃)

undervoltage lockout circuit (VCC=3.80V)

CC

ON max=150mΩ) level. By lowering the dropout voltage in this way,

No.11030EAT38

Parameter Symbol Ratings Unit

Input Voltage 1 VCC +6.0 *1 V

Input Voltage 2 VIN +6.0 *1 V

Maximum Output Current IO 2*1 A

Enable Input Voltage VEN -0.3～+6.0 V

Power Dissipation 1 Pd1 0.63 *2 W

Power Dissipation 2 Pd2 1.35 *3 W

Power Dissipation 3 Pd3 1.75*4 W

Operating Temperature Range Topr -10～+100 ℃

Storage Temperature Range Tstg -55～+125 ℃

Maximum Junction Temperature Tjmax +150 ℃

*1 Should not exceed Pd.
*2 Reduced by 5.04mW/℃ for each increase in Ta≧25℃
(when mounted on a 70mm×70mm×1.6mm glass-epoxy board, 1-layer, copper foil area : less than 0.2%)
*3 Reduced by 10.8mW/℃ for each increase in Ta≧25℃
(when mounted on a 70mm×70mm×1.6mm glass-epoxy board, 1-layer, copper foil area : less than 7.0%)
*4 Reduced by 14.0mW/℃ for each increase in Ta≧25℃
(when mounted on a 70mm×70mm×1.6mm glass-epoxy board, 1-layer, copper foil area : less than 65.0%)

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2011.01 - Rev.

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BD35281HFN

●Operating Voltage (Ta=25℃)

Parameter Symbol

Ratings

Min. Max.

Unit

Input Voltage 1 VCC 4.3 5.5 V

Input Voltage 2 VIN 1.5 VCC-1 *5 V

Output Voltage Setting Range IO 1.2 (fixed) V

Enable Input Voltage VEN -0.3 5.5 V

NRCS Capacity CNRCS 0.001 1 µF

*5 VCC and VIN do not have to be implemented in the order listed.

★This product is not designed for use in radioactive environments.

●Electrical Characteristics (Unless otherwise specified, Ta=25℃, VCC=5V, VEN=3V, VIN=1.7V)

Parameter Symbol

Min. Typ. Max.

Limits

Unit Condition

Bias Current ICC - 0.7 1.2 mA

VCC Shutdown Mode Current IST - 0 10 µA VEN=0V

Output Voltage IO 1.5 - - A

Technical Note

Feedback Voltage 1 VOS1 1.188 1.200 1.212 V

Feedback Voltage 2 VOS2 1.176 1.200 1.224 V Tj=-10 to 100℃

Line Regulation 1 Reg.l1 - 0.1 0.5 %/V VCC=4.3V to 5.5V

Line Regulation 2 Reg.l2 - 0.1 0.5 %/V VIN=1.5V to 3.3V

Load Regulation Reg.L - 0.5 10 mV IO=0 to 1.5A

=1.5A,VIN=1.2V,

I

Output ON Resistance RON - 100 150 mΩ

Standby Discharge Current I

1 - - mA VEN=0V, VO=1V

DEN

O

Tj=-10 to 100℃

[ENABLE]

Enable Pin Input Voltage High EN

Enable Pin Input Voltage Low EN

2 - - V

HIGH

0 - 0.8 V

LOW

Enable Input Bias Current IEN - 7 10 µA VEN=3V

[NRCS]

NRCS Charge Current I

NRCS Standby Voltage V

12 20 28 µA

NRCS

- 0 50 mV VEN=0V

STB

[UVLO]

VCC Undervoltage Lockout
Threshold Voltage

VCC Undervoltage Lockout
Hysteresis Voltage

VIN Undervoltage Lockout
Threshold Voltage

VCCUVLO 3.5 3.8 4.1 V VCC:Sweep-up

V

HYS 100 160 220 mV VCC:Sweep-down

CC

UVLO 0.72 0.84 0.96 V VIN:Sweep-up

V

IN

[SCP]

SCP Start up Voltage V

SCP Threshold Voltage T

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VO×0.3 VO×0.4 VO×0.5 V

OSCP

45 90 200 µsec

SCP

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2011.01 - Rev.

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BD35281HFN

v

v

v

v

v

v

v

v

v

v

v

v

●Reference Data

Vo

66mV

50mV/di

Io

1A/di

2A

Fig.1 Transient Response

(0A→1.5A)

Co=100µF

cfb=1000pF

Vo

50mV/di

51mV

Io

1A/di

2A

Fig.4 Transient Response

(1.5A→0A)

Co=100µF

cfb=1000pF

Ven

VNRCS

Vo

Fig.7 Waveform at output start

V

CC

Ven

V

IN

Vo

Fig.10 Input sequence

T(10µsec/div)

T(100µsec/div)

T(200µsec/div)

VIN→VCC→Ven

Vo

2A/di

91mV

Io

2A

50mV/di

Fig.2 Transient Response

(0A→1.5A)

Co=47µF

cfb=1000pF

Vo

80mV

50mV/di

Io

2A

1A/di

Fig.5 Transient Response

(1.5A→0A)

Co=47µF

cfb=1000pF

Ven

VNRCS

Vo

Fig.8 Waveform at output OFF

Ven

V

IN

Vo

V

CC

Fig.11 Input sequence

T(10µsec/div)

T(100µsec/div)

T(200µsec/div)

Ven →VCC→V

Technical Note

Vo

50mV/di

108mV

Io

1A/di

Fig.3 Transient Response

Vo

1A/di

98mV

2A

Io

50mV/di

Fig.6 Transient Response

V

CC

Ven

V

IN

Vo

V

CC

Ven

V

IN

Vo

IN

Fig.12 Input sequence

2A

T(10µsec/div)

(0A→1.5A)

Co=22µF

cfb=1000pF

T(100µsec/div)

(1.5A→0A)

Co=22µF

cfb=1000pF

VCC→VIN→Ven

Fig.9 Input sequence

VCC→Ven →VIN

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2011.01 - Rev.

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BD35281HFN

●Reference Data

V

CC

Ven

V

IN

Vo

Fig.13 Input sequence

0.9

0.8

0.7

Icc [mA]

0.6

0.5

0.4

-50 -25 0 25 50 75 100 125 150
Tj [℃]

Fig.16 Tj-ICC

30

25

20

15

IINSTB [µ A]

10

5

0

-50 -25 0 25 50 75 100 125 150
Tj [℃]

Fig.19 Tj-IINSTB

150

130

110

90

RON [mO]

70

50

-50 -25 0 25 50 75 100 125 150

Tj [℃]

Fig.22 Tj-R

(Vcc=5V/Vo=1.2V)

V

→Ven →V

ON

V

CC

Ven

V

IN

Vo

Ven →VIN→V

Fig.14 Input sequence

2.0

1.8

1.6

IIN [m A]

1.4

1.2

1.0

-50 -25 0 25 50 75 100 125 150
Tj [℃]

Fig.17 Tj-IIN

20

19

18

17

16

15

14

INRCS [µA]

13

12

11

10

-50 -25 0 25 50 75 100 125 150

Tj [℃]

Fig.20 Tj-NRCS

135

RON [mO]

125

115

105

95

85

75

Vo=2 .5V

Vo=1 .8V

Vo=1 .5V

Vo=1 .2V

Vo=1 .0V

34 56 78

Vcc [V]

Fig.23 Vcc- R

ON

Technical Note

1.25

1.23

1.21

Vo [V]

1.19

1.17

CC

1.15

-50 -25 0 25 50 75 100 125 150
Tj [℃]

Fig.15 Tj-Vo (Io=0mA)

3.0

2.5

2.0

1.5

ISTB [µA]

1.0

0.5

0.0

-50 -25 0 25 50 75 100 125 150

Tj [℃]

Fig.18 Tj-ICCSTB

10

9

8

7

6

5

IEN [µ A]

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150

Tj [℃]

Fig.21 Tj-IEN

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2011.01 - Rev.

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BD35281HFN

●Block Diagram

VCC

V

CC

1

EN

2

Reference

Block

C1

V

CC

UVLO2

UVLO1

EN

UVLO1

VIN

UVLOLATCH

CL

VREF1

NRCS

VCC

NRCS0.3.

VREF1×0.4

FB

TSD

SCP/TSD

LATCH

EN
UVLO1

LATCH

CL
UVLO1
UVLO2
TSD
SCP

NRCS

C

3

NRCS

EN/UVLO

NRCS

●Pin Layout ●Pin Function

EN

V

CC

Current

Limit

VREF2

8

GND

R2

R1

R2

R1

Technical Note

VIN

4

V

O

5

6

V

OS

7

FB

VIN

C2

C

FB

V

C3

O

Vcc

EN

NRCS

VIN

PIN No.

6

1

8

GND

PIN name PIN Function

1 VCC Power Supply Pin

2 EN Enable Input Pin

2

FIN

7

FB

4 VIN Input Voltage Pin

3 NRCS

In-rush Current Protection (NRCS)
Capacitor Connection Pin

5 VO Output Voltage Pin

3

6

Vos

6 VOS Output Voltage Control Pin

4

5

Vo

7 FB Reference Voltage Feedback Pin

8 GND Ground Pin

- FIN Connected to heatsink and GND

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2011.01 - Rev.