ROHM BD3460FS Technical data

Sound Processors for Car Audios

General-Purpose Electronic Volume
with Built-in Advanced Switch

BD3460FS,BD3461FS,BD3464FV,BD3465FV

●Description

BD3460FS, BD3461FS, BD3464FV, BD3465FV is 4ch / 6ch electronic volume which has audio efficiency of the industry
best level. It has 『Outside sound mixing function (with volume)』(BD3461FS, BD3465FV) in favorite channel to mixing of
the portable telephone and car navigation’s guide sound. Also, which has 『Ground isolation amplifier』(BD3460FS,
BD3461FS) when connecting with the outside voice inputs such as portable audio and car navigation. It is lineup and
possible to be chosen to the use by it. Also, Rohm has the volume switching shock sound prevention technique “Advanced
switch”. Therefore, it supports the construct of the high quality car audio space by the simple control.

●Features

1) Reduce switching noise of volume by using advanced switch circuit. (Possible to control all steps)

2) Low distortion (0.0004% typ), Low noise (1.6μVrms)

3) Mixing for external sound monaural 3ch. It is possible that is mixed to front/Rear/Sub output (BD3461FS)
Front/Rear output (BD3465FV) Lch/Rch independently.

4) Built-in 3ch ATT for external sound mixing that can be controlled independently. (BD3461FS, BD3465FV)

5) Built-in buffered stereo ground isolation amplifier inputs, ideal for external input. (BD3460FS, BD3461FS)

6) Bi-CMOS process is suitable for the design of low current and low energy. And it provides more quality
for small scale regulator and heat in a set.

7) Package is SSOP-A24,SSOP-B20. Putting input-terminals together and output-terminals together can make
PCB layout easier and can makes area of PCB smaller.

8) It is possible to control by 3.3V / 5V for I

●Applications

It is the optimal for the car audio. Besides, it is possible to use for the car navigation, audio equipment of mini Compo, micro
Compo, DVD, TV etc with all kinds.

●Line up matrix

Function BD3460FS BD3461FS BD3464FV BD3465FV

Volume 6ch 6ch 4ch 4ch
Input for external sound mixing - ○ - ○
GND isolation amplifier ○ ○ - -

Package SSOP-A24 SSOP-A24 SSOP-B20 SSOP-B20

2

C BUS.

No.11085EBT09

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2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

●Absolute maximum ratings (Ta=25℃)

Parameter Symbol Ratings Unit

Power supply Voltage VCC 10.0V V

Input voltage VIN VCC+0.3 ~ GND-0.3 V

Technical Note

Power Dissipation

BD3460FS
BD3461FS

BD3464FV
BD3465FV

Pd

1000

810

1

※

2

※

Storage Temperature Tastg -55 ~ +150 ℃

※1 This value decreases 8mW/℃ for Ta=25℃ or more. Thermal resistance θja=125.0 (℃/W)
※2 This value decreases 6.5mW/℃ for Ta=25℃ or more. Thermal resistance θja=153.8 (℃/W)

ROHM standard board shall be mounted.
ROHM Standard board Size：70×70×1.6(㎣)
material：FR4 grass epoxy board(3% or less of copper foil area)

●Operating conditions

Parameter Symbol

Min. Typ Max.

Ratings

Power supply Voltage VCC 7.0 - 9.5 V

Temperature Topr -40 - +85 ℃

mW

Unit

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2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

Technical Note

●Electrical characteristics
Unless specified particularly, Ta=25℃, VCC=8.5V, f=1kHz, Vin=1Vrms, Rg=600Ω, RL=10kΩ, INF1 input, Volume 0dB

Limit

BLOCK

Parameter Symbol

Min. Typ. Max.

Unit Condition

Current upon no signal IQ － 25 40 mA No signal

Voltage gain GV -1.5 0 1.5 dB Gv=20log(VOUT/VIN)

Channel balance CB -1.5 0 1.5 dB CB=GV1-GV2

Total harmonic distortion TH D － 0.0004 0.05 %

Output noise voltage ＊ VNO － 1.9 10 μVrms

GENERAL

Residual output noise voltage ＊ VNOR － 1.6 10 μVrms

Cross-talk between channels ＊ CTC － -105 -90 dB

Ripple rejection RR － -80 -40 THD

Input impedance R

70 100 130 kΩ

IN D

DIFF

Common mode rejection ratio ＊ CMRR 50 65 － dB

BD3461FS)

(BD3460FS,

Input impedance R

70 100 130 kΩ

IN V

Maximum input voltage VIM 2 2.35 － Vrms

Maximum gain GV

Maximum attenuation ＊ G

Step resolution GV

21 23 25 dB

BST

－ -109 -90 dB

V MIN

STEP

－ 1 － dB GAIN&ATT=+23～-79dB

VOUT=1Vrms
BW=400-30kHz

Rg=0Ω
BW=IHF-A

Volum e=-∞dB
Rg=0Ω
BW=IHF-A
Rg=0Ω
CTC=20log(VOUT/VIN)
BW=IHF-A
f=100Hz
VRR=100mVrms
RR=20log(VOUT/VCCIN)

PIN and NIN input
CMRR=20log10(VIN/VOUT)
BW=IHF-A

VIM at THD+N(VOUT)=1%
BW=400-30kHz

Gain=23dB
VIN=100mVrms
G

=20log(VOUT/VIN)

V

Volum e=-∞dB
Gv=20log(VOUT/VIN)
BW=IHF-A

Gain set error GV

VOLUME

Attenuation set error 1 G

Attenuation set error 2 G

Attenuation set error 3 G

Output impedance R

Maximum output voltage VOM 2 2.35 － Vrms

Input impedance R

Maximum attenuation ＊ G

Step resolution 1 GM

BD3465FS)

(BD3461FS,

MIXING ATT

Step resolution 2 GM

VP-9690A(Average value detection, effective value display) filter by Matsushita Communication is used for ＊ measurement.
Phase between input / output is same.

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-2 0 2 dB

ERR

V ERR1

V ERR2

V ERR3

OUT

IN M

M MIN

STEP1

STEP2

-2 0 2 dB

-3 0 3 dB

-4 0 4 dB

- － 50 Ω

70 100 130 kΩ

－ -90 － dB

－ 8 － dB ATT=0～-32dB

－ 16 － dB ATT=-32～-64dB

Gain=+1～+23dB

ATT=-1～-15dB

ATT=-16～-47dB

ATT=-48～-79dB

Vin=100mVrms

THD+N=1%
BW=400-30kHz

GM=20log(VOUT/VIN)
BW=IHF-A, ATT=-∞dB

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

]

]

]

]

]

]

]

]

●Electrical characteristic curves (Reference data)

50

40

30

20

10

QUIESCENT CURRENT:IQ[mA]

0

0246810

SUPPLY VOLTAGE : VCC[V

Fig.1 Iq vs Vcc

10

1

0.1

0.01

0.001

0.0001

TOTAL HARMONIC DISTORTION:THD+N[%]

0.001 0.01 0.1 1 10

OUTPUT VOLTAGE : Vo[Vrms

30

25

20

15

10

5

VOLUME GAIN : Gv[dB]

0

-5
10 100 1k 10k 100k

FREQUENCY :f [Hz]

Fig.4 Volume Gain vs Freq

(0～+23dB)

0

-20

-40

-60

-80

-100

-120
10 100 1k 10k 100k

CROSS-TALK BETWEEN CHANNELS:CTC[dB]

FREQUENCY :f [Hz]

Fig.7 Cross-Talk vs Freq

2
1
0

-1

-2

-3

-4

VCC=8.5V
Vo= 2Vrm s

-5

Vol ume= 0dB

-6

-7

VOLTAGE GAIN:Gv[dB]

-8

-9

-10

10 100 1k 10k 100k 1000k

FREQUENCY :f [Hz]

5

0

-5

-10

-15

-20

-25

-30

-35

-40

VOLUME ATTENUATION:ATT[dB]

-45
10 100 1k 10k 100k

Fig.5 Volume Gain vs freq 1

(0～-40dB)

0

-20

-40

-60

-80

RIPPLE REJECTION :RR[dB]

-100
10 100 1k 10k 100k

Fig.8 Ripple Rejection Ratio

1

0.1

0.01

0.001

0.0001
10 100 1k 10k 100k

TOTAL HARMONIC DISTORTION:THD+N[dB]

Fig.10 Volume gain of large

output level vs freq

Fig.11 Thd vs freq

Fig.2 Thd vs Vo

FREQUENCY :f [Hz

FREQUENCY :f [Hz]

FREQUENCY :f [Hz

Technical Note

5

4

3

2

1

0

-1

-2

VOLTAGE GAIN : Gv[dB]

-3

-4

-5
10 100 1k 10k 100k

Fig.3 Gain vs Freq

-30

-40

-50

-60

-70

-80

-90

-100

VO LUM E ATTE NUAT ION: ATT [dB]

-110
10 100 1k 10k 100k

Fig.6 Volume Gain vs freq 2

100

10

OUTPUT NOISE :VNO[μVrms]

1

-40 -30 -20 -10 0 10

VOLUME ATTENUATION :ATT [dB

Fig.9 Volume Gain vs Noise

0

-10

-20

-30

-40

-50

-60

-70

-80
10 100 1k 10k 100k

COMMON MODE REJECTION RATIO:CMRR[dB]

Fig.12 CMRR vs freq

(BD3460FS, BD3461FS)

Gain=0dB

FREQUENCY :f [Hz

FREQUENCY :f [Hz

(-41～-79dB)

FREQUENCY :f [Hz

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

]

●Electrical characteristic curves (Reference data) – Continued

2.5

2.0

1.5

1.0

0.5

OUTF1

OUTF2

MAXIMUM OUTPUT VOLTAGE: VO[Vrms]

0.0
100 1000 10000 100000

LOAD RESISTANCE : RL[Ω

Fig.13 Rload vs Vo

Fig.14 Advanced Switch 1

20

0

-20

-40

-60

-80

-100

MIXING ATTENUATION:ATT[dB]

10 100 1k 10k 100k

FREQUENCY :f [Hz]

Fig.16 Mixing attenuation vs freq

(BD3461FS, BD3465FV)

Technical Note

Fig.15 Advanced Switch 2

OUTF1

OUTF2

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2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

●Block diagram and pin configuration

24 23

VCC/2

GND

22 21 20 19 18 17 16 15 14 13

VCC

I2C BUS LOGIC

■6ch Volume
+23dB～-79ｄB/1dB step,-∞
★：Advanced switch circuit

Volume★

Volume★

Volume★

Volume★

Volume★

Volume★

BUFFERED

GND ISO AMP

BUFFERED

GND ISO AMP

100k

1 2

100k 100k

3 4 5 6 7 8 9 10 11 12

100k

100k 100k

100k 100k

100k

Fig.17 BD3460FS

Descriptions of terminal

Terminal

Terminal

No.

Name

1 INF1

2 INF2

3 INR1

4 INR2

5 INS1

6 INS2

7 PIN2

8 NIN2

9 DIFFOUT2

10 DIFFOUT1

11 NIN1

12 PIN1

Description

Front input terminal of 1ch

Front input terminal of 2ch

Rear input terminal of 1ch

Rear input terminal of 2ch

Subwoofer input terminal of 1ch

Subwoofer input terminal of 2ch

DIFF amp positive input terminal of 2ch

DIFF amp negative input terminal of 2ch

DIFF amp output terminal of 2ch

DIFF amp output terminal of 1ch

DIFF amp negative input terminal of 1ch

DIFF amp positive input terminal of 1ch

Terminal

No.

Terminal

Name

13 OUTS2

14 OUTS1

15 OUTR2

16 OUTR1

17 OUTF2

18 OUTF1

19 VCC

20 CS

21 SCL

22 SDA

23 GND

24 FIL

Description

Subwoofer output terminal of 2ch

Subwoofer output terminal of 1ch

Rear output terminal of 2ch

Rear output terminal of 1ch

Front output terminal of 2ch

Front output terminal of 1ch

Power supply terminal

Chip select terminal

I2C Communication clock terminal

2

C Communication data terminal

I

GND terminal

VCC/2 terminal

Technical Note

100k

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2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

24 23

22 21 20 19 18 17 16 15 14 13

VCC/2

GND

I2C BUS LOGIC

■6ch Volume
+23dB～-79ｄB/1dB step,-∞
★：Advanced switch circuit

■Mixing ATT
0dB～-32dB/8dB step,

-32dB～-64dB/16dB step,-∞

Independent
control

100k

100k 100k

100k

100k 100k

1 2

3 4 5 6 7 8 9 10 11 12

Fig.18 BD3461FS

Descriptions of terminal

Terminal

Terminal

No.

Name

1 INF1

2 INF2

3 INR1

4 INR2

5 INS1

6 INS2

7 EXT1

8 EXT2

9 EXT3

10 DIFFOUT

11 NIN

12 PIN

Description

Front input terminal of 1ch

Front input terminal of 2ch

Rear input terminal of 1ch

Rear input terminal of 2ch

Subwoofer input terminal of 1ch

Subwoofer input terminal of 2ch

External input terminal of 1ch

External input terminal of 2ch

External input terminal of 3ch

DIFF amp output terminal

DIFF amp negative input terminal

DIFF amp positive input terminal

VCC

100k

Terminal

No.

13 OUTS2

14 OUTS1

15 OUTR2

16 OUTR1

17 OUTF2

18 OUTF1

19 VCC

20 CS

21 SCL

22 SDA

23 GND

24 FIL

100k 100k

Terminal

Name

Technical Note

BUFFERED

GND ISO AMP

100k

100k

Description

Subwoofer output terminal of 2ch

Subwoofer output terminal of 1ch

Rear output terminal of 2ch

Rear output terminal of 1ch

Front output terminal of 2ch

Front output terminal of 1ch

Power supply terminal

Chip select terminal

2

I

C Communication clock terminal

2

I

C Communication data terminal

GND terminal

VCC/2 terminal

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2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

20 19

VCC/2

GND

18 17 16 15 14 13 12 11

VCC

I2C BUS LOGIC

■4ch Volume
+23dB～-79ｄB/1dB step,-∞
★：Advanced switch circuit

Volume★

Volume★

Volume★

Volume★

100k

100k

100k 100k

1 2

3 4 5 6 7 8 9 10

Fig.19 BD3464FV

Descriptions of terminal

Termina

l No.

Terminal

Name

Description

Terminal

No.

Terminal

Name

Description

1 INF1 Front input terminal of 1ch 11 OUTR2 Rear output terminal of 2ch

2 INF2 Front input terminal of 2ch 12 OUTR1 Rear output terminal of 1ch

3 INR1 Rear input terminal of 1ch 13 OUTF2 Front output terminal of 2ch

4 INR2 Rear input terminal of 2ch 14 OUTF1 Front output terminal of 1ch

5 NC 15 VCC Power supply terminal

6 NC 16 CS Chip select terminal

7 TEST1 Test Pin 17 SCL I2C Communication clock terminal

8 TEST2 Test Pin 18 SDA I2C Communication data terminal

9 TEST3 Test Pin 19 GND GND terminal

10 NC 20 FIL VCC/2 terminal

Technical Note

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2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

20 19

18 17 16 15 14 13 12 11

VCC/2

GND

I2C BUS LOGIC

■4ch Volume
+23dB～-79ｄB/1dB step,-∞
★：Advanced switch circuit

■Mixing ATT
+0dB～-32dB/8dB step,

-32dB～-64dB/16dB step,-∞

1 2

100k

100k

100k 100k

3 4 5 6 7 8 9 10

Fig.20 BD3465FV

Descriptions of terminal

Terminal

Terminal

No.

Name

1 INF1

2 INF2

3 INR1

4 INR2

5 NC

6 NC

7 EXT1

8 EXT2

9 EXT3

10 NC

Description

Front input terminal of 1ch

Front input terminal of 2ch

Rear input terminal of 1ch

Rear input terminal of 2ch

External input terminal of 1ch

External input terminal of 2ch

External input terminal of 3ch

VCC

Volume★

Independent
control

Terminal

No.

11 OU T R 2

12 OUTR1

13 OUTF2

14 OUTF1

15 VCC

16 CS

17 SCL

18 SDA

19 GND

20 FIL

Volume★

Mixing ATT

100k

Terminal

Name

Technical Note

Volume★

Volume★

Mixing ATT

Mixing ATT

100k 100k

Description

Rear output terminal of 2ch

Rear output terminal of 1ch

Front output terminal of 2ch

Front output terminal of 1ch

Power supply terminal

Chip select terminal

2

C Communication clock terminal

I

I2C Communication data terminal

GND terminal

VCC/2 terminal

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2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

2

Technical Note

●Timing Chart

CONTROL SIGNAL SPECIFICATION

(1) Electrical specifications and timing for bus lines and I/O stages

SDA

SCL

t

BUF

t

LOW

t

t

R

F

t

HD;STA

t

SP

P

t

HD;STA

S

t

HD;DAT

Fig.21 Definition of timing on the I

Table 1 Characteristics of the SDA and SCL bus lines for I

t

HIGH

t

2

C-bus devices

SU;D AT tSU;STA

2

C-bus

Sr

t

SU; STO

(Unless specified particularly, Ta=25℃, VCC=8.5V)

Parameter Symbol

1

SCL clock frequency

2

Bus free time between a STOP and START condition
Hold time (repeated) START condition. After this period, the

3

first clock pulse is generated

4

LOW period of the SCL clock

5

HIGH period of the SCL clock

6

Set-up time for a repeated START condition

7

Data hold time

8

Data set-up time

9

Set-up time for STOP condition

All values referred to VIH min. and VIL max. Levels (see Table 2).
* A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the VIH min. of the SCL signal) in order to bridge the undefined

region of the falling edge of SCL.

About 7(tHD;DAT), 8(tSU;DAT), make it the setup which a margin is fully in .

fSCL 0 400 kHz
tBUF 1.3 － μS

tHD;STA 0.6 － μS

tLOW 1.3 － μS

tHIGH 0.6 － μS
tSU;STA 0.6 － μS
tHD;DAT 0* － μS

tSU; DAT 100 － ns

tSU;STO 0.6 － μS

Fast-mode I2C-bus
Min Max

Table 2 Characteristics of the SDA and SCL I/O stages for I2C-bus devices

Parameter Symbol

10

LOW level input voltage

11

HIGH level input voltage
Pulse width of spikes which must be suppressed by the input

12

filter.
LOW level output voltage (open drain or open collector):

13

at 3mA sink current
Input current each I/O pin with an input voltage between 0.4V

14

and 0.9 VDDmax.

SCL

SDA

ｔBUF
：4us

ｔHD;STA

：2us

ｔLOW

：3us

ｔHD;DAT

ｔHIGH
：1us

SCL clock frequency：250kHz

Fig.22 A command timing example in the I2C data transmission

VIL -0.5 1 V

VIH 2.3 － V

Tsp 0 50 ns

VOL1 0 0.4 V

Ii -10 10 μA

ｔSU;DAT

：1us

：1us

Fast-mode I
Min Max

C-bus

ｔSU;STO

：2us

P

Unit

Unit

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

Technical Note

2

C BUS FORMAT

(2)I

MSB LSB MSB LSB MSB LSB

S Slave Address A Select Address A Data A P

1bit 8bit 1bit 8bit 1bit 8bit 1bit 1bit

S = Start conditions (Recognition of start bit)
Slave Address = Recognition of slave address. 7 bits in upper order are voluntary.

The least significant bit is “L” due to writing.
A = ACKNOWLEDGE bit (Recognition of acknowledgement)
Select Address = Select every of volume, bass and treble.
Data = Data on every volume and tone.
P = Stop condition (Recognition of stop bit)

2

C BUS Interface Protocol

(3)I

1)Basic form
S Slave Address A Select Address A Data A P

MSB LSB MSB LSB MSB LSB

2)Automatic increment (Select Address increases (+1) according to the number of data.
S Slave Address A Select Address A Data1 A Data2 A

MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB

(Example) ①Data1 shall be set as data of address specified by Select Address.

②Data2 shall be set as data of address specified by Select Address +1.
③DataN shall be set as data of address specified by Select Address +N-1.

3)Configuration unavailable for transmission (In this case, only Select Address1 is set.

S Slave Address A Select Address1 A Data A Select Address 2 A Data A P

MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB

(Note)If any data is transmitted as Select Address 2 next to data, it is recognized

as data, not as Select Address 2.

(4)Slave address

Because the slave address can be changed by the setting of CS, it is possible to use two chips at the same time on
identical BUS.

MSB

LSB

SEL Voltage Condition A6 A5 A4 A3 A2 A1 A0 R/W

GND ～ 0.2×VCC 1 0 0 0 0 0 0 0

0.8×VCC ～ VCC

1 0 0 0 0 1 0 0

Establish the voltage of CS in the condition to have been defined.

････

DataN A P

80H
84H

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2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

(

(5)Select Address & Data

BD3460FS, BD3464FV

Items to be set

Initial Setup 1 01
Volume 1ch Front 28 Volume Gain / Attenuation
Volume 2ch Front 29 Volume Gain / Attenuation
Volume 1ch Rear 2A Volume Gain / Attenuation
Volume 2ch Rear 2B Volume Gain / Attenuation
Volume 1ch Sub 2C Volume Gain / Attenuation
Volume 2ch Sub 2D Volume Gain / Attenuation
Test Mode F0 0 0 0 0 0 0 0 0
System Reset FE 1 0 0 0 0 0 0 1

(Note)

1.In function changing of the hatching part, it works Advanced switch.

2.Select Address 2 C & 2 D can set only BD3460FS. Set all data of BD3464FV to "1".

3.Upon continuous data transfer, the Select Address is circulated by the automatic increment function, as shown below.

BD3461FS, BD3465FV

Items to be set

Initial Setup 1 01
Volume 1ch Front 28 Volume Gain / Attenuation
Volume 2ch Front 29 Volume Gain / Attenuation
Volume 1ch Rear 2A Volume Gain / Attenuation
Volume 2ch Rear 2B Volume Gain / Attenuation
Volume 1ch Sub 2C Volume Gain / Attenuation
Volume 2ch Sub 2D Volume Gain / Attenuation

EXT 1 ON/OFF 30

EXT 2 ON/OFF 31

EXT 3 ON/OFF 32

EXT 1 ATT 33 0 0 0 0 0
EXT 2 ATT 34 0 0 0 0 0
EXT 3 ATT 35 0 0 0 0 0
Test Mode F0 0 0 0 0 0 0 0 0
System Reset FE 1 0 0 0 0 0 0 1

(Note)

1. In function changing of the hatching part, it works Advanced switch.

2. Select Address 2 C & 2 D can set only BD3461FS. Set all data of BD3465FV to "1".

3. Upon continuous data transfer, the Select Address is circulated by the automatic increment function, as shown below.

→01→28→29→

4. When changing “EXT = ON/OFF”, it is not corresponded for advance switch. Therefore, please do the measure that
applies mute on the side of a set at the time of these setting changes

Select

Address

hex)

→01→28→29→

Select

Address

(hex)

MSB Data LSB

D7 D6 D5 D4 D3 D2 D1 D0

0 0 0 0

MSB Data LSB

D7 D6 D5 D4 D3 D2 D1 D0

0

000

EXT1

S2

EXT2

S2

EXT3

S2

2A→2B→2C→2D→30→31→32→33→34→35

2A→2B→2C→2D

EXT1

S1

EXT2

S1

EXT3

S1

EXT1

R2

EXT2

R2

EXT3

R2

EXT1

EXT2

EXT3

R1

R1

R1

0 0 0 0

0 1

EXT1

F2

EXT2

F2

EXT3

F2

EXT1

F1

EXT2

F1

EXT3

F1

Technical Note

Advanced switch

0 0

0 0

0 0

0 0

EXT1 Attenuation
EXT2 Attenuation
EXT3 Attenuation

Advanced switch

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

Select address 28, 29, 2A, 2B, 2C 2D(hex)

MSB Volume Gain/Attenuation LSB

Gain & ATT

Prohibition ※

23dB 0 1 1 0 1 0 0 1
22dB 0 1 1 0 1 0 1 0
21dB 0 1 1 0 1 0 1 1

-78dB 1 1 0 0 1 1 1 0

-78dB 1 1 0 0 1 1 1 0

-79dB 1 1 0 0 1 1 1 1

Prohibition ※

-∞dB 1 1 1 1 1 1 1 1
※ Gain is set to “-∞dB” when sending “Prohibition data”.
※ Select Address 2 C & 2 D can set only BD3460FS, BD3461FS.

Set all data of BD3464FV & BD3465FV to "1".

Select address 30, 31, 32(hex)

MODE

OFF

MODE

OFF

MODE

OFF

MODE

OFF

MODE

OFF

MODE

OFF

： ： ： ： ： ： ： ： ：

ON 1

ON

ON

ON

ON

ON

D7 D6 D5 D4 D3 D2 D1 D0

0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1

： ： ： ： ： ： ： ：

0 1 1 0 1 0 0 0

1 1 0 1 0 0 0 0

： ： ： ： ： ： ： ：

1 1 1 1 1 1 1 0

MSB EXT1 F1 LSB

D7 D6 D5 D4 D3 D2 D1 D0

EXT1

S2

MSB EXT1 F2 LSB

D7 D6 D5 D4 D3 D2 D1 D0

EXT1

S2

MSB EXT1 R1 LSB

D7 D6 D5 D4 D3 D2 D1 D0

EXT1

S2

MSB EXT1 R2 LSB

D7 D6 D5 D4 D3 D2 D1 D0

EXT1

S2

MSB EXT1 S1 LSB

D7 D6 D5 D4 D3 D2 D1 D0

EXT1

S2

MSB EXT1 S2 LSB

D7 D6 D5 D4 D3 D2 D1 D0

0
1

EXT1

S1

EXT1

S1

EXT1

S1

EXT1

S1

0
1

EXT1

S1

EXT1

R2

EXT1

R2

EXT1

R2

0
1

EXT1

R2

EXT1

R2

EXT1

R1

EXT1

R1

0
1

EXT1

R1

EXT1

R1

EXT1

R1

EXT1

F2

0
1

EXT1

F2

EXT1

F2

EXT1

F2

EXT1

F2

0

EXT1

F1

EXT1

F1

EXT1

F1

EXT1

F1

EXT1

F1

Technical Note

0 0

0 0

0 0

0 0

0 0

0 0

:Initial condition

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

Select address 33, 34, 35(hex)

Gain

0dB

-8dB 0 0 1

-16dB 0 1 0

-24dB 0 1 1

-32dB 1 0 0

-48dB 1 0 1

-64dB 1 1 0

-∞dB 1 1 1

※ Select Address 30, 31 32, 33, 34, 35 can set only BD3461FS & BD3465FV.

(6)About power on reset

At one of supply voltage circuit made initialization inside IC is built-in. Please send data to all address as initial data at
supply voltage on. And please supply mute at set side until this initial data is sent.

Item Symbol

MSB EXT Attenuation LSB

D7 D6 D5 D4 D3 D2 D1 D0

0 0 0

0 0 0 0 0

Limit

Min. Typ. Max.

Unit Condition

Technical Note

:Initial condition

Rise time of VCC Trise 20 － － μsec VCC rise time from 0V to 3V

VCC voltage of release
power on reset

Vpor

－

4.1

－

V

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

Volume gain/attenuation of the details

(dB) D7 D6 D5 D4 D3 D2 D1 D0

[phone] 1 1 1 0 1
[phone] 1 1 1 1 0
[phone] 1 1 1 1 1
[phone] 0 0 0 0 0
[phone] 0 0 0 0 1
[phone] 0 0 0 1 0
[phone] 0 0 0 1 1
[phone] 0 0 1 0 0
[phone] 0 0 1 0 1
[phone] 0 0 1 1 0
[phone] 0 0 1 1 1
[phone] 0 1 0 0 0
[phone] 0 1 0 0 1
[phone] 0 1 0 1 0

[phone] 1 0 1 1
[phone] 1 1 0 0
[phone] 1 1 0 1
[phone] 1 1 1 0
[phone] 1 1 1 1
[phone] 0 0 0 0
[phone] 0 0 0 1
[phone] 0 0 1 0
[phone] 0 0 1 1

0 1 0 0 0 0 0 0 0 -52 1 0 1 1 0 1 0 0

-1 1 0 0 0 0 0 0 1 -53 1 0 1 1 0 1 0 1

-2 1 0 0 0 0 0 1 0 -54 1 0 1 1 0 1 1 0

-3 1 0 0 0 0 0 1 1 -55 1 0 1 1 0 1 1 1

-4 1 0 0 0 0 1 0 0 -56 1 0 1 1 1 0 0 0

-5 1 0 0 0 0 1 0 1 -57 1 0 1 1 1 0 0 1

-6 1 0 0 0 0 1 1 0 -58 1 0 1 1 1 0 1 0

-7 1 0 0 0 0 1 1 1 -59 1 0 1 1 1 0 1 1

-8 1 0 0 0 1 0 0 0 -60 1 0 1 1 1 1 0 0

-9 1 0 0 0 1 0 0 1 -61 1 0 1 1 1 1 0 1

-10 1 0 0 0 1 0 1 0 -62 1 0 1 1 1 1 1 0

-11 1 0 0 0 1 0 1 1 -63 1 0 1 1 1 1 1 1

-12 1 0 0 0 1 1 0 0 -64 1 1 0 0 0 0 0 0

-13 1 0 0 0 1 1 0 1 -65 1 1 0 0 0 0 0 1

-14 1 0 0 0 1 1 1 0 -66 1 1 0 0 0 0 1 0

-15 1 0 0 0 1 1 1 1 -67 1 1 0 0 0 0 1 1

-16 1 0 0 1 0 0 0 0 -68 1 1 0 0 0 1 0 0

-17 1 0 0 1 0 0 0 1 -69 1 1 0 0 0 1 0 1

-18 1 0 0 1 0 0 1 0 -70 1 1 0 0 0 1 1 0

-19 1 0 0 1 0 0 1 1 -71 1 1 0 0 0 1 1 1

-20 1 0 0 1 0 1 0 0 -72 1 1 0 0 1 0 0 0

-21 1 0 0 1 0 1 0 1 -73 1 1 0 0 1 0 0 1

-22 1 0 0 1 0 1 1 0 -74 1 1 0 0 1 0 1 0

-23 1 0 0 1 0 1 1 1 -75 1 1 0 0 1 0 1 1

-24 1 0 0 1 1 0 0 0 -76 1 1 0 0 1 1 0 0

-25 1 0 0 1 1 0 0 1 -77 1 1 0 0 1 1 0 1

-26 1 0 0 1 1 0 1 0 -78 1 1 0 0 1 1 1 0

-27 1 0 0 1 1 0 1 1 -79 1 1 0 0 1 1 1 1

-28 1 0 0 1 1 1 0 0 -∞ 1 1 1 1 1 1 1 1

(dB) D7 D6 D5 D4 D3 D2 D1 D0

：Initial condition

Technical Note

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

●Application Circuit Diagram

10μ

GNDFIL

10μ 0.1μ

2.2K

24 23

22 21 20 19 18 17 16 15 14 13

VCC/2

GND

I2C BUS LOGIC

■6ch Volume
+23dB～-79ｄB/1dB step,-∞
★：Advanced switch circuit

100k

100k 100k

100k

100k 100k

1 2

3 4 5 6 7 8 9 10 11 12

1μ 1μ 1μ

INF1

INF2 INR2

INR1

1μ 1μ 1μ 4.7μ 4.7μ 10μ

INS1

Fig.23 BD3460FS

VCC OUTS2

4.7μ 4.7μ 4.7μ 4.7μ

4.7μ

VCC

BUFFERED

GND ISO AMP

100k 100k

10μ 10μ

INS2 DIFFOUT2PIN2 NIN2 DIFFOUT1 NIN1

OUTS1OUTR2OUTR1OUTF2OUTF1SDA SCL CS

BUFFERED

GND ISO AMP

100k

PIN1

Technical Note

4.7μ

100k

10μ

Unit
R : [Ω]
C : [F]

Notes on wiring

① Please connect the decoupling capacitor of a power supply in the shortest distance as much as possible to GND.
② Lines of GND shall be one-point connected.
③ Wiring pattern of Digital shall be away from that of analog unit and cross-talk shall not be acceptable.
④ Lines of SCL and SDA of I

2

C BUS shall not be parallel if possible.

The lines shall be shielded, if they are adjacent to each other.
⑤ Lines of analog input shall not be parallel if possible. The lines shall be shielded, if they are adjacent to each other.

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

10μ

GNDFIL

10μ 0.1μ

2.2K

24 23

22 21 20 19 18 17 16 15 14 13

VCC/2

GND

I2C BUS LOGIC

■6ch Volume
+23dB～-79ｄB/1dB step,-∞
★：Advanced switch circuit

■Mixing ATT
0dB～-32dB/8dB step,

-32dB～-64dB/16dB step,-∞

Independent
control

100k

100k 100k

100k

100k 100k

1 2

3 4 5 6 7 8 9 10 11 12

1μ 1μ 1μ

INF1 INF2 INR2 INS1

INR1

1μ 1μ 1μ 10μ 4.7μ 10μ 10μ

Fig.24 BD3461FS

VCC OUTS2

4.7μ

4.7μ 4.7μ 4.7μ 4.7μ

VCC

100k

100k 100k

10μ 10μ

INS2

EXT1 EXT2 DIFFOUT NIN

EXT3

OUTS1OUTR2OUTR1OUTF2OUTF1SDA SCL CS

BUFFERED

GND ISO AMP

100k

PIN

Technical Note

4.7μ

100k

Unit
R : [Ω]
C : [F]

Notes on wiring

① Please connect the decoupling capacitor of a power supply in the shortest distance as much as possible to GND.
② Lines of GND shall be one-point connected.
③ Wiring pattern of Digital shall be away from that of analog unit and cross-talk shall not be acceptable.
④ Lines of SCL and SDA of I

2

C BUS shall not be parallel if possible.

The lines shall be shielded, if they are adjacent to each other.
⑤ Lines of analog input shall not be parallel if possible. The lines shall be shielded, if they are adjacent to each other.

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

GNDFIL

10μ

20 19

2.2K

18 17 16 15 14 13 12 11

VCC/2

GND

I2C BUS LOGIC

■4ch Volume
+23dB～-79ｄB/1dB step,-∞
★：Advanced switch circuit

100k

100k

100k 100k

1 2

3 4 5 6 7 8 9 10

1μ 1μ 1μ

INF1

INF2 INR2

INR1

1μ

Fig.25 BD3464FV

VCC

10μ 0.1μ

VCC

Volume★

4.7μ

4.7μ 4.7μ 4.7μ

Volume★

Volume★

Technical Note

OUTR2OUTR1OUTF2OUTF1SDA SCL CS

Volume★

Unit
R : [Ω]
C : [F]

Notes on wiring

① Please connect the decoupling capacitor of a power supply in the shortest distance as much as possible to GND.
② Lines of GND shall be one-point connected.
③ Wiring pattern of Digital shall be away from that of analog unit and cross-talk shall not be acceptable.
④ Lines of SCL and SDA of I

2

C BUS shall not be parallel if possible.

The lines shall be shielded, if they are adjacent to each other.
⑤ Lines of analog input shall not be parallel if possible. The lines shall be shielded, if they are adjacent to each other.

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

10μ

GNDFIL

2.2K

20 19

18 17 16 15 14 13 12 11

VCC/2

GND

I2C BUS LOGIC

■4ch Volume
+23dB～-79ｄB/1dB step,-∞
★：Advanced switch circuit

■Mixing ATT
+0dB～-32dB/8dB step,

-32dB～-64dB/16dB step,-∞

100k

100k

100k 100k

1 2

3 4 5 6 7 8 9 10

1μ 1μ 1μ

INF1 INF2 INR2 EXT3

INR1

1μ

Fig.26 BD3465FV

VCC

10μ 0.1μ

VCC

Independent
control

4.7μ

100k

1μ 1μ

EXT1 EXT2

Technical Note

OUTR2OUTR1OUTF2OUTF1SDA SCL CS

4.7μ 4.7μ 4.7μ

100k 100k

1μ

Unit
R : [Ω]
C : [F]

Notes on wiring

① Please connect the decoupling capacitor of a power supply in the shortest distance as much as possible to GND.
② Lines of GND shall be one-point connected.
③ Wiring pattern of Digital shall be away from that of analog unit and cross-talk shall not be acceptable.
④ Lines of SCL and SDA of I

2

C BUS shall not be parallel if possible.

The lines shall be shielded, if they are adjacent to each other.
⑤ Lines of analog input shall not be parallel if possible. The lines shall be shielded, if they are adjacent to each other.

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

●Interfaces

Terminal

Name

INF1
INF2

INR1

Terminal

Voltage

Equivalent Circuit Terminal Description

Vcc

INR2
INS1
INS2
PIN2
NIN2
NIN1

4.25

100KΩ

PIN1

NIN
PIN

GND

EXT1
EXT2
EXT3

Technical Note

A terminal for signal input.
The input impedance is 100kΩ(typ).

INS1 and INS2 are only BD3460FS and
BD3461FS’s terminals, PIN2,NIN2,NIN1 and
PIN1 are only BD3460FS’s one, NIN and PIN
are only BD3461FS’s one, EXT1,EXT2 and
EXT3 are only BD3461FS and BD3465FV’s
one.

DIFOUT2
DIFOUT1

DIFOUT

OUTS2
OUTS1
OUTR2
OUTR1
OUTF2
OUTF1

CS -

4.25

VCC

A terminal for fader output.

DIFOUT2 and DIFOUT1 are only BD3460FS’s
terminals, DIFOUT is only BD3461FS’s one,
OUTS2, and OUTS1 are only BD3460FS and
BD3461FS’s one.

GND

VCC

A terminal for slave addresses selection.
“CS” is “High”→slave address “84 H”
“CS” is “Low”→ slave address “80 H”

GND

The figure in the pin explanation and input/output equivalent circuit is reference value, it doesn’t guarantee the value.

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

k50k

Terminal

Name

Terminal

Voltage

Equivalent Circuit Terminal Description

Technical Note

VCC 8.5

SCL －

SDA －

Vcc

GND

Vcc

GND

Power supply terminal.

A terminal for clock input of I

2

C BUS

communication.

1.65V

A terminal for data input of I
communication.

2

C BUS

1.65V

GND 0

VCC

Ground terminal.

Voltage for reference bias of analog signal
system. The simple precharge circuit and
simple discharge circuit for an external
capacitor are built in.

FIL 4.25

50

GND

The figure in the pin explanation and input/output equivalent circuit is reference value, it doesn’t guarantee the value.

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2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

●Notes for use

1. Absolute maximum rating voltage
When it impressed the voltage on VCC more than the absolute maximum rating voltage, circuit currents increase
rapidly, and there is absolutely a case to reach characteristic deterioration and destruction of a device. In particular in
a serge examination of a set, when it is expected the impressing serge at VCC terminal, please do not impress the
large and over the absolute maximum rating voltage (including a operating voltage + serge ingredient (around 14V)).

2. About a signal input part

1)About constant set up of input coupling capacitor

In the signal input terminal, the constant setting of input coupling capacitor C(F) be sufficient input impedance
R

(Ω) inside IC and please decide. The first HPF characteristic of RC is composed.

IN

C〔F〕

3. About output load characteristics)

The usages of load for output are below (reference). Please use the load more than 10[kΩ](TYP).

INPUT

Output pin on target

Pin Name Pin name Pin name Pin name Pin name

OUTF1 OUTR1 OUTS1 DIFOUT1 DIFOUT
OUTF2 OUTR2 OUTS2 DIFOUT2

Output voltage [Vrms]

RIN

〔Ω

2.5

2

1.5

1

0.5

0

100 1k 10k 100k

G〔dB〕

0

A(f)

Ｓ

Ｓ

A(f)

VCC=8.5V
THD+n=1%
BW=400～30kHz

(Load) ［Ω]

Output load characteristic at Vcc=8.5V. (Reference)

Technical Note

f〔Hz〕

2

IN

)(2πfCR

2

(2πfCR1

IN)

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2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

Technical Note

4. Frequency characteristic at large output level

High slew-rate amplifiers are used for high quality sound. This IC is corresponded to “192kHz sampling on DVD-Audio
highest quality”. Output level is “2Vrms, 192kHz flat(typ)”.
(See the below graph (reference)).

2
1
0

-1

-2

-3

-4

-5

Gain[dB]

-6

-7

-8

-9

-10
10 100 1k 10k 100k 1000k

BD346X Gain vs Frequency (Volume=0dB setting)

Frequency [Hz]

5. Oscillation countermeasure for GND isolation amplifier outputs

Using higher capacitor than 10pF at GND isolation amplifier outputs (DIFOUT1, DIFOUT2, DIFOUT) may cause
oscillation. As oscillation countermeasure, insert resistor in series to terminal directly as below.

Capacitance Resistor in series to terminal directly

Resistor for oscillation countermeasure

C＜10pF Not necessary

Coupling capacitor

10＜C＜100pF 220Ω

Output

Capacitive load
(Included PCB capacitance etc)

6. Oscillation countermeasure for volume outputs at power supply ON/OFF

If using higher capacitor than 22pF at volume outputs, oscillation may occur a moment when turning ON/OFF power
supply (when VCC is about 3～4 V). As oscillation countermeasure, insert resistor in series to terminal directly as below,
and set volume output mute outside this device when turning ON/OFF power supply.

Resistor for oscillation countermeasure

Capacitance Resistor in series to terminal directly

C＜22pF Not necessary

Coupling capacitor

22＜C＜220pF 220Ω

Output

Capacitive load
(Included PCB capacitance etc)

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2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

Technical Note

7. I2C BUS Transferring Data

【1】The kind of the Transferring Data

1-1. he data setup except Advanced switch (the data without hatching of a data format) does not have the regulation on

transferring data.

1-2. The data setup of Advanced switch (the data with hatching of a data format) does not have the regulation on

transferring data too. But Advanced switch order follows the following 【2】.

【2】Transferring data of the Advanced switch

2-1. The timing chart from the transferring data timing to the Advanced switch start timing is as follows.

■Transferring data example 1

It is the same even if it transfers data in auto increment mode.

There are no timing regulations of I

2

C BUS transferring data. But the timing of a change start after the end of the
present change. In addition, the timing of Advanced switch is not depended of a transferring data turn, but conforms in
turn of the following figure.

Group①

Group②

Group③

Fader F1

28h

Fader F2

29h

Fader R1

2Ah

Fader R2

2Bh

Fader S1

2Ch

Fader S2

2Dh

Select address

The turn of Advanced switch start

The block in the same group can start the Advanced switch in the same time.

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2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

changing time

■Transferring data example 2
The transferring data turn differs from the actual change turn as below.

I2C BUS

select

slave

data

(Fader S1 0dB) (Fader R1 0dB) (Fader F1 0 dB)

80 28 80 80 2A 80

80 2C 80

アドバンスト・スイッチ時間

Fader S1 切換時間 Fader F1 切換時間 Fader R1 切換時間

Please transfer data after the present Advanced switch, if it wants to make a transferring data turn and Advanced
switch turn the same.

■Transferring data example 3
Priority is given to the data of the same select address when it is transferred to the timing which Advanced switch has
not ended. In addition, when two or more data are transferred to the same select address, the end transferred data is
effective.

The data which h ave become invali d as a result

Fader F1 Only the last of the data transmitted during the Fader F1 change

I2C BUS

(Fader F1 0dB)

80 28 80 80 28 7F

(Fader F1 +1dB)

(Fader F1 -1dB)

80 28 81

Advanced switch timing

Fader F1

Changing time

■Transferring data example 4
Refresh data is the same as the present setup data, therefore Advanced switch does not change.

The gain change data of other channels are transferred after refresh data as below.

I2C BUS

(Fader F1 0dB)

80 28 80

Fader F1 0dB) Fader R1 d B)

80 28 8 0 80 2A 80

Refres h data

Advanced swi tch timing

Fader F 1

changing time

is effective.

Fader F1

Changing time

Technical Note

Fader R1

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

【3】Attention of transferring data

BD3460FS, BD3461FS, BD3464FV, BD3465FV can not set the transferring data from a microcomputer correctly on
very rare occasions. The following phenomenon may occur.

1. Volume (Fader) gain does not change.

2. Volume (Fader) gain changes to MUTE.

Therefore, the transferring data from a microcomputer should send to conform to the following conditions.

① When the Volume (Fader) change data send, please send the same data twice as below.

Technical Note

If Refresh data can’t be sent like ①timing, the output wave may be mute momentarily.

② If Volume (Fader) change data can send over 94.08msec interval transferring data, there is no need to send

Refresh data.

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

●Thermal Derating Curve

About the thermal design by the IC

Characteristics of an IC have a great deal to do with the temperature at which it is used, and exceeding absolute
maximum ratings may degrade and destroy elements. Careful consideration must be given to the heat of the IC from
the two standpoints of immediate damage and long-term reliability of operation.

Power dissipation values vary according to the board on which the IC is mounted.

Reference data

1.5

1.0

1.0W

SSOP-A24

Measurement condition: ROHM Standard board
board Size：70×70×1.6(㎣)
material：A FR4 grass epoxy board

0.5

Power Dissipation Pd Pd（W）

0.0

0 25 50 75 100 125

Ambient Temperature Ta Ta（℃）

Fig.27 Temperature Derating Curve (SSOP-A24)

Reference data

1.5

1.0

0.81W

SSOP-B20

Measurement condition: ROHM Standard board
board Size：70×70×1.6(㎣)
material：A FR4 grass epoxy board

0.5

Power Dissipation Pd Pd（W）

0.0

0 25 50 75 100 125

Ambient Temperature Ta Ta（℃）

Fig.28 Temperature Derating Curve (SSOP-B20)

Note) Values are actual measurements and are not guaranteed.

Technical Note

(3% or less of copper foil area)

θja = 125℃/W

85

150

(3% or less of copper foil area)

θja = 153.8℃/W

85

150

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

BD3460FS,BD3461FS,BD3464FV,BD3465FV

●Ordering part number

B D 3 4 6 0 F S - E 2

Part No. Part No.

3460, 3461
3464, 3465

SSOP-A24

24

10± 0.2

(MAX 10.35 include BURR)

13

+6°

4°

−4°

7.8± 0.3

5.4± 0.2

0.5± 0.2

1.2± 0.15

1

1.8±0.1

0.8

0.1±0.1

12

0.1

0.38±0.1

+0.1

0.17

−0.05

(Unit : mm)

SSOP-B20

6.4 ± 0.3

4.4 ± 0.2

6.5 ± 0.2

20

1

11

0.3Min.

10

0.15 ± 0.1

Package

FS:SSOP-A24
FV:SSOP-B20

<Tape and Reel information>

Embossed carrier tapeTape

Quantity

Direction
of feed

<Tape and Reel information>

Quantity

Direction
of feed

2000pcs
E2

The direction is the 1pin of product is at the upper left when you hold

()

reel on the left hand and you pull out the tape on the right hand

Reel

Embossed carrier tapeTape
2500pcs

E2

The direction is the 1pin of product is at the upper left when you hold

()

reel on the left hand and you pull out the tape on the right hand

Packaging and forming specification
E2: Embossed tape and reel

1pin

Order quantity needs to be multiple of the minimum quantity.

∗

Technical Note

Direction of feed

1.15 ± 0.1

0.1± 0.1

0.65

0.22 ± 0.1

0.1

Direction of feed

(Unit : mm)

Reel

1pin

Order quantity needs to be multiple of the minimum quantity.

∗

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© 2010 ROHM Co., Ltd. All rights reserved.

2011.04 - Rev.B

Notes

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The content specied herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specications,
which can be obtained from ROHM upon request.

Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.

Great care was taken in ensuring the accuracy of the information specied in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
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The technical information specied herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.

The Products specied in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, ofce-automation equipment, commu­nication devices, electronic appliances and amusement devices).

The Products specied in this document are not designed to be radiation tolerant.

While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.

Please be sure to implement in your equipment using the Products safety measures to guard
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The Products are not designed or manufactured to be used with any equipment, device or
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of the Products for the above special purposes. If a Product is intended to be used for any
such special purpose, please contact a ROHM sales representative before purchasing.

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Notice

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