ROHM BD3452KS Technical data

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1
Sound Processors for Home Theater System
7.1ch Sound Processor
Description
BD3452KS is a sound processor where the functions including Input Selector, 8ch Volume and Gain Amp required for applications such as AV receivers, home theater systems and mini-component systems are integrated into a single chip. Adopting the BiCMOS process achieves low distortion, low noise and a wide dynamic range.
Features
1) Dynamic range: 132dB (VOL=MUTE, IHF-A)
2) Independent 8 channels for Master Volume (0 to -99 dB, MUTE 1dB/Step)
3) Supporting 2nd room entertainment
4) Low current consumption design achieved by adopting the BiCMOS process
5) Built-in Output Gain Amp useful for adjusting output signal voltages (0 to 15dB, 1dB/Step)
6) BD3841FS (9-input selector), BD3843FS (6-input selector) and BUS are common to be controlled simultaneously.
7) Built-in 2ch output port
8) 2-wire serial control (For both 3.3V and 5V)
Applications
AV receivers, home theater systems and mini-component systems
Absolute maximum ratings (Ta=25℃)
Parameter Symbol Ratings Unit
No.10081EAT01
Power Supply Voltage
Input Signal Voltage VIN VCC+0.3 to VEE-0.3 V
Power Dissipation Pd 1300 *2 mW
Operating Temperature Range Topr -20 to 75
Storage Temperature Range Tastg -55 to 125
*1 Even in the specified range of Power Supply Voltage, applying voltage only to the VCC side may cause an excessive current to give a permanent damage to the IC. When starting up power supplies, VEE and VCC should be powered on simultaneously or VEE first; then followed by VCC. *2 Over Ta25, reduce at the rate of 13mW/. When installed on the standard board (size: 70701.6mm).
Operating conditions
It must function normally at Ta25℃.
Parameter Symbol
Operating Supply Voltage
VCC 7.5 VEE -7.5
Ratings
Min. Typ. Max.
VCC 6.5 7 7.3 VEE -7.3 -7 -6.5
V
Unit
V
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1/9
2010.06 - Rev.A
BD3452KS
Electrical characteristics
Ta =2 5, VCC=7V, VEE=-7V, f=1kHz, Vin=1Vrms, RL=10k, Rg=600, Input Gain=0dB, Master volume=0dB, Output gain=0dB, unless otherwise noted.
Circuit Current
Output Voltage Gain Gv -2 0 2 dB Measure : Pin87,88
Parameter Symbol
VCC
VEE -40 -20 -
IQ
Min. Typ. Max.
Limits
- 20 40
Unit Conditions
mA No signal
Technical Note
Total Harmonic Distortion Ratio
Maximum Output Voltage Vomax 3.6 4.2 - Vrms
Output Noise Voltage Vno - 1.4 12 µVrms
Total Output
Residual Noise Voltage Vnor - 1 8 µVrms
Cross-talk between Channels
Cross-talk between Selectors
Input Impedance Rin 32 47 62 k
V Output Voltage Gain GVV -2 0 2 dB Measure : Pin 81,82,83,84,85,86,87,88
V Total Harmonic Distortion Ratio
V Residual Noise Voltage VnorV - 1 8 µVrms
THD - 0.0006 0.03 %
CTC - -95 -80 dB
CTS - -95 -80 dB
THDV - 0.0006 0.03 %
Measure : Pin87,88 BW=400 to 30kHz
Measure : Pin87,88 THD=1
Measure : Pin87,88, Rg=0Ω, BW=IHF-A
Measure : Pin87,88, Rg=0, BW=IHF-A, Volume=MUTE
Measure : Pin88(OUTFL),87 (OUTFR) Rg=0, BW=IHF-A Reference : Pin87(OUTFR), 88(OUTFL)=1Vrms
Measure : Pin87,88 Rg=0, BW=IHF-A
Measure : Pin 81,82,83,84,85,86,87,88 BW=400 to 30kHz
Measure : Pin 81,82,83,84,85,86,87,88 BW=IHF-A, Rg=0Ω,Volume=MUTE
Volume Output
Volume Setting Error VOLE1 -0.5 0 0.5 dB
Maximum Attenuation VOLmin - -115 -105 dB
Input Gain Control Range GIG 10 12 14 dB
Gain
Input
Output Gain Control Range GOG 13 15 17 dB
Output Gain Setting Error GOE -0.5 0 0.5 dB
Output Gain
R Output Impedance RoutR - 20 100 Measure : Pin 44,45,46,47
R Voltage Gain GVR -2 0 2 dB
REC Out
R Total Harmonic Distortion Ratio
Port H Output PH 4.0 4.9 5.4 V
Port
Port Output Current PI - - 1.0 mA Measure : Pin 62,63
(*) If two RECOUTs are ON, total load resistances of these two (RL) should be 10 kΩ. * This product is not of "anti radiation design".
THDR - 0.005 0.09 %
Measure : Pin 81,82,83,84,85,86,87,88 Volume=0dB, Vin=3Vrms
Measure : Pin 81,82,83,84,85,86,87,88 Vin=3Vrms, BW=IHF-A
Measure : Pin 81,82,83,84,85,86,87,88 Input Gain=12dB, Vin=0.3Vrms
Measure : Pin 81,82,83,84,85,86,87,88 Output Gain=15dB, Vin=0.3Vrms
Measure : Pin 81,82,83,84,85,86,87,88 Output Gain=0dB, Vin=0.3Vrms
Measure : Pin 44,45,46,47 (*)RL=10k
Measure : Pin 44,45,46,47 BW=400 to 30kHz, (*)RL=10k
Measure : Pin 62,63 RL=10k
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© 2010 ROHM Co., Ltd. All rights reserved.
2/9
2010.06 - Rev.A
BD3452KS
Timing chart
1) Signal Timing Conditions
Data is read on the rising edge of the clock. Latch is read on the falling edge of the clock. Latch signal must terminate with the LOW state.
*To avoid malfunctions, clock and data signals must terminate with the LOW state.
(CLOCK)
CL
90% 90% 90% 90%
twc
10% 10% 10%
twc
thd thdth ts tsl thl tsd
DA DATA LATCH
90% 90% 90%
twd
DATA DATA
twh
10%
Fig.1
Parameter Symbol
Min. Typ. Max.
Limits
90% 90%
twl
10% 10%
LATCH
Unit
Technical Note
Terminate with LOW
Minimum Clock Width twc 1.0 - - µs
Minimum Data Width twd 1.0 - - µs
Minimum Latch Width twl 1.0 - - µs
LOW Hold Width twh 1.0 - - µs
Data Set-up Time (DATACLK) tsd 0.5 - - µs
Data Hold Time (CLKDATA) thd 0.5 - - µs
Latch Set-up Time (CLKLATCH) tsl 0.5 - - µs
Latch Hold Time (DATALATCH) thl 0.5 - - µs
Latch Low Set-up Time ts 0.5 - - µs
Latch Low Hold Time th 0.5 - - µs
2) Voltage Conditions for Control Signals
Parameter
Limits
Min. Typ. Max.
Unit Conditions
“H” Input Voltage 2.2 5.5 V
“L” Input Voltage 0 1.0 V
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© 2010 ROHM Co., Ltd. All rights reserved.
3/9
Vcc = 6.5~7.3V VEE=-6.5-7.3V
2010.06 - Rev.A
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