The BAxxBC0 are low-saturation regulators with an output current of 1.0 A and an output voltage accuracy of ±2%. A broad
output voltage range is offered, from 1.5V to 10V, and built-in overcurrent protec tion and thermal shutdown (TSD) circuits
prevent damage due to short-circuiting and overloading, respectively.
●Features Output voltage accuracy: ±2%
Broad output range available: 1.5 V -10 V
(BAxxBC0 series)
Input Power Supply Voltage: 16.0V(Max.)
Output voltage:(BA00BC0xx) Variable
(BAxxBC0) Fixed
Output current: 1A(Max.)
Shutdown current: 0μA(Typ.)
Operating temperature range: -40℃ to +105℃
●Applications
All electronic devices that use microcontrollers and
logic circuits
●Lineup Matrix
●Packages W (Typ.) x D (Typ.) x H (Max.)
TO252-3 6.50mm x 9.50mm x 2.50mm
TO252-5 6.50mm x 9.50mm x 2.50mm
TO220CP-V5 10.00mm x 20.12mm x 4.60mm
TO220FP-3 10.00mm x 30.50mm x 4.60mm
TO220FP-5 10.00mm x 30.50mm x 4.60mm
TO220FP-5(V5) 10.00mm x 31.50mm x 8.15mm
●Absolute Maximum Ratings (Ta = 25°C)
Parameter Symbol Limits Unit
Power supply voltage VCC 18*1 V
*2
TO252-3
1200
TO252-5 1300*3
Power
dissipation
TO220FP-3 2000*4
TO220FP-5 2000*4
d
P
mW
TO220FP-5 (V5) 2000*4
TO220CP-V5 2000*4
Operating temperature range Topr−40 to +105 °C
Ambient storage temperature Tstg−55 to +150 °C
Maximum junction temperature Tjmax 150 °C
*1 Must not exceed Pd.
*2 Derated at 9.6mW/°C at Ta>25°C when mounted on a glass epoxy board (70 mm × 70 mm × 1.6 mm).
*3 Derated at 10.4mW/°C at Ta>25°C when mounted on a glass epoxy board (70 mm × 70 mm × 1.6 mm).
*4 Derated at 16mW/° C at Ta> 25°C
●Recommended Operating Ratings
Parameter Symbol Min. Max. Unit
Input power supply voltage V
Input power supply voltage V
*5
3.0 16.0 V
CC
*6
Vo+1.0 16.0 V
CC
Output current IO - 1 A
Variable output voltage setting value VO 1.5 12 V
*5 When output voltage is 1.5 V, 1.8 V, or 2.5 V. *6 When output voltage is 3.0 V or higher.
●Electrical Characteristics
BAxxBC0 Series BAxxBC0W Series (Unless otherwise specified, Ta = 25°C; V
= 3 V; VCCDC*7)
CTL
Parameter Symbol Min. Typ. Max. UnitConditions
Output voltage VO
O
×0.98
V
(T)
O
V
(T)
Shutdown circuit current Isd - 0 10 μA V
V
(T)
O
× 1.02
V Io = 200mA
= 0 V while in off mode
CTL
Minimum I/O voltage difference*8 ∆Vd - 0.3 0.5 V Io = 200mA,Vcc = 0.95 × Vo
Output current capacity IO 1 - - A
Input stability*9 Reg.I - 15 35 mV Vcc= Vo+1.0V→16V, Io = 200mA
Load stability Reg.L - 35 75 mV Io = 0mA →1 A
Temperature coefficient of
output voltage
Vo (T): Set output voltage
*7 Vo = 1.5 V, 1.8 V, 2.5 V : Vcc = 3.3 V, Vo = 3.0 V, 3.3 V : Vcc = 5 V,
Vo = 5.0 V : Vcc : 8 V, Vo = 6.0 V : Vcc = 9 V, Vo = 8.0 V : Vcc = 11 V,
Vo = 9.0 V : Vcc = 12 V, Vo = 10.0 V : Vcc = 13 V
*8 Vo ≥ 3.3 V
*9 Change Vcc from 3.0 V to 6 V if 1.5 V ≤ Vo ≤ 2.5 V.
*10 Not 100% tested
*10
Tcvo - ±0.02- %/°CIo = 5mA、Tj = 0°C to 125℃
BA00BC0W Series (Unless otherwise specified, Ta=25℃, Vcc=3.3V, V
=3V, Io=200mA, Vo=2.5V setting)
CTL
Parameter Symbol Min.Typ. Max.UnitConditions
Shutdown circuit current Isd - 0 10 μA V
= 0V while in OFF mode
CTL
Bias Current Ib - 0.5 0.9 mA IO = 0mA
Reference voltage(CTL terminal) Vc 1.2251.2501.275V IO = 50mA
Minimum I/O voltage difference ∆Vd - 0.3 0.5 V IO = 500mA, VCC = 2.5V
Output current capacity Io 1 - - A
Vcc=16V
CTL ON Mode Voltage Vth1 2.0 - - V ACTIVE MODE, IO = 0mA
CTL OFF Mode Voltage Vth2 - - 0.8 V OFF MODE, IO = 0mA
CTL Input Current Iin 40 80 130
(1) When using an infinite hea t sink.
θj-c = 6.25 (°C/W)
(2) During IC without heat sink operation.
θj-a = 62.5 (°C/W)
10
:
2.0
1.6
Pd [W]
1.30
1.2
0.8
IC mounted on a ROH M standard board
Board size: 70 × 70 × 1.6 mm
Copper foil area: 7 × 7 mm
TO252-5 θja=96.2 (°C/W)
TO252-3 θja=104.2 (°C/W)
TO252-5
5
(2)2.0
POWER DISSIPATION
0
0
25 50 75
MBIENT TEMPERATURE:Ta [°C]
125150100
0.4
POWER DIDDIPA TI ON
0
0
255075
MBIENT TEMPERATURE:Ta [°C]
Fig.18
TO252-3
Fig.19
125150100
The characteristics of the IC are greatly influenced by the operating temperature. If the temperature e xceeds the maximum
junction temperature T
jmax, deterioration or damage may occur. Implement proper thermal designs to ensure that power
dissipation is within the permissible range in order to prevent instantaneous damage resulting from heat and maintain the
reliability of the IC for long-term operation.
The following method is used to calculate the power consumption Pc (W).
Pc = (Vcc – Vo) × Io + Vcc × Icca
Power dissipation Pd ≧ Pc
The load current Io is calculated:
Pd − Vcc × Icca
Io ≦
Vcc − Vo
Vcc : Input voltage
Vo : Output current
IO : Load curre nt
Icca : Circuit current
Calculation Example:
Vcc = 6.0 V and Vo = 5.0 V at Ta = 85°C
Refer to the above and implement proper thermal designs so that the IC will not be used under excessive power dissipation
conditions under the entire operating temperature range.
The power consumption Pc of the IC in the event of shorting (i.e. the Vo and GND pins are shorted) can be obtained from
the following equation:
Pc = Vcc × (Icca + Ishort) (Ishort: short current).
●Peripheral Circuit Considerations
• Vcc pin
Insert a capacitor (0.33μF approx.) between V
and GND.
CC
The capacitance will vary depending on the application. Use a suitable capacitance and implement designs with
sufficient margins.
• GND pin
Verify that there is no potential difference between the ground of the application board and the IC.
If there is a potential difference, the set voltage will not be output accurately, resulting in unstable IC operation.
Therefore, lower the impedance by designing the ground pattern as wide and as short as possible.
• CTL terminal
CTL
27k
Ω
Ω
2k
The CTL terminal turns on at an operating power
supply voltage of 2.0 V or higher and turns off at 0.8 V
31k
Ω
or lower.
There is no particular order when turning the power
supply and CTL terminals on or off.
Fig.20 Input Equivalent Circuit
●Vo Terminal
Insert a capacitor between the Vo and GND pins in order to prevent output oscillation.
IC
OUT
22 μF
10.0
2.0
1.0
0.5
ESR [Ω]
0.2
0.1
0.075
0.05
Oscillation region
Stable region
Oscillation region
200400 600 800 10000
Fig.21 Output Equivalent Circuit Fig.22 ESR vs. IO (22μF)
The capacitance may vary greatly with temperature changes, thus making it impossible to comp letely prevent oscillation.
Therefore, use a tantalum aluminum electrolytic capacitor with a low ESR (Equivalent Serial Resistance). The output will
oscillate if the ESR is too high or too low, so refer to the ESR characteristics in Fig.22 and operate the IC within the stable
region. Use a capacitor within a capacitance between 22μF and 1,000μF.
Below figure, it is ESR-to-Io stability Area characteristics, measured by 22μF-ceramic-capacitor and resistor connected in series.
This characteristic is not equal value perfectly to 22µF-aluminum electrolytic capacitor in order to measurement method.
Note, however, that the stable range suggested in the figure depends on the IC and the resistance load involved, and c an
vary with the board’s wiring impedance, input impedance, and/or load impedance. T herefore, be certain to ascertain the
final status of these items for actual use.
Keep capacitor capacitance within a range of 22µF to 1000μF. It is also recommended that a 0.33μF bypass capacitor be
connected as close to the input pin-GND as location possible. However, in situations such as rapid fluctuation of the input
voltage or the load, please check the operation in real application to determine proper capacitance.
1. Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break
down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated
values will expect to exceed the absolute maximum ratings, consider adding ci rcuit protection devices, su ch as fuses.
2. GND voltage
The potential of GND pin must be minimum potential in all operating conditions.
3. Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating
conditions.
4. Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards.
The IC may be damaged if there is any connection error or if pins are shorted together.
5. Actions in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to
malfunction.
6. Testing on application boards
When testing the IC on an application board, connecting a c apacitor to a pi n with lo w impedance subj ects the IC to stress.
Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or
removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic
measure. Use similar precaution when transporting or storing the IC.
7. Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic
diode or transistor. For example, the relation between each potential is as follows:
When GND > PIN A and GND > PIN B, the P-N junction operates as a parasitic diode.
When GND > PIN B, the P-N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes c an result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes
operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used.
8. Ground Wiring Pattern
When using both small signal and large current GND patterns, it is recommended to isolate the t wo ground patterns,
placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to chang e
the GND wiring pattern of any external components, either.
9. Thermal shutdown circuit
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is designed
only to shut the IC off to prevent thermal runaw ay. It is not designed to protect the IC or guarantee its opera tion. Do no t continue
to use the IC after operating this circuit or use the IC in an environment where the operation of this circuit is assumed.
10. Overcurrent Protection Circuit
An overcurrent protection circuit is incorporated in order to prevention destruction due to short-time overload currents.
Continued use of the protection circuits should be avoided. Please n ote that th e current increa ses negatively i mpact the temperature.
11. Damage to the internal circuit or element may occur when the polarity of the Vcc pin is opposite to that of the other pins in
applications. (I.e. Vcc is shorted with the GND pin while an external capacitor is charged.) Use a maximum capacitance
of 1000μF for the output pins. Inserting a diode to prevent back-current flow in series with Vcc or bypass diodes
between Vcc and each pin is recommended.
Fig.23 Bypass Diode Fig.24 Example of Simple Bip olar IC Architecture
Status of this document
The Japanese version of this document is formal specification. A customer may use this translation version only for a reference
to help reading the formal version.
If there are any differences in translation version of this document formal version takes priority.
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H
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For details, please refer to ROHM Mounting specification
●Precautions Regarding Application Examples and External Circuits
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