Renesas RZ/A Series, RZ/A2M User Manual

Rev.1.00 Oct, 2018

All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the latest information published by Renesas Electronics Corp. through various means, including the Renesas Electronics Corp. website

(http://www.renesas.com).

32

RZ/A2M CPU Board

RTK7921053C00000BE

User's Manual

Renesas Microprocessor RZ Family / RZ/A Series

User’s Manual

32

www.renesas.com

Notice

on of

1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operati semiconductor products and application examples. You are fully responsible for the incorporation or any other use of the circuits, software, and i nformation i n the desi gn of your produc t or syste m. Renesa s Electr onics discla ims any and al l liabilit y for any loss es and damages incurred by you or third parties arising from the use of these circui ts, software, or information.

2. Renesas Elec tronics hereby expressly discla ims any warranti es against and liability for infr ingement or any other claims involving patents, copyrights, or other intellectual prop erty rights of third part ies, by or arising from the use of Renesas Electronics pr oducts or technical information described in this document, including but not limited to, the product data, drawings, charts, programs, algorithms, and application examples.

3. No license, expr ess, impli ed or otherwi se, is gra nted hereb y under an y patents , copyright s or other intell ectual prop erty rights of Renesas Electronics or others.

4. You shall not alter , modify, copy, or revers e engineer any Renes as Electr onics product , whether in whole or in part. Renesas Electronics disclaims any and all liability for any losses or damages incurred by you or third parties arising from such alteration, modification, copying or reverse engineering.

5. Renesas Electroni cs products are cla ssified accordi ng to the following two qua lity grades: “Sta ndard” and “High Quali ty”. The intended applications for each Renesas E lectronics product depends on the produc t’s quality grade, as indicated below. “Standard”: Computers; office equipment; c ommunications equipment; tes t and measurement equipment; audio and visual equipment;

home electronic appliances; mac hine tools; personal electronic equipment; industrial robots; etc.

“High Quality”: Transportation equipment (automobiles, trains, ships, etc.); traffic control (traffic lights); large-scale communication

equipment; key financial terminal systems; safety control equipment; etc. Unless expressl y designated a s a high reli abilit y product or a product for ha rsh environ ments in a Renes as Elec tronics data sheet or ot her Renesas Electr onic s docum ent, Ren esa s El ectr onic s pr oduc ts a re not i ntended or a uthor i z ed for us e in produc t s or systems tha t may pose a direct threat to huma n life or bodily injury (ar tificial life supp ort devices or systems; s urgical implantations ; etc.), or may cause ser ious property damage (s pace system; unders ea repeaters ; nuclear power cont rol systems; a ircraft control systems; key pla nt systems; milit ary equipment; etc. ). Renesa s El ectroni cs dis claims a ny and al l liab ilit y for any damages or los ses i ncurred b y you or any thi rd parties arising from the use of any Renes as Electronics product that is inconsistent with any Renesa s Electronics data sheet, us er’s manual or other Renesas Electronics document.

6. When using Renesas Elect roni cs product s, r efer to t he lates t product informa tion ( data sheet s, user ’s manu als, applica tion not es, “Genera l Notes for Handling a nd Using Semic onductor Devices ” in the relia bility handbook, etc.), and ens ure that usage c onditions are w ithin the ranges specified by Renesas Electronics with respect to maximum ratings, operating power supply voltage range, heat dissipation characterist ics, insta llation, etc. Renesa s Electr onics dis claims any and a ll liabi lity for any ma lfunct ions, fa ilure or acc ident aris ing out of the use of Renesas Electronics products outside of such specified ranges.

7. Although Renesa s Electroni cs endeavors to imp rove the qual ity and relia bility of Renes as Electroni cs products, semiconductor products have specific cha racteristics, such as the occurrenc e of failure at a certain rate and malf unctions under certain use conditi ons. Unless designated as a high reliability product or a product for harsh environments in a Renesas Electronics data sheet or other Renesas Electronics document, Renesa s Elect ronics produc ts are not s ubject t o radiation res istance des ign. You are r esponsib le for implement ing safety measures to gua rd aga ins t the pos sibi lity of b odil y injur y, injur y or da mage c aus ed by fir e, a nd/or d anger t o the p ublic in the e vent of a failure or malf unction of Renesas Elec tronics pr oducts, s uch as safety design for hardware a nd software, including b ut not limit ed to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the e valuat ion of mic roc omputer s oft ware a lone is very dif fi cult and imp ract ical, you are res pons ibl e for eval uat ing the s afet y of the final products or systems manufactured by you.

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9. Renesas Electr oni cs pr oduc ts and t echnol ogi es s ha ll not be us ed f or or incorp or ated i nt o any pr oduc ts or s ystems whos e manuf act ur e, us e, or sale is pr ohibited under a ny applica ble domestic or foreign laws or regulati ons. You shall comply with an y applicabl e export contr ol laws and regulations promulgated and administered by the governments of any countries asserting jurisdiction over the parties or transactions.

10. It is the respons ibility of the buyer or distributor of Renesas Electronics products, or any other party who dist ributes, disposes of, or otherwise sell s or tr ansf er s the p r oduct to a thi rd pa r ty, t o noti f y such t hir d p ar ty in a dvanc e of the c ont ent s a nd condi t ions s et f orth i n t his document.

11. This document sha ll not be repri nted, rep roduced or dup licated i n any form, in whole or in part, wit hout prior wr itten consent of Renesa s Electronics.

12. Please contact a Renesas Electronics sales of fi ce if you have any questions regar ding the information contained in t his document or Renesas Electronics products .

(Note 1) “Renesa s Electronics” as used in this doc ument means Re nesas Electr onics Corpora tion and als o includes its directly or indir ectly

controlled subsidiaries.

(Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.

(Rev.4.0-1 November 2017)

General Preca ut ions in the Handling of Microprocessing Unit and Microcontroller Unit Products

The following usage notes are applicab le to all Microprocessing unit and Microcontroller unit products from Renesas. For detailed usage notes on the products covered by thi s document, refer to the relevant sections of the document as well as any technical updates that have been issued for the products.

1. Handling of Unused Pins Handle unused pins in accordance with the directions given under Handling of Unused Pins in the

manual.  The input pins of CMOS products are generally in the high-impedance state. In operation with an

unused pin in the open-circuit state, extra electromagnetic noise is induced in the vicinity of LSI, an associated shoot-through current flows internally, and malfunctions occur due to the false recognition of the pin state as an input signal become possible. Unused pins should be handled as described under Handling of Unused Pins in the manual.

2. Processing at Power-on The state of the produc t is undef in ed at the moment when power is supplied.  The states of internal circuits in the LSI are indeterminate and the states of register settings and

pins are undefined at the moment when power is supplied. In a finished product where the reset signal is applied to the external reset pin, the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed. In a similar way, the states of pins in a product that is reset by an on-chip power-on reset function are not guaranteed from the moment when power is supplied until the power reaches the level at which resetting has been specified.

3. Prohibition of Access to Reserved Addresses Access to reserved addresses is prohibited.  The reserved addresses are provided for the possible future expansion of functions. Do not access

these addresses; the correct operation of LSI is not guaranteed if they are accessed.

4. Clock Signals After applying a reset, only release the reset line after the operating clock signal has become stable.

When switching the clock signal during program execution, wait until the target clock signal has stabilized.

 When the clock signal is generated with an external resonator (or from an external oscillator)

during a reset, ensure that the reset line is only released after full stabilization of the clock signal. Moreover, when switching to a clock signal produced with an external resonator (or by an external oscillator) while program execution is in progress, wait until the target clock signal is stable.

5. Differences between Products Before changing from one product to another, i.e. to a product with a different part number, confirm

that the change will not lead to problems.  The characteristics of Microprocessing unit or Microcontroller unit products in the same group but

having a different part number may differ in terms of the internal memory capacity, layout pattern, and other factors, which can affect the ranges of electrical characteristics, such as characteristic values, operating margins, immunity to noise, and amount of radiated noise. When changing to a product with a different part number, implement a system-evaluation test for the given product.

WEEE Directive

Renesas development tools and products are directly covered by the European Union's Waste Electrical and Electronic Equipment, (WEEE), Directive 2002/96/EC. As a result, this equipment, including all accessories, must not be disposed of as household waste but through your locally recognised recycling or disposal schemes. As part of our commitment to environmental responsibility Renesas also offers to take back the equipment and has implemented a Tools Product Recycling Program for customers in Europe. This allows you to return equipment to Renesas for disposal through our approved Producer Compliance Scheme. To register for the program, click here "http://www.renesas.com/weee".

How to use this manual

1. Purpose and Target Readers

This manual is designed to provide the user with an understanding of the functions and operating specifications of this CPU board. This manual is intended for all users of this CPU board. A basic knowledge of electric circuits, logical circuits, and MCUs is necessary in order to use this manual.

The manual comprises an overview of the product, functional specifications, and operating specifications.

Before using this CPU board, thoroughly understand the notes provided in the text of each section in this manual.

The revision history summarizes the locations of revisions and additions. It does not list all revisions. Refer to the text of the manual for details.

The following document applies to the RZ/A2M CPU Board RTK7921053C00000BE.

Document Type

Description

Document Title

Document No.

User’s manual

Description of functional specifications (mounted devices, memory map, electrical characteristics, etc.) and operating specifications (connectors, switches, etc.)

RZ/A2M CPU Board RTK7921053C00000BE User's Manual

This user’s manual

The following documents apply to the RZ/A2M group. Make sure to refer to the latest versions of these documents. The newest versions of the documents listed may be obtained from the Renesas Electronics Web site.

document Type

Description

Document Title

Document No.

Application note

Application examples, reference programs, etc.

Available from Renesas Electronics Web site.

RENESAS TECHNICAL UPDATE

Prompt reports on product specifications, documents, etc.

2. Abbreviations

Abbreviation

Full Form

ACIA

Asynchronous Communications Interface Adapter

bps

bits per second

CRC

Cyclic Redundancy Check

DMA

Direct Memory Access

DMAC

Direct Memory Access Controller

GSM

Global System for Mobile Communications

Hi-Z

High Impedance

IEBus

Inter Equipment Bus

I/O

Input/Output

IrDA

Infrared Data Association

LSB

Least Significant Bit

MSB

Most Significant Bit

NC

Non-Connect

PLL

Phase Locked Loop

PWM

Pulse Width Modulation

SFR

Special Function Register

SIM

Subscriber Identity Module

UART

Universal Asynchronous Receiver/Transmitter

VCO

Voltage Controlled Oscillator

All trademarks and registered trademarks are the property of their respective owners.

RZ/A2M CPU Board RTK7921053C00000BE 1. Overview

R20UT4397EJ0100 Rev.1.00 1-1

2018.10.11

1. Overview

1.1 Overview

RTK7921053C00000BE is a CPU board to evaluate the functions and performance of the Renesas Electronics microprocessor RZ/A2M “R7S921053VCBG” and to develop and evaluate application software programs

The RTK7921053C00000BE CPU board has the following features.

● This CPU board contains the following external memory.

➢ Serial flash memory: 64 Mbytess x 1 ➢ HyperMCP (HyperFlash: 64 Mbytes and HyperRAM: 8 Mbytes) x 1

● One of serial flash memory, HyperMCP, and NAND flash memory with built-in SD controller is selectable as

boot memory.

● A USB Type-C connector and a microSD card slot are mounted as standard as an RZ/A2M peripheral function

interface.

● A Type-C receptacle is mounted as standard as a USB connector.

● A 15-pin FPC MIPI CSI-2 connector is mounted as a high-speed serial interface for camera devices.

● Pins that nor not used in this board are connected to the SODIMM connector (J2) that can be used in connection

with the RZ/A2M SUB board (model: RTK79210XXB00000BE). Furthermore, an expansion board can be developed in accordance with the development applications.

● This CPU board contains a CoreSight 20 connector for connection to the RZ/A2M user debug interface.

RZ/A2M CPU Board RTK7921053C00000BE 1. Overview

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1.2 Configuration

Figure 1.1 shows an example of system configuration using RTK7921053C00000BE.

Figure 1.1 Example of System Configuration Using RTK7921053C00000BE

ICE

*

CoreSight

RZ/A2M SUB board

RTK79210XXB00000BE

*: Should be procured on the customer side.

Debugger

Host computer

＊

Power supply through USB

(Max.500mA)

RZ/A2M

RZ/A2M CPU board

RTK7921053C00000BE

USB MIPImicroSD

RZ/A2M CPU Board RTK7921053C00000BE 1. Overview

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1.3 Features

Table 1.1 shows the features of RTK7921053C00000BE.

Table 1.1 Features of RTK7921053C00000BE

item

details

CPU

RZ/A2M

• Input (XIN) clock: 24 MHz

• CPU clock (Iφ): max. 528 MHz

• Image clock (Gφ): max. 264 MHz

• Internal bus clock (Bφ): max. 132 MHz

• External bus clock (CKIO): max. 132 MHz

• Peripheral clock 1 (P1φ): max. 66 MHz

• Peripheral clock 0 (P0φ): max. 33MHz

• Internal memory

large capacity internal RAM: 4 Mbytes Cache memory: 32 Kbytes Data cache: 32 Kbytes (write-back type)

• Power voltage: internal: 1.2 V, I/O: 3.3 V, 1.8 V

• 324-Pin BGA 0.8 mm pitch (package code: PRBG0324GA-A)

Memory

• Serial flash memory: 64 Mbytes x 1

‐Macronix MX25L51245GXDI-08G

• HyperMCP (HyperFlash: 64 Mbytes and HyperRAM: 8 Mbytes) x 1

‐Cypress S71KS512SC0BHV000

Connector

• USB Type-C receptacle: 1

• microSD card slot (4 bits): 1

• MIPI CSI-2 connector (15 pins): 1

• User debug interface connector (CoreSight 20): 1

• SUB board connector (204 pins): 1

LED

• Power source LED: 1

• User LED: 1 (Dual)

Switch

• Reset switch: 1

• System setting DIP switch: 8 bits

Circuit board specifications

• Dimensions: 67.6 mm x 50 mm

• Mount: Double-sided mounting (8 layers)

• Configuration: Single board

RZ/A2M CPU Board RTK7921053C00000BE 1. Overview

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1.4 Outside View

Figure 1.2 shows the outside view of RTK7921053C00000BE.

Figure 1.2 Outside View of RTK7921053C00000BE

RZ/A2M CPU Board RTK7921053C00000BE 1. Overview

R20UT4397EJ0100 Rev.1.00 1-5

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1.5 Block Diagram

Figure 1.3 shows the block diagram of RTK7921053C00000BE.

Figure 1.3 Block Diagram of RTK7921053C00000BE

SUB board

Connector

RZ/A2M

(324BGA)

microSD card

slot

Memory

System

Bootable

UDI

RESET

90Ω

4

RSPI

VBUS

Power Switch

USB

Type-C

CoreSight 20

SDHI1

USB1

EN0

CC logic RIICx

INTC

CSI-2

MIPI Input

(FFC 15)

100Ω

GPIO

INTC

ch0

SDHI

ch0

VBUS0

ch2

RIIC

GPIO

OC0

USB

BSC

VDC6

4

RMII:4

SCIFA

ADC

24

CEU

16

ETHERC

SSIF-2

FLCTL

16

8

LVDS

100Ω

ch0

ch1

ch4

ch3

32

DRP

ch6

NMI, IRQ0

SPIBSC

4

Serial Flash

HMIF

8

HyperMCP

90Ω

RZ/A2M CPU Board RTK7921053C00000BE 1. Overview

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1.6 Layout of Components

Figure 1.4 and Figure 1.5 show the layout of main components of RTK7921053C00000BE.

Figure 1.4 Layout of Components of RTK7921053C00000BE (C Side Top View)

U1:

RZ/A2M

CN1: microSD card slot

J2:

SUB board connector

CN3: USB Type-C

Receptacle

CN4: Power source

connector (Opt.)

CN2: MIPI CSI-2

connector

CN5:

CoreSight20 connector

SW2:

Reset switch

SW1: For system

settings

DIP switch

J1: MIPI CSI-2 connector

(Opt.)

U2:

Serial flash memory

U3:

HyperMCP

RZ/A2M CPU Board RTK7921053C00000BE 1. Overview

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Figure 1.5 Layout of Components of RTK7921053C00000BE (S Side Top View)

U15:

Reset IC

X2: USB resonator

(48MHz)

X1: XIN resonator

(24 MHz)

X3: RTC resonator

(32.768 kHz)

U7: USB Type-C

CC logic controller

U8: 3.3 V regulator

U9: 1.8 V regulator

U10: 1.2 V regulator

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Table 1.2 and Table 1.3 list main components mounted on RTK7921053C00000BE.

Table 1.2 Main Components on RTK7921053C00000BE (1) IC

Component

Number

Component Name

Type (Manufacturer)

Recommended Optional

Components

U1 CPU R7S921053VCBG (Renesas)

U2

Serial flash memory

MX25L51245GXDI-08G (Macronix)

U3

HyperMCP

S71KS512SC0BHV000 (Cypress)

U7 USB Type-C CC logic controller

TUSB320LIRWBR (TI) U8 3.3 V regulator

ISL80030AFRZ-T7A (Intersil)

5 V→3.3 V

U9 1.8 V regulator

ISL80020AIRZ-T7A (Intersil)

5 V→1.8 V

U10 1.2 V regulator

ISL80020AIRZ-T7A (Intersil)

5 V→1.2 V

U15 Reset IC

TPS3808G01DBV (TI)

X1

Crystal resonator for XIN

CX1612DB24000D0PPSCC (Kyocera)

24 MHz

X2 Crystal resonator for USB

CX1612DB48000D0PPSC1 (Kyocera)

48 MHz

X3 Crystal resonator for RTC

ST2012SB32768H5HPWAA (Kyocera)

32.768 kHz

Table 1.3 Main Components on RTK7921053C00000BE (2) Connector

Component

Number

Component Name

Type (Manufacturer)

Recommended Optional

Parts

J1 MIPI CSI-2 connector (Optional) (15pins)

Not used

LL1013-04A-15 (LANL)

J2 SUB board connector (SODIMM 204 pins)

CN1 microSD card slot

DM3AT-SF-PEJM5 (HRS)

CN2 MIPI CSI-2 connector (15 pins)

1-1734248-5 (TE)

CN3 USB Type-C receptacle

DX07S024XJ1 (JAE)

CN4 Power source connector (Optional)

Not used

A2-2PA-2.54DSA(71) (HSR)

CN5 CoreSight20 connector (20 pins)

FTSH-110-01-L-DV (Samtec)

RZ/A2M CPU Board RTK7921053C00000BE 1. Overview

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1.7 Memory Mapping

Figure 1.6 shows the RZ/A2M memory mapping of RTK7921053C00000BE.

Logical address

RZ/A2M Logical space

RTK7921053C00000BE

Memory mapping

H'0000 0000

CS0 space: 64 MB

-

H'0400 0000

CS1 space: 64 MB

-

H'0800 0000

CS2 space: 64 MB

-

H'0C00 0000

CS3 space: 64 MB

-

H'1000 0000

CS4 space: 64 MB

-

H'1400 0000

CS5 space: 64 MB

-

H'1800 0000

Others: 128 MB

H'2000 0000

SPI multi I/O bus space: 256 MB

Serial flash memory (64 MB)

H’2400 0000

-

H'3000 0000

HyperFlash space: 256 MB

HyperFlash (64MB)

H’3400 0000

-

H'4000 0000

HyperRAM space: 256 MB

HyperRAM (8MB)

H'4080 0000

-

H'5000 0000

OctaFlash space: 256 MB

-

H'6000 0000

OctaRAM space: 256 MB

-

H'7000 0000

Reserved (cannot be used)

H'8000 0000

Large capacity internal RAM: 4 MB

H'8040 0000

Others: 2044MB

H'FFFF FFFF

Figure 1.6 RZ/A2M Memory Mapping

RZ/A2M CPU Board RTK7921053C00000BE 1. Overview

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1.8 Absolute Maximum Ratings

Table 1.4 lists absolute maximum ratings of RTK7921053C00000BE.

Table 1.4 Absolute Maximum Ratings of RTK7921053C00000BE

Symbol

Item

Rated Value

Note

D5V

5 V power voltage

－0.3 V to 6.25 V

Reference: Vss

T

opr

Operating ambient temperature *

0 °C to 50 °C

Do not expose to condensation or corrosive gases T

stg

Storage temperature *

－10 °C to 60 °C

Do not expose to condensation or corrosive gases

[Note] * Ambient temperature is the air temperature at a position as close to the board as possible.

1.9 Operating Conditions

Table 1.5 lists operating conditions of RTK7921053C00000BE.

Table 1.5 Operating Conditions of RTK7921053C00000BE

Symbol

Item

Rated Value

Note

D5V

5 V power voltage

4.5 V to 5.5 V

Reference: Vss

－

Maximum power consumption

1 A

5 V, 3.3 V, 1.8 V, 1.2 V power source overall values

T

opr

Operating ambient temperature *

0 °C to 40 °C

Do not expose to condensation or corrosive gases

[Note] * Ambient temperature is the air temperature at a position as close to the board as possible.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-1

2018.10.11

2. Functional Specifications

2.1 Overview of Functions

Table 2.1.1 lists function modules of RTK7921053C00000BE.

Table 2.1.1 Function Modules of RTK7921053C00000BE

Section Function

Description

2.2

CPU

• RZ/A2M

- Input (XIN) clock: 24 MHz

- CPU clock: max. 528 MHz

- Bus clock: max. 132 MHz

2.3

Memory

• On-chip memory

- Large capacity on-chip RAM: 4 Mbytes

⚫ Serial flash memory: 64 Mbytes x 1

‐ Macronix MX25L51245GXDI-08G

⚫ HyperMCP (HyperFlash: 64 Mbytes, HyperRAM: 8 Mbytes) x 1

‐ Cypress S71KS512SC0BHV000

2.4

USB Interface

Connection between

RZ/A2M USB2.0 host/function module and USB connector

2.5

MIPI CSI-2 Interface

Connection between

RZ/A2M MIPI CSI-2 interface and FPC connector

2.6

I/O Ports

Connection between

RZ/A2M Input/output port and LEDs/DIP switches

2.7

Clock Configuration

System clock configuration

2.8

Reset Control

Reset control for devices mounted on RTK7921053C00000BE

2.9

Power Supply Configuration

System power supply configuration of

RTK7921053C00000BE

2.10

Debug Interface

Connection between RZ/A2M user debug interface and CoreSight20 connector

2.11

SD/MMC Host

Interface (4 bits)

Connection between RZ/A2M SD/MMC host interface (SDHI) channel 0 and microSD card slot

―

Operating specifications

Connectors, switches, and LEDs Details are described in Chapter 3

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-2

2018.10.11

2.2 CPU

2.2.1 Overview of RZ/A2M

RTK7921053C00000BE contains a 32 bit RISC microcomputer RZ/A2M that runs in synchronization with the CPU clock (max. 528 MHz).

2.2.2 List of RZ/A2M Pin Functions

Table 2.2.1 to Table 2.2.14 list RZ/A2M pin functions used in RTK7921053C00000BE.

Table 2.2.1 List of Selections of RZ/A2M Pin Functions (1)

U1 Pin

Pin Name

Pin Function

Description

J2 Pin

Note

A1

Vcc

A2

QSPI1_IO3

Connected to the serial flash memory (U2)

― A3

QSPI1_SPCLK

Connected to the serial flash memory (U2)

― A4

RPC_WP#

Open

― A5

QSPI0_IO3

Connected to the serial flash memory (U2)

―

A6

PVcc_SPI

3.3V JP1: 1-2

A7

Vss

A8

PVcc

A9

PF_4 / RxD2 / DV0_DATA19 / LCD0_DATA4 / MTIOC6A / SSIBCK0 / IRQ1

DV0_DATA19

Used on the SUB board

113

LCD0_DATA4

A10

PE_6 / ET0_MDIO / VIO_D2 / SSIRxD0 / MTIOC0D / CC2_RD1

ET0_MDIO

Used on the SUB board

107

VIO_D2

A11

PL_2 / MD_BOOT2 / IRQ6

MD_BOOT2

Connected to the DIP switch (SW1)

―

PD_0: High SW1-3

IRQ6

Connected to the CC logic controller for USB (U7)

PD_0: Low

A12

PE_5 / ET0_MDC / VIO_D3 / SSITxD0 / MTIOC0C / CC1_RD1

ET0_MDC

Used on the SUB board

103

VIO_D3

A13

P8_4 / A4 / DRP20 / DV0_DATA13 / SSL00 / SSIRxD3

A4

Used on the SUB board

101

DRP20

SSL00

A14

P8_6 / A6 / DRP18 / DV0_DATA11 / MOSI0 / SSIFS3

A6

Used on the SUB board

95

DRP18

MOSI0

A15

PE_4 / ET0_CRS/RMII0_CRSDV / VIO_D4 / SSIFS0 / MTIOC0B

ET0_CRS/RMII0_CRS DV

Used on the SUB board

91

VIO_D4

A16

P9_1 / A9 / DRP15 / DV0_DATA8 / RxD4 / SSIFS2

A9

Used on the SUB board

83

DRP15

RxD4

A17

PVcc

A18

Vss

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-3

2018.10.11

Table 2.2.2 List of Selections of RZ/A2M Pin Functions (2)

U1 Pin

Pin name

Pin Function

Description

J2 pin

Note

A19

PE_1 / ET0_RXD0/RMII0_RXD0 / VIO_D7 / RxD2 / POE8 / VBUSIN1 / IRQ1

ET0_RXD0/RMII0_RXD0

Used on the SUB board

73

VIO_D7

A20

PA_4 / A20 / DV0_DATA9 / LCD0_DATA14 / SCI_TXD0 / MTIOC0C

DV0_DATA9

Used on the SUB board

69

LCD0_DATA14

A21

CKIO

Used on the SUB board

54 A22

Vss

B1

PK_1 / ET1_TXD0/RMII1_TXD0 / NAF4 / CC1_RA0 / CAN_CLK / SSIDATA2

ET1_TXD0/RMII1_TXD0

Used on the SUB board

137

NAF4

B2

Vcc

B3

QSPI1_IO1

Connected to the serial flash memory (U2)

― B4

QSPI1_IO0

Connected to the serial flash memory (U2)

― B5

RPC_RESET#

Connected to the serial flash memory (U2)

― B6

QSPI0_IO1

Connected to the serial flash memory (U2)

― B7

QSPI0_SPCLK

Connected to the serial flash memory (U2)

―

B8

PF_5 / TxD2 / DV0_DATA20 / LCD0_DATA3 / MTIOC6B / SSIFS0

DV0_DATA20

Used on the SUB board

115

LCD0_DATA3

B9

P6_3 / ET0_TXD1/RMII0_TXD1 / VIO_HD / TxD3 / POE0

ET0_TXD1/RMII0_TXD1

Used on the SUB board

111

VIO_HD

B10

PH_0 / AUDIO_CLK / VIO_D1 / GTIOC4A / MTIOC1A / CC1_RD0 / IRQ3

VIO_D1

Used on the SUB board

105

B11

PL_3 / MD_BOOT1 / IRQ7

MD_BOOT1

Connected to the DIP switch (SW1)

―

PD_0: High SW1-4

IRQ7

Connected to the USB CC logic controller (U7)

PD_0: Low

B12

PL_1 / MD_CLK / IRQ5 MD_CLK

Connected to the DIP switch (SW1)

48 PD_0: High SW1-2

IRQ5

Used on the SUB board

PD_0: Low

B13

P8_3 / A3 / DRP21 / DV0_DATA14 / MTIOC6A / GTIOC3A

A3

Used on the SUB board

97 DRP21

B14

PF_2 / TxD3 / DV0_DATA17 / LCD0_DATA6 / MTIOC7C / MISO1

DV0_DATA17

Used on the SUB board

93 LCD0_DATA6

B15

P8_7 / A7 / DRP17 / DV0_DATA10 / RSPCK0 / SSIBCK3

A7

Used on the SUB board

87

DRP17

RSPCK0

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-4

2018.10.11

Table 2.2.3 List of Selections of RZ/A2M Pin Functions (3)

Pin Name

Pin Function

Description

J2 Pin

Note

B16

PE_3 / ET0_RXER/RMII0_RXER / VIO_D5 / SSIBCK0 / MTIOC0A

ET0_RXER/RMII0_RXER

Used on the SUB board

79 VIO_D5

B17

PA_0 / A16 / DV0_DATA13 / LCD0_DATA10 / SCI_TXD1 / MTIOC8C

DV0_DATA13

Used on the SUB board

77 LCD0_DATA10

B18

PA_3 / A19 / DV0_DATA10 / LCD0_DATA13 / SCI_CTS0/RTS0 / MTIOC0D

DV0_DATA10

Used on the SUB board

68 LCD0_DATA13

B19

PA_5 / A21 / DV0_DATA8 / LCD0_DATA15 / SCI_RXD0 / MTIOC0B / IRQ5

DV0_DATA8

Used on the SUB board

71 LCD0_DATA15

B20

PA_6 / A22 / DV0_DATA7 / LCD0_DATA16 / SCI_SCK0 / MTIOC0A

DV0_DATA7

Used on the SUB board

67 LCD0_DATA16

B21

Vss Connected to the DIP switch (SW1)

―

SW1-8: ON

B22

PVcc

C1

PH_2 / CTS2 / DV0_DATA22 / LCD0_DATA1 / MTIOC6D / SSIRxD0

DV0_DATA22

Used on the SUB board

143

LCD0_DATA1

C2

P8_2 / A2 / DRP22 / DV0_DATA15 / GTIOC5A / IRQ2

A2

Used on the SUB board

141

DRP22

C3

Vcc

C4

QSPI1_SSL

Connected to a serial flash memory (U2)

―

C5

RPC_INT#

Connect to the serial flash memory (U2)

― C6

QSPI0_SSL

Connected to the serial flash memory (U2)

― C7

QSPI0_IO0

Connected to the serial flash memory (U2)

―

C8

P6_1 / ET0_TXEN/RMII0_TXDEN / VIO_CLK / SCK3 / MTIOC2A

ET0_TXEN/RMII0_TXDEN

Used on the SUB board

119

VIO_CLK

C9

P6_2 / ET0_TXD0/RMII0_TXD0 / VIO_VD / RxD3 / MTIOC2B / OTG_EXICEN1 / IRQ0

ET0_TXD0/RMII0_TXD0

Used on the SUB board

106

VIO_VD

C10

PH_1 / AUDIO_XOUT / VIO_D0 / GTIOC4B / MTIOC1B / CC2_RD0 / IRQ2

VIO_D0

Used on the SUB board

126

C11

PL_4 / MD_BOOT0 / IRQ0

MD_BOOT0

Connect with DIP switch (SW1)

―

SW1-5

C12

PL_0 / MD_CLKS / IRQ4

IRQ4

Used on the SUB board

50

PD_0: Low

MD_CLKS

Connected to the DIP switch (SW1)

―

PD_0: High SW1-1

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-5

2018.10.11

Table 2.2.4 List of Selections of RZ/A2M Pin Functions (4)

U1 Pin

Pin Name

Pin Function

Description

J2 Pin

Note

C13

P8_5 / A5 / DRP19 / DV0_DATA12 / MISO0 / SSITxD3

A5

Used on the SUB board

92 DRP19

C14

PF_1 / RxD3 / DV0_DATA16 / LCD0_DATA7 / MTIOC7B / MOSI1 / IRQ4

DV0_DATA16

Used on the SUB board

88 LCD0_DATA7

C15

P9_0 / A8 / DRP16 / DV0_DATA9 / TxD4 / SSIDATA2

A8

Used on the SUB board

84

DRP16

TxD4

C16

PE_2 / ET0_RXD1/RMII0_RXD1 / VIO_D6 / TxD2 / POE10

ET0_RXD1/RMII0_RXD1

Used on the SUB board

78 VIO_D6

C17

PA_2 / A18 / DV0_DATA11 / LCD0_DATA12 / SCI_SCK1 / MTIOC8A

DV0_DATA11

Used on the SUB board

74 LCD0_DATA12

C18

PG_0 / ET0_TXCLK / VIO_D8 / RSPCK0 / MTIOC3A / HM_RSTO#

VIO_D8

Used on the SUB board

72 C19

PB_0 / A24 / DV0_DATA5 / LCD0_DATA18 / SSITxD1 / POE8

DV0_DATA5

Used on the SUB board

64 LCD0_DATA18

C20

Vss Connected to the DIP switch (SW1)

―

SW1-7: ON

C21

PD_7 / RIIC3SDA / IRQ7

RIIC3SDA

Used on the SUB board

58

C22

PD_3 / RIIC1SDA / IRQ3 / MTCLKD / GTETRGD

PD_3

Connected to the MIPI CSI-2 connector (CN2, J1)

―

D1

PVcc

D2

BSCANP

Connected to the DIP switch (SW1)

―

SW1-6

D3

P8_1 / A1 / DRP23 / DV0_DATA16 / GTIOC5B / IRQ3

A1

Used on the SUB board

128

DRP23

D4

Vcc

D5

QSPI1_IO2

Connected to the serial flash memory (U2)

―

D6

Vss

D7

QSPI0_IO2

Connected to the serial flash memory (U2)

―

D8

PK_0 / ET1_TXEN/RMII1_TXDEN / NAF3 / CC1_RD0 / MTIOC1B / SSIBCK2

ET1_TXEN/RMII1_TXDEN

Used on the SUB board

110

NAF3

D9

PF_6 / RTS2 / DV0_DATA21 / LCD0_DATA2 / MTIOC6C / SSITxD0

DV0_DATA21

Used on the SUB board

108

LCD0_DATA2

D10

PE_0 / ET0_RXCLK/REF50CK0 / VIO_FLD / SCK2 / POE4

ET0_RXCLK/REF50CK0

Used on the SUB board

102

VIO_FLD

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-6

2018.10.11

Table 2.2.5 List of Selections of RZ/A2M Pin Functions (5)

U1 Pin

Pin Name

Pin Function

Description

J2 Pin

Note

D11

PF_3 / SCK2 / DV0_DATA18 / LCD0_DATA5 / MTIOC7D / SSL10

DV0_DATA18

Used on the SUB board

124

LCD0_DATA5

D12

PVcc

D13

Vss

D14

PF_0 / SCK3 / DV0_DATA15 / LCD0_DATA8 / MTIOC7A / RSPCK1

DV0_DATA15

Used on the SUB board

90 LCD_DATA8

D15

P8_0 / A0 / DV0_DATA14 / LCD0_DATA9 / SCI_CTS1/RTS1 / MTIOC8D

DV0_DATA14

Used on the SUB board

86 LCD0_DATA9

D16

PA_1 / A17 / DV0_DATA12 / LCD0_DATA11 / SCI_RXD1 / MTIOC8B / IRQ6

DV0_DATA12

Used on the SUB board

80 LCD0_DATA11

D17

PA_7 / A23 / DV0_DATA6 / LCD0_DATA17 / SSIRxD1 / POE10

DV0_DATA6

Used on the SUB board

76 LCD0_DATA17

D18

PVcc

D19

Vss

D20

PD_6 / RIIC3SCL / IRQ6

RIIC3SCL

Used on the SUB board

60

D21

PD_4 / RIIC2SCL / IRQ4

RIIC2SCL

Connected to the MIPI CSI-2 connector (CN2, J1) or USB CC logic controller (U7)

―

D22

PD_1 / RIIC0SDA / IRQ1 / MTCLKB / GTETRGB

PD_1

Controlling power supply to PVcc_SD0

―

0：1.8V 1：3.3V

E1

Vss

E2

PH_3 / HM_RSTO# / RTS2 / GTIOC6A / MTIOC2A / SD0_CD / IRQ3

HM_RSTO#

Connected to the HyperMCP (U3)

―

E3

PK_3 / ET1_RXCLK/REF50CK1 / NAF6 / CC2_RD0 / CAN0RX_DATARATE_EN / MOSI0

ET1_RXCLK/REF50CK1

Used on the SUB board

132

NAF6

E4

PK_2 / ET1_TXD1/RMII1_TXD1 / NAF5 / VBUSEN1 / CAN0RX / RSPCK0 / IRQ5

ET1_TXD1/RMII1_TXD1

Used on the SUB board

133

NAF5

E19

PD_5 / RIIC2SDA / IRQ5

RIIC2SDA

Connected to the MIPI CSI-2 connector (CN2, J1) or USB CC logic controller (U7)

―

E20

PD_2 / RIIC1SCL / IRQ2 / MTCLKC / GTETRGC

PD_2

Connected to the MIPI CSI-2 connector (CN2, J1)

―

E21

JP0_3 / TCK

TCK

Connected to the UDI connector (CN5)

― E22

JP0_0 / TDI

TDI

Connected to the UDI connector (CN5)

―

F1

PVcc_HO

1.8V JP2: 2-3

F2

HM_CS0#/OM_CS0#

HM_CS0#

Connected to the HyperMCP (U3)

― F3

HM_CK/OM_SCLK

HM_CK

Connected to the HyperMCP (U3)

―

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-7

2018.10.11

Table 2.2.6 List of Selections of RZ/A2M Pin Functions (6)

Pin Name

Pin Function

Description

J2 Pin

Note

F4

PF_7 / GTETRGD / DV0_DATA23 / LCD0_DATA0 / MTCLKD / IRQ1

DV0_DATA23

Used on the SUB board

136

LCD0_DATA0

F19

PD_0 / RIIC0SCL / IRQ0 / MTCLKA / GTETRGA

PD_0

Controlling PL_[3:0] connection destination

―

0：IRQ input 1：SW1

F20

JP0_4 / TRST#

TRST#

Connected to the UDI connector (CN5)

― F21

JP_2 / TMS

TMS

Connected to the UDI connector (CN5)

―

F22

PB_1 / A25 / DV0_DATA4 / LCD0_DATA19 / SSIFS1 / POE4

DV0_DATA4

Used on the SUB board

63

LCD0_DATA19

G1

HM_DQ1/OM_SIO1

HM_DQ1

Connected to the HyperMCP (U3)

― G2

HM_RWDS/OM_DQS

HM_RWDS

Connected to the HyperMCP (U3)

― G3

HM_CS1#/OM_CS1#

HM_CS1#

Connected to the HyperMCP (U3)

― G4

HM_CK#

Connected to the HyperMCP (U3)

― G19

JP0_1 / TDO

TDO

Connected to the UDI connector (CN5)

―

G20

PB_2 / BS / DV0_DATA3 / LCD0_DATA20 / SSIBCK1 / POE0

DV0_DATA3

Used on the SUB board

66

LCD0_DATA19

G21

PB_3 / CS0 / DV0_DATA2 / LCD0_DATA21 / SSIDATA2 / CTS0

DV0_DATA2

Used on the SUB board

61

LCD0_DATA21

G22

P9_2 / A10 / DRP14 / DV0_DATA7 / SCK4 / SSIBCK2

A10

Used on the SUB board

59

DRP14

H1

HM_DQ4/OM_SIO4

HM_DQ4

Connected to the HyperMCP (U3)

― H2

HM_DQ2/OM_SIO2

HM_DQ2

Connected to the HyperMCP (U3)

― H3

HM_DQ3/OM_SIO3

HM_DQ3

Connected to the HyperMCP (U3)

― H4

HM_DQ0/OM_SIO0

HM_DQ0

Connected to the HyperMCP (U3)

―

H19

PB_4 / CS1 / DV0_DATA1 / LCD0_DATA22 / SSIFS2 / RTS0

DV0_DATA1

Used on the SUB board

40

LCD0_DATA22

H20

P9_3 / A11 / DRP13 / DV0_DATA6 / SSIRxD0

A11

Used on the SUB board

42

DRP13

SSIRxD0

H21

PB_5 / WAIT / DV0_DATA0 / LCD0_DATA23 / SSIBCK2 / TxD0

DV0_DATA0

Used on the SUB board

57

LCD0_DATA23

H22

P9_5 / A13 / DRP11 / DV0_DATA4 / SSIFS0 A13

Used on the SUB board

55

DRP11

SSIFS0

J1

HM_RESET#/OM_RESET#

HM_RESET#

Connected to the HyperMCP (U3)

― J2

HM_DQ6/OM_SIO6

HM_DQ6

Connected to the HyperMCP (U3)

― J3

HM_DQ7/OM_SIO7

HM_DQ7

Connected to the HyperMCP (U3)

― J4

HM_DQ5/OM_SIO5

HM_DQ5

Connected to the HyperMCP (U3)

― J9

Vcc

J10

Vss

J11

Vss

J12

Vss

J13

Vss

J14

Vcc

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-8

2018.10.11

Table 2.2.7 List of Selections of RZ/A2M Pin Functions (7)

Pin Name

Pin Function

Description

J2 Pin

Note

J19

P9_4 / A12 / DRP12 / DV0_DATA5 / SSITxD0

A12

Used on the SUB board

112

DRP12

SSITxD0

J20

P7_7 / RD / DV0_HSYNC / LCD0_TCON0 / GTIOC3B / RxD0

DV0_HSYNC

Used on the SUB board

44

LCD0_TCON

J21

P7_6 / AH / DV0_VSYNC / LCD0_TCON1 / GTIOC3A / SCK0

GTIOC3A

Used on the SUB board

53

DV0_VSYNC

J22

P9_6 / A14 / DRP10 / DV0_DATA3 / SSIBCK0

A14

Used on the SUB board

49

DRP10

SSIBCK0

K1

Vss

K2

PJ_6 / GTETRGC / FCE / LCD0_CLK / MTCLKC / IRQ0

LCD0_CLK

Used on the SUB board

147

FCE

K3

PH_4 / HM_INT# / CTS2 / GTIOC6B / MTIOC2B / SD0_WP / IRQ2

HM_INT#

Connected to the HyperMCP (U3)

― K4

PJ_0 / TRACECLK / SPDIF_OUT / VRAMMON0 / SCK1 / SSIRxD3

TRACECLK

Connected to the UDI connector (CN5)

―

K9

Vcc

K10

Vss

K11

Vss

K12

Vss

K13

Vss

K14

Vcc

K19

P9_7 / A15 / DRP09 / DV0_DATA2 / SD1_WP

A15

Used on the SUB board

118

DRP09

K20

PG_1 / ET0_TXD2 / VIO_D9 / MOSI0 / MTIOC3C / HM_INT#

VIO_D9

Used on the SUB board

116

K21

P7_5 / CKE / DRP08 / DV0_DATA1 / CTS1 / OVRCUR1

CKE

Used on the SUB board

45

DRP08

CTS1

OVRCUR1

K22

PG_2 / ET0_TXD3 / VIO_D10 / MISO0 / MTIOC3B / GTIOC0A / IRQ4

VIO_D10

Used on the SUB board

43

L1

PVcc

L2

P0_1 / D1 / DRP25 / DV0_DATA18 / MTIOC6C / GTIOC4A

D1

Used on the SUB board

151

DRP25

L3

P0_0 / D0 / DRP24 / DV0_DATA17 / MTIOC6B / GTIOC3B

D0

Used on the SUB board

144

DRP24

L4

PJ_7 / GTETRGB / NAF0 / LCD0_EXTCLK / MTCLKB

LCD0_EXTCLK

Used on the SUB board

140

NAF0

L9

Vcc

L10

Vss

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-9

2018.10.11

Table 2.2.8 List of Selections of RZ/A2M Pin Functions (8)

Pin Name

Pin Function

Description

J2 Pin

Note

L11

Vss

L12

Vss

L13

Vss

L14

Vcc

L19

P7_1 / RD/WR / DRP05 / DV0_VSYNC / RxD1 / CC1_RA1

RD/WR

Used on the SUB board

123

DRP05

RxD1

L20

P7_4 / CAS / DRP07 / DV0_DATA0 / RTS1 / CC2_RA1

CAS

Used on the SUB board

120

DRP07

RTS1

L21

P7_3 / RAS / DRP06 / DV0_HSYNC / TxD1 / CC2_RD1

RAS

Used on the SUB board

41

DRP06

TxD1

L22

P7_2 / CS4 / DV0_CLK / LCD0_TCON2 / TEND0 / CC2_RA0

DV0_CLK

Used on the SUB board

37 M1

P0_2 / D2 / DRP26 / DV0_DATA19 / MTIOC6D / GTIOC4B

D2

Used on the SUB board

155

DRP26

M2

P0_5 / D5 / DRP29 / DV0_DATA22 / MTIOC7C / GTIOC7A

D5

Used on the SUB board

153

DRP29

M3

P0_4 / D4 / DRP28 / DV0_DATA21 / MTIOC7B / GTIOC6B

D4

Used on the SUB board

146

DRP28

M4

P0_3 / D3 / DRP27 / DV0_DATA20 / MTIOC7A / GTIOC6A

D3

Used on the SUB board

148

DRP27

M9

Vcc

M10

Vss

M11

Vss

M12

Vss

M13

Vss

M14

Vcc

M19

P6_6 / CS2 / DRP02 / LCD0_TCON4 / DREQ0 / CC1_RA0

DRP02

Used on the SUB board

127

M20

P6_0 / ADTRG0

P6_0

Connected to the LED1 (red)

125

1：Lit

M21

P7_0 / WE1/DQMU / DRP04 / DV0_CLK / SCK1 / CC1_RD1

WE1/DQML

Used on the SUB board

25

DRP04

SCK1

M22

PVcc

N1

PJ_3 / TRACEDATA1 / NAF0 / VRAMMON3 / RTS1 / SSIFS3

TRACEDATA1

Connected to the UDI connector (CN5)

― N2

PJ_1 / TRACECTL / SPDIF_IN / VRAMMON1 / RxD1 / VBUSIN0 / IRQ0

IRQ0

Used on the SUB board

159

N3

P0_6 / D6 / DRP30 / DV0_DATA23 / MTIOC7D / GTIOC7B

D6

Used on the SUB board

150

DRP30

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-10

2018.10.11

Table 2.2.9 List of Selections of RZ/A2M Pin Functions (9)

U1 Pin

Terminal name

Terminal function

Explanation

J2 pin

Notes

N4

PJ_2 / TRACEDATA0 / FCE / VRAMMON2 / TxD1 / SSITxD3

TRACEDATA0

Connected to the UDI connector (CN5)

―

N9

Vcc

N10

Vss

N11

Vss

N12

Vss

N13

Vss

N14

Vcc

N19

P6_5 / CS3 / DRP01 / LCD0_TCON5 / AUDIO_XOUT / CC1_RD0

CS3

Used on the SUB board

135

DRP01

N20

PG_3 / ET0_COL / VIO_D11 / SSL00 / MTIOC3D / GTIOC0B

VIO_D11

Used on the SUB board

129

N21

P6_4 / CS5 / DRP00 / LCD0_TCON6 / AUDIO_CLK / SD1_CD

DRP00

Used on the SUB board

36

AUDIO_CLK

N22

Vss

P1

PH_6 / HM_INT# / NAF3 / ET1_WOL / MTIC5V / IRQ4

ET1_WOL

Used on the SUB board

163

P2

PH_5 / HM_RSTO# / NAF2 / ET1_EXOUT / MTIC5U / IRQ5

ET1_EXOUT

Used on the SUB board

161

NAF2

P3

PK_5 / GTETRGA / NAF1 / WDTOVF/PERROUT / MTCLKA

NAF1

Used on the SUB board

167

P4

PVcc

P9

Vcc

P10

Vss

P11

Vss

P12

Vss

P13

Vss

P14

Vcc

P19

SD0_DAT7

Connected to the SDVcc through a resistor

―

P20

SD0_RST#

Connected to the test point (TP1)

―

P21

P6_7 / WE0/DQML / DRP03 / LCD0_TCON3 / DACK0 / CC2_RD0

WE0/DQML

Used on the SUB board

23

DRP03

Used on the SUB board

P22

PVcc_SD0

R1

PVcc

R2

PJ_4 / TRACEDATA2 / NAF1 / VRAMMON4 / CTS1 / SSIBCK3

TRACEDATA2

Connected to the UDI connector (CN5)

― R3

PJ_5 / TRACEDATA3 / NAF2 / OVRCUR0 / MTIOC1A / SSIFS2 / IRQ4

TRACEDATA3

Connected to the UDI connector (CN5)

―

R4

Vss

R19

SD0_DAT2

Connected to the microSD card slot (CN1)

― R20

SD0_DAT5

Connected to the SDVcc through a resistor

―

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-11

2018.10.11

Table 2.2.10 List of Selections of RZ/A2M Pin Functions (10)

Pin Name

Pin Function

Description

J2 Pin

Note

R21

SD0_DAT4

Connected to the SDVcc through a resistor

― R22

SD0_DAT6

Connected to the SDVcc through a resistor

― T1

AUDIO_X1

Connected to the GND through a resistor

―

T2

AUDIO_X2

Open

―

T3

P3_5 / ET1_RXD1/RMII1_RXD1 / FCLE / CC2_RA0 / CAN0TX_DATARATE_EN / SSL00

ET1_RXD1/RMII1_RXD1

Used on the SUB board

156

FCLE

T4

P3_2 / ET1_CRS/RMII1_CRSDV / FRE / CC1_RA1 / CAN1RX_DATARATE_EN / MOSI2

ET1_CRS/RMII1_CRSDV

Used on the SUB board

154

FRE

T19

SD0_DAT0

Connected to the microSD card slot (CN1)

― T20

SD0_DAT1

Connected to the microSD card slot (CN1)

― T21

SD0_DAT3

Connected to the microSD card slot (CN1)

―

T22

Vss

U1

Vss

U2

PK_4 / ET1_RXD0/RMII1_RXD0 / NAF7 / OVRCUR1 / CAN0TX / MISO0 / IRQ6

ET1_RXD0/RMII1_RXD0

Used on the SUB board

164

NAF7

U3

P3_1 / ET1_RXER/RMII1_RXER / FALE / VBUSEN0 / CAN1RX / RSPCK2 / IRQ6

ET1_RXER/RMII1_RXER

Used on the SUB board

166

FALE

U4

MIPIAVcc18_1

U19

SD1_DAT0

Used on the SUB board

33 U20

SD1_DAT2

Used on the SUB board

31

U21

SD0_CMD

Connected to the microSD card slot (CN1)

― U22

SD0_CLK

Connected to the microSD card slot (CN1)

― V1

CSI_CLKP

Connected to the MIPI CSI-2 connector (CN2, J1)

―

V2

CSI_CLKN

Connected to the MIPI CSI-2 connector (CN2, J1)

―

V3

PG_4 / ET0_TXER / VIO_D15 / RSPCK1 / MTIOC4A / GTIOC1A

VIO_D15

Used on the SUB board

169

V4

Vss

V19

P5_4 / AN004 / IRQ0 / SD1_CD

SD1_CD

Used on the SUB board

18

V20

SD1_DAT1

Used on the SUB board

29 V21

SD1_DAT3

Used on the SUB board

32 V22

PVcc_SD1

3.3V

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-12

2018.10.11

Table 2.2.11 List of Selections of RZ/A2M Pin Functions (11)

Pin Name

Pin Function

Description

J2 Pin

Note

W1

CSI_DATA0P

Connected to the MIPI CSI-2 connector (CN2, J1)

― W2

CSI_DATA0N

Connected to the MIPI CSI-2 connector (CN2, J1)

―

W3

Vss

W4

PG_6 / ET0_RXD2 / VIO_D13 / MISO1 / MTIOC4C / GTIOC2A / IRQ5

VIO_D13

Used on the SUB board

171

W5

P1_0 / D7 / DRP31 / IRQ0 / CAN_CLK / VBUSEN0

D7

Used on the SUB board

160

DRP31

W6

P1_2 / D9 / MTIOC8B / IRQ2 / CAN0RX_DATARATE_EN / VBUSEN1

D9

Used on the SUB board

196 W7

P2_0 / D12 / GTIOC6A / IRQ5 / CAN1RX / OTG_EXICEN0

D12 Used on the SUB board

200 W8

PC_2 / OTG_EXICEN0 / NAF7 / ET1_TXD3 / MISO2 / LCD0_TCON5

PC_2

Used on the SUB board

202 W9

P4_3 / RTS0 / TXOUT1M / SCI_CTS1/RTS1 / SSIFS1 / MTIOC8D / IRQ3

TXOUT1M

Used on the SUB board

184

W10

LVDSAPVcc

W11

Vss

W12

LVDSPLLVcc

W13

USBDPVcc0

W14

USBVss

W15

Vss

W16

PVcc

W17

Vss

W18

PLLVcc

W19

P5_2 / AN002 / IRQ6 / VBUSIN0

VBUSIN0

Connected to the USB connector (CN3)

―

JP3

W20

P5_6 / AN006 / IRQ2

AN006

Used on the SUB board

14 W21

SD1_CMD

Used on the SUB board

28 W22

Vss

Y1

CSI_DATA1P

Connected to the MIPI CSI-2 connector (CN2, J1)

― Y2

CSI_DATA1N

Connected to the MIPI CSI-2 connector (CN2, J1)

―

Y3

Vss

Y4

P3_3 / ET1_MDC / FWE / OTG_EXICEN0 / CAN1TX / MISO2 / IRQ7

ET1_MDC

Used on the SUB board

177

FWE

Y5

P1_4 / D11 / MTIOC8D / IRQ4 / CAN0TX_DATARATE_EN / VBUSIN0

D11

Used on the SUB board

173

Y6

PC_0 / VBUSIN1 / NAF5 / ET1_TXCLK / RSPCK2 / IRQ2

VBUSIN1

Used on the SUB board

194

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-13

2018.10.11

Table 2.2.12 List of Selections of RZ/A2M Pin Functions (12)

Pin Name

Pin Function

Description

J2 Pin

Note

Y7

P2_2 / D14 / GTIOC7A / IRQ7 / CAN1TX / VBUSIN1

D14 Used on the SUB board

198

Y8

P4_2 / TxD0 / TXOUT1P / SCI_TXD1 / SSITxD1 / MTIOC8C / IRQ2

TXOUT1P

Used on the SUB board

182 Y9

P4_6 / ET0_EXOUT / TXCLKOUTP / SCI_TXD0 / TxD4 / DACK0

TXCLKOUTP

Used on the SUB board

188

Y10

NMI Used on the SUB board

203 Y11

Vss

Y12

USBVss

Y13

USBVss

Y14

USBVss

Y15

USBVss

Y16

USBDPVcc1

Y17

PC_7 / OVRCUR0 / FRB / ET1_RXD3 / SD1_WP / LCD0_TCON0 / IRQ6

OVRCUR0

Connected to the USB VBUS power supply control IC (U5)

―

Y18

PC_6 / VBUSEN0 / FWE / ET1_RXD2 / SD1_CD / LCD0_TCON1 / IRQ7

VBUSEN0

Connected to the USB VBUS power supply control IC (U5)

―

Y19

P5_0 / AN000 / IRQ4 / SD0_CD / SD1_CD

SD0_CD

Connected to the microSD card slot (CN1)

― Y20

P5_1 / AN001 / IRQ5 / SD0_WP / SD1_WP

SD0_WP

Connected to the D3.3V or GND through a resistor

―

Y21

P5_7 / AN007 / IRQ3

IRQ3

Used on the SUB board

19 Y22

SD1_CLK

Used on the SUB board

24 AA1

MIPIAVcc18_2

AA2

Vss

AA3

P1_1 / D8 / MTIOC8A / IRQ1 / CAN0RX / OVRCUR0

D8 Used on the SUB board

179

AA4

P3_4 / ET1_MDIO / FRB / CC2_RA1 / CAN1TX_DATARATE_EN / SSL20

ET1_MDIO

Used on the SUB board

187

FRB

AA5

P3_0 / OTG_EXICEN1 / NAF4 / ET1_LINKSTA / MTIC5W / IRQ3

ET1_LINKSTA

Used on the SUB board

191 AA6

PC_1 / VBUSIN0 / NAF6 / ET1_TXD2 / MOSI2 / LCD0_TCON6

PC_1

Connected to the LED 1 (yellow green)

197

1：illuminated

AA7

P4_0 / SCK0 / TXOUT0P / SCI_SCK1 / SSIBCK1 / MTIOC8A / IRQ0

TXOUT0P

Used on the SUB board

170

AA8

P4_4 / CTS0 / TXOUT2P / SCI_CTS0/RTS0 / WDTOVF/PERROUT / OTG_EXICEN0

TXOUT2P

Used on the SUB board

176

AA9

P4_7 / ET0_WOL / TXCLKOUTM / SCI_SCK0 / SCK4 / TEND0

TXCLKOUTM

Used on the SUB board

190

AA10

USB_X2

Connected to the USB oscillator (X2)

―

48MHz

[Note] : 3.3 power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-14

2018.10.11

Table 2.2.13 List of Selections of RZ/A2M Pin Functions (13)

Pin Name

Pin Function

Description

J2 Pin

Note

AA11

DP0 Connected to the USB connector (CN3)

―

AA12

USBAPVcc0

AA13

RREF0

Connected to the GND through a resistor

―

2.2kΩ±1%

AA14

USBVss

AA15

DP1 Used on the SUB board

96

AA16

PVcc

AA17

PC_5 / VBUSEN1 / FRE / ET1_RXDV / SPDIF_OUT / LCD0_TCON2 / IRQ0

VBUSEN1

Used on the SUB board

8

AA18

XTAL

Connected to the system clock oscillator (X1)

―

24MHz

AA19

PC_4 / OTG_ID1 / FALE / ET1_TXER / SPDIF_IN / LCD0_TCON3 / IRQ1

LCD0_TCON3

Used on the SUB board

20

AA20

RTC_X2

Connected to the RTC oscillator (X3)

―

32.768kHz

AA21

P5_3 / AN003 / IRQ7 / OTG_ID0

P5_3

Used on the SUB board

15

AA22

P5_5 / AN005 / IRQ1 / SD1_WP

SD1_WP

Used on the SUB board

17

AB1

Vss

AB2

PG_5 / ET0_RXDV / VIO_D14 / MOSI1 / MTIOC4B / GTIOC1B

VIO_D14

Used on the SUB board

183 AB3

PG_7 / ET0_RXD3 / VIO_D12 / SSL10 / MTIOC4D / GTIOC2B

VIO_D12

Used on the SUB board

181

AB4

P1_3 / D10 / MTIOC8C / IRQ3 / CAN0TX / OTG_ID1

D10 Used on the SUB board

189

AB5

P2_1 / D13 / GTIOC6B / IRQ6 / CAN1RX_DATARATE_EN / OTG_ID0

D13

Used on the SUB board

193 AB6

P2_3 / D15 / GTIOC7B / WDTOVF/PERROUT / CAN1TX_DATARATE_EN / OTG_EXICEN1

D15

Used on the SUB board

199

AB7

P4_1 / RxD0 / TXOUT0M / SCI_RXD1 / SSIRxD1 / MTIOC8B / IRQ1

TXOUT0M

Used on the SUB board

172 AB8

P4_5 / ET0_LINKSTA / TXOUT2M / SCI_RXD0 / RxD4 / DREQ0

TXOUT2M

Used on the SUB board

178

AB9

RES#

Connected to the reset input switch (SW2)

7

AB10

USB_X1

Connected to the USB oscillator (X2)

―

48MHz

AB11

DM0 Connected to the USB connector (CN3)

―

AB12

USBAPVcc1

AB13

RREF1

Connected to the GND through a resistor

―

2.2kΩ±1%

[Note] : 3.3 power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-15

2018.10.11

Table 2.2.14 List of Selections of RZ/A2M Pin Functions (14)

Pin Name

Pin Function

Description

J2 Pin

Note

AB14

USBVss

AB15

DM1 Used on the SUB board

98

AB16

PVcc

AB17

PC_3 / OTG_ID0 / FCLE / ET1_COL / SSL20 / LCD0_TCON4

LCD0_TCON4

Used on the SUB board

10

AB18

EXTAL

Connected to the system clock oscillator (X1)

―

24MHz

AB19

Vss

AB20

RTC_X1

Connected to the RTC oscillator (X3)

―

32.768kHz

AB21

AVcc

AB22

AVcc

[Note] : 3.3 power source、 : 1.8V power source、 : 1.2V power source、 : 3.3V or 1.8V power

source、 : GND displayed.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-16

2018.10.11

2.3 Memory

In addition to the RZ/A2M on-chip RAM, serial flash memory and HyperMCP are mounted in

RTK7921053C00000BE as external memory.

Refer to the following for details.

2.3.1 RZ/A2M On-Chip RAM

The microprocessor RZ/A2M contains a 4 Mbyte large capacity RAM (sharing an area of 128 kbytes with the data

retention on-chip RAM).

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-17

2018.10.11

2.3.2 Serial Flash Memory

RTK7921053C00000BE is equipped with standard serial flash memory x 1 shown in Table 2.3.1. Serial flash memory is controlled by RZ/A2M on-chip SPI multi-I/O bus controller (SPIBSC). During boot (boot mode 3), data (programs) can be read from the serial flash memory.

Moreover, jumper JP1 may be set to provide power to PVcc_SPI and serial flash memory. Be sure to set voltage to

3.3V.

Figure 2.3.1 shows serial flash memory block diagram. Moreover, Table 2.3.2 shows function settings for jumper JP1.

Table 2.3.1 Overview of Serial Flash Memory

Memory Device

Model

Operational

Voltage

Capacity

Package

Serial flash memory

MX25L51245GXDI-08G

3.3V 64MB

24 ball BGA

Figure 2.3.1 Serial Flash Memory Block Diagram

Table 2.3.2 Function Settings for Jumper JP1

Jumper

1-2 2-3

JP1

Supplies 3.3 V to PVcc_SPI and serial flash memory. (Initial setting)

Supplies 1.8 V to PVcc_SPI and serial flash memory. (Setting prohibited)

[Note] shows the setting function to select.

If jumper JP1 is errorneously set, the memory may be damaged. Pay full attention to the setting.

RZ/A2M (U1)

QSPI0_SPCLK

14

D3_0

CLK_0

CS#_0

QSPI0_IO3

QSPI0_SSL

CLK_0

CS#_0

D3_0

RESET#

RPC_RESET#

RESET#

Serial Flash Memory (U2)

NC/SIO3

SCLK

CS#

RESET# VCCPVcc_SPI

ROMVcc

ROMVcc ROMVcc

QSPI1_SPCLK

QSPI1_IO[3:0]

QSPI1_SSL

RPC_INT#

RPC_WP#

NC

Note: Red characters indicates functions in use.

: Unmounted.

NCNC

3.3V 1.8VROMVcc

1 3

JP1

CS#_1

D[3:0]_1

INT#

ROMVcc

D[3:0]_1

CS#_1

INT#

CLK_1 CLK_1

D2_0D2_0

WP#/SIO2

D[1:0]_0D[1:0]_0

SO/SIO1, SI/SIO0

QSPI0_IO2

QSPI0_IO[1:0]

ROMVcc

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-18

2018.10.11

2.3.3 HyperMCP

RTK7921053C00000BE is equipped with HyperMCP x 1 shown in Table 2.3.3 as a default installation. HyperMCP is controlled by the HyperBus controller. During boot (boot mode 7), data (programs) can be read from the HyperFlash in HyperMCP.

Moreover, jumper JP2 is set to supply power to PVcc_HO and HyperMCP. Please be sure to set voltage to 1.8V.

Figure 2.3.2 shows HyperMCP block diagram. Moreover, Table 2.3.4 displays jumper JP2 function setting table.

Table 2.3.3 HyperMCP Overview

Memory

types

Type name

RZ/A2M Connect with

interface

Operational

voltage

capacity

package

HyperMCP

S71KS512SC0BHV000

HyperBus controller

1.8V HyperFlash: 64MB HyperRAM: 8MB

24 ball BGA

Figure 2.3.2 HyperMCP Block Diagram

Table 2.3.4 Function Settings for Jumper JP2

Jumper

1-2 2-3

JP2

Supplies 3.3V to PVcc_HO and HyperMCP. (Setting prohibited)

Supplies 1.8V to PVcc_HO and HyperMCP. (Initial setting)

[Note] shows the setting function to select.

If jumper JP2 is errorneously set, memory may be damaged. Pay full attention to the settings.

RZ/A2M (U1)

HM_CK/OM_SCLK

DS

16

HM_RWDS/OM_DQS

HM_CS0#/OM_CS0#

CLK

CS0#

D[7:0]

HM_DQ[7:0]/OM_SIO[7:0]

PH4 / HM_INT#

INT#

D[7:0]

CLK

CS0#

DS

PH3 / HM_RSTO#

RSTO#

HyperMCP (U3)

DQ[7:0]

CK

RWDS

CS1#

RESET#

VccQ

VccINT#

RTSO#

HM_CS1#/OM_CS1#

CS1# CS1#

CS2#

RAMVcc

PVcc_HO

RAMVcc

HM_RESET#/OM_RESET#

3.3V

3.3V RESET# RESET#

RAMVcc

HM_CK#

CLK# CLK#

CK#

Note: Red characters indicate functions in use.

：Unmounted.

INT#

RSTO#

RAMVcc

3.3V 1.8VRAMVcc

1 3

JP2

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-19

2018.10.11

2.4 USB Interface

USB Type-C receptacle x 1 is equipped with RTK7921053C00000BE as a default installation. When using this receptacle as a USB host, attach JP3 because the VBUS voltage is supplied to the USB connector.

When using this receptacle as a USB function, detach JP3.

Moreover, USB port setting can be changed by the CC logic controller (U7) PORT terminal settings. Initial USB port settings are for DRP (Dual Role Port). If using as a USB host, mount R78 resistor and set USB port to DFP (Downstream Facing Port). If using for USB function, mount R79 resistor and set USB port to UFP (Upstream Facing Port).

Figure 2.4.1 shows USB interface block diagram, Table 2.4.1 shows jumper JP3 function setting table, Table 2.4.2 shows port L function switching table, and Table 2.4.3 shows USB port function switching table.

Figure 2.4.1 USB Interface Block Diagram

RZ/A2M (U1)

DP0

10

PC_7 / OVRCUR0

DM0

DP0

DM0

VBUS0

PC_6 / VBUSEN0

DP0

DM0

48MHz

(X2)

USB_X1 USB_X2

RREF0

USBVss

P5_2 / VBUSIN0

VBUS0

EN0

OC0#

PD_4 / RIIC2SCL

SCL2

PD_5 / RIIC2SDA

SDA2

3.3V EN0

OC0#

ID#

INT#

USB Type-C receptacle (CN3)

D+_A

VBUS_A

VBUS_B

CC1

CC2

D+_B

D-_A

D-_B

CC logic controller (U7)

SCL / OUT2

SDA / OUT1

INT# / OUT3

CC1

CC2VBUS_DET

ID

VBUS0

VBUS power source control IC (U5)

EN

IN1

OUT1

OC#

5V

INT#

ID#

3.3V

ADDR

EN#

PORT

H=DFP, NC=DRP, L=UFP

3.3V

PL_3 / IRQ7

PL_2 / IRQ6

SCL2

SDA2

VBUS0

VBUS

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

3.3V

IRQ input

/ system settings

(U6)

USBAPVcc

USBDPVcc

3.3V

IN2

OUT2

OUT3

2.2kΩ

150μF

+

L:A=B1, H:A=B2

Note: Red characters indicate functions in use.

: Unmounted.

PD_0

(IRQ input # / system settings)

R78

R79

Low

PD_0

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-20

2018.10.11

Table 2.4.1 Function Setting for Jumper JP3

Jumper

Short

Open

JP3

Supplies power to VBUS0.

Does not supply power to VBUS0. (Initial setting)

Table 2.4.2 Function Switching for Port L

Terminal

function

High

Low

PD_0

Uses PL_[3:0] as system setting pins. (Initial setting)

Uses PL_[3:0] as RQ input pins.

[Note] shows the setting function to select.

Table 2.4.3 Function Switching for USB port

Terminal

function

High NC Low

PORT

(U7)

Uses the USB port as DFP.

Uses the USB port as DRP. (Initial setting)

Uses the USB port as UFP.

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-21

2018.10.11

2.5 MIPI CSI-2 Interface

The RZ/A2M contains MIPI CSI-2 interface that supports YCbCy422, RGB888, and RAW8 video. In RTK7921053C00000BE, the MIPI CSI-2 interface in RZ/A2M is connected to FPC connector. RTK7921053C00000BE also has board patterns that can mount a 1.0 mm pin header used as an expansion connector. The MIPI CSI-2 pin is shared with the FPC connector and expansion connector. When the expansion connector is used, the FPC connector cannot be used. Figure 2.5.1 shows the MIPI CSI-2 interface block diagram.

Figure 2.5.1 MIPI CSI-2 Interface Block Diagram

RZ/A2M (U1)

CSI_CLKP

10

CSI_DATA0P

CSI_CLKN

CLK_P

CLK_N

D0_P

CSI_DATA0N

D0_N

CLK_N

CLK_P

MIPI CSI-2 connector

(CN2)

MIPIAVcc18

MIPIAVcc

CSI_DATA1P

D1_P

CSI_DATA1N

D1_N

PD_4 / RIIC2SCL

SCL2

PD_5 / RIIC2SDA

SDA2

PD_2

VCC

PD_3

LED

D0_N

D0_P

D1_N

D1_P

SCL2

SDA2

VCC

LED

3.3V

CAM1_DN0

CAM1_CN

CAM1_CP

CAM_GPIO0

SCL0

CAM1_DP0

CAM1_DN1

CAM1_DP1

CAM_GPIO1

SDA0

VCC

3.3V

Expansion

connector (Opt) (J1)

14

15

13

12

10

11

9

8

6

7

5

4

2

3

1

14

15

13

12

10

11

9

8

6

7

5

4

2

3

1

Note: Red characters indicate functions in use.

: Unmounted.

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-22

2018.10.11

2.6 I/O Ports

In RTK7921053C00000BE, the I/O ports of the RZ/A2M are connected to switches and LEDs. Figure 2.6.1 shows the I/O port block diagram. Table 2.6.1 shows the function switching for the port L.

Figure 2.6.1 I/O Port Block Diagram

Table 2.6.1 Function Switching for Port L

Terminal

function

High

Low

PD_0

Uses PL_[3:0] as system setting pin. (Initial setting)

Uses PL_[3:0] as RQ input pin.

[Note] shows the setting function to select.

RZ/A2M (U1)

P6_0 (LED-red)

PC_1 (LED-green)

PL_0 / MD_CLKS / IRQ4

PL_1 / MD_CLK / IRQ5

PL_2 / MD_BOOT2 / IRQ6

PL_3 / MD_BOOT1 / IRQ7

PD_0 (IRQ input)

To SUB board

To USB I/F

3.3V

PL_4 / MD_BOOT0

BSCANP

Vss1

Vss2

Note: Red characters indicate functions in use.

: Unmounted.

LED1

For system

settings

DIP switch

(SW1)

3.3V

1

8

CLKS

CLK

BOOT1

BOOT2

4

BOOT0

BSCANP

Vss2

Vss1

BOOT0

BSCANP

Vss2

Vss1

IRQ input /

System settings (U6)

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

CLKS

CLK

BOOT2

BOOT1

ON(L):A=B1, OFF(H):A=B2

4

2

3

4

5

6

7

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-23

2018.10.11

2.7 Clock Configuration

The following three types of clock are input to the RZ/A2M in RTK7921053C00000BE.

・RZ/A2M input clock ：24 MHz ・RZ/A2M USB clock ：48MHz ・RZ/A2M RTC clock ：32.768kHz

Figure 2.7.1 shows the clock configuration. Table 2.7.1 shows the function setting for the system settings DIP switches SW1-1 and SW1-2.

Figure 2.7.1 Clock Configuration

Table 2.7.1 Function Setting for System Settings DIP Switch SW1-1 and SW1-2

DIP switch

function

ON

OFF

SW1-1

SSCG function OFF (Initial setting)

SSCG function ON

SW1-2

Sets EXTAL input peripheral frequency range from 10 to 12MHz. (Setting prohibited)

Sets EXTAL input peripheral frequency range from 20 to 24MHz. (Initial setting)

[Note] shows the setting functions to select.

RZ/A2M (U1)

32.768 kHz

(X3)

RTC_X1 RTC_X2

24 MHz

(X1)

EXTAL XTAL

48 MHz

(X2)

USB_X1 USB_X2

NC

CKIO

PJ_6 /

LCD0_CLK

SD0_CLK

SD1_CLK

PJ_7 / LCD0_EXTCLK

SCLK

microSD card slot (CN1)

PL_1 / MD_CLK

L=10 to 12MHz, H=20 to 24 MHz

PL_0 / MD_CLKS

L=SSCG:OFF, H=SSCG:ON

P6_4 / AUDIO_CLK

P7_2 / DV0_CLK

P4_6 /

TXCLKOUTP

P4_7 /

TXCLKOUTM

AUDIO_X1

AUDIO_X2

P6_1 / VIO_CLK

Note: Red characters indicate functions in use.

: Unmounted.

DIP

SW1-2

3.3 V

DIP

SW1-1

3.3 V

OFF

MUX

9

To SUB board

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-24

2018.10.11

2.8 Reset Control

The reset IC in RTK7921053C00000BE controls the reset signal connected to the RZ/A2M, memory devices, and

connectors.

There are two types of system reset: power-on reset and switch reset. Figure 2.8.1 shows the reset control block diagram.

Figure 2.8.1 Reset Control Block Diagram

To SUB board

CoreSight 20 connector (CN5)

TRST#

SRST#

3.3V

Reset switch (SW2)

Reset IC (U15)

RESET#

CT

SENSE

3.3V

130kΩ

20kΩ

4700pF

RZ/A2M (U1)

TRST#

RES#

RESET#RPC_RESET#

RESET#HM_RESET#/OM_RESET#

3.3V

Note: Red characters indicate functions in use.

: Unmounted.

3.3V

Serial flash memory (U2)

HyperMCP (U3)

+

U12

U13

U14

Reset IC output delay time

　td=CT(nF)/175+0.5×10-3s=27.4ms

reset IC output detection voltage

　0.405×(Ra+Rb)/Rb=0.405×(130kΩ+20kΩ)/20kΩ=3.04V

1000pF

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

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2018.10.11

2.9 Power Supply Configuration

The regulators in RTK7921053C00000BE generate voltages 3.3 V, 1.8 V, and 1.2 V from 5 V. Figure 2.9.1 shows the power supply configuration block diagram.

Figure 2.9.1 Power Supply Configuration Block Diagram

5V to 3.3V

D1.8V

D1.2V

USB Type-C (CN3)

5V external power

source connector

(CN4)

5V to 1.8V

VBUS

PVcc

RZ/A2M (3.3V)

USBDPVcc

AVcc LVDSAPVcc USBAPVcc

RZ/A2M (1.8V)

MIPIAVcc18

Vcc

RZ/A2M (1.2V)

LVDSPLLVcc PLLVcc

3.3 V peripheral device

5V to 1.2V

VBUS power

supply

Jumper (JP3)

A3.3V

USB Type-C (CN3)

JP1

D1.8VD3.3V ROMVcc

RZ/A2M (1.8V/3.3V)

PVcc_HO

PVcc_SPI

JP2

D1.8VD3.3V RAMVcc

Serial flash memory (U2)

HyperMCP (U3)

RZ/A2M (1.8V/3.3V)

PVcc_SD0

D3.3V D1.8V

3.3V/1.8V

Power disconnect

(U4)

PVcc_SD1

D3.3V

D5V

To SUB board

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-26

2018.10.11

2.10 Debug Interface

RTK7921053C00000BE contains a CoreSight 20 connector (CN5) for connection to the RZ/A2M user debug interface. Figure 2.10.1 shows the debug interface block diagram.

Figure 2.10.1 Debug Interface Block Diagram

RZ/A2M (U1)

PJ_0 / TRACECLK

JP0_4 / TRST#

RES#

3.3V

PJ_5 / TRACEDATA3

JP0_1 / TDO

JP0_0 / TDI

JP_2 / TMS

JP0_3 / TCK

CoreSight 20 connector (CN5)

3.3V

Reset IC (U15) Reset switch (SW2)

3.3V

RTCK/TRACECLK

PJ_4 / TRACEDATA2

PJ_3 / TRACEDATA1

PJ_2 / TRACEDATA0

3.3V

DBGACK /TraceD3

DBGRQ/TraceD2

nTRST/TraceD1

SWO/TraceD0

TDO/SWO

TDI

TMS/SWDIO

TCK/SWCLK

nSRST

Note: Red characters indicate functions in use.

: Unmounted.

U12

U13

U14

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-27

2018.10.11

2.11 SD/MMC Host Interface (4 bits)

RTK7921053C00000BE contains a 4 bit microSD slot connected to the SD/MMC host interface in the RZ/A2M. SD/MMC host interface ch0 terminal operational voltage can be changed via the PD_1 terminal. Set PD_1 to High for

3.3V operation and to Low for 1.8V operation.

Figure 2.11.1 shows the SD/MMC host interface block diagram. Table 2.11.1 shows the PVcc_SD0 voltage switching

table.

Figure 2.11.1 SD/MMC Host Interface Block Diagram

Table 2.11.1 PVcc_SD0 Voltage Switching Table

Terminal

function

High

Low

PD_1

Supplies 3.3V to PVcc_SD0. (Initial setting)

Supplies 1.8V to PVcc_SD0.

RZ/A2M (U1)

SD0_CLK

SD0_CMD

SD0_DAT[3:0]

7

CLK

CMD

D[3:0]

SDVcc

CLK

D[3:0]

microSD card slot (CN1)

CLK

DAT[3:0]

VDD

3.3V

CMD

SDVcc

CMD

CD

P5_0 / SD0_CD

CD

0 : Card Insert

PVcc_SD0

SDVcc

3.3V

SD0_RST#

Power switch (U4)

EN

SELVINB

3.3V

1.8V

VINA

SDVcc

VOUT

0 : VOUT=VINA=1.8V

1 : VOUT=VINB=3.3V

3.3V

PD_1 (SDVcc_SEL)

Note: Red characters indicate functions in use.

: Unmounted.

SD0_DAT[7:4]

P5_1 / SD0_WP

SDVcc

3.3V

TP1

RZ/A2M CPU Board RTK7921053C00000BE 2. Function specifications

R20UT4397EJ0100 Rev.1.00 2-28

2018.10.11

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-1

2018.10.11

3. Operation Specifications

3.1 Overview of Connectors

Figure 3.1.1 illustrates the layout of connectors of RTK7921053C00000BE.

Figure 3.1.1 Layout of Connectors of RTK7921053C00000BE (C Side Top View)

CN1: microSD card slot

J2:

SUB board connector

CN3: USB Type-C

receptacle

CN4: Power source

connector (Opt)

CN2: MIPI CSI-2

connector

CN5:

CoreSight20 connector

J1: MIPI CSI-2

connector (Opt)

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-2

2018.10.11

3.1.1 microSD Card Slot (CN1)

RTK7921053C00000BE contains a microSD card slot (CN1). Figure 3.1.2 illustrates the layout of microSD card slot pins. Table 3.1.1 shows the assignment of microSD card slot pins.

Figure 3.1.2 Layout of microSD Card Slot Pins

Table 3.1.1 Assignment of microSD Card Slot (CN1) Pins

Signal Name

1 DAT2 (SD0_DAT2)

2 CD/DAT3 (SD0_DAT3)

3 CMD (SD0_CMD)

4 +3.3V

5 CLK (SD0_CLK)

6 VSS (Vss)

7 DAT0 (SD0_DAT0)

8 DAT1 (SD0_DAT1)

9 COMMON (Vss)

10 Card_Detect (SD0_CD)

[Note] Red characters indicate functions in use.

CN1

12345 7

8

9

6

C side top view

10

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-3

2018.10.11

3.1.2 MIPI CSI-2 Connector (CN2, J1)

RTK7921053C00000BE contains an MIPI CSI-2 connector (CN2). Moreover, this pattern allows to mount a connector

(J1).

Pins 30 to 16 of the connector (NC2) are connected to pins 1 to 15. Pins 1 to 15 of the connector (J1) are connected to

pins 30 to 16 of the connector (CN2).

When using a device that cannot be connected to the connector (CN2), it is possible to create a conversion connector

via the connector (J1) to connect the device to the connector (CN2).

Figure 3.1.3 illustrates the layout of MIPI CSI-2 connector pins. Table 3.1.2 and Table 3.1.3 show the assignment of

MIPI CSI-2 connector pins.

If connector (J1) is used, be careful for keeping the direction of the number 1 pin.

Figure 3.1.3 Layout of MIPI CSI-2 Connector Pins

C side top view

1 15

1630

CN2

J1

1 15

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-4

2018.10.11

Table 3.1.2 Assignment of MIPI CSI-2 Connector Pins (CN2)

Signal name

1, 30

GND (Vss)

2, 29

CAM1_DN0 (CSI_DATA0N)

3, 28

CAM1_DP0 (CSI_DATA0P)

4, 27

GND (Vss)

5, 26

CAM1_DN1 (CSI_DATA1N)

6, 25

CAM1_DP1 (CSI_DATA1P)

7, 24

GND (Vss)

8, 23

CAM1_CN (CSI_CLKN)

9, 22

CAM1_CP (CSI_CLKP)

10, 21

GND (Vss)

11, 20

CAM_GPIO0 (PD_2)

12, 19

CAM_GPIO1 (PD_3)

13, 18

SCL0 (PD_4 / RIIC2SCL)

14, 17

SDA0 (PD_5 / RIIC2SDA)

15, 16

+3.3V

[Note] Red characters indicate functions in use.

Table 3.1.3 Assignment of MIPI CSI-2 Connector Pins (J1)

Signal name

note

1 Vss

Connected to pin

30

of CN2

2 CSI_DATA0N

Connected to pin

29

of CN2

3 CSI_DATA0P

Connected to pin

28

of CN2

4 Vss

Connected to pin

27

of CN2

5 CSI_DATA1N

Connected to pin

26

of CN2

6 CSI_DATA1P

Connected to pin

25

of CN2

7 Vss

Connected to pin

24

of CN2

8 CSI_CLKN

Connected to pin

23

of CN2

9 CSI_CLKP

Connected to pin

22

of CN2

10 Vss

Connected to pin

21

of CN2

11 PD_2

Connected to pin

20

of CN2

12 PD_3

Connected to pin

19

of CN2

13 PD_4 / RIIC2SCL

Connected to pin

18

of CN2

14 PD_5 / RIIC2SDA

Connected to pin

17

of CN2

15 +3.3V

Connected to pin

16

of CN2

[Note] Red characters indicate functions in use.

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-5

2018.10.11

3.1.3 USB Connector (CN3)

RTK7921053C00000BE contains a USB Type-C receptacle (CN3). Figure 3.1.4 illustrates the layout of USB Type-C receptacle pins. Table 3.1.4 shows the assignment of USB Type-C

receptacle pins.

Figure 3.1.4 Layout of USB Type-C Receptacle Pins

Table 3.1.4 Assignment of USB Type-C Receptacle (CN3) Pins

Signal Name

A1 GND (Vss)

B12

GND (Vss)

A2 TX1+(NC)

B11

RX1+(NC)

A3 TX1-(NC)

B10

RX1-(NC)

A4 VBUS (P5_2 / VBUSIN0)

B9 VBUS (P5_2 / VBUSIN0)

A5 CC1 (CC1)

B8 SBU2 (NC)

A6 D+ (DP0)

B7 D-(DM0)

A7

D-(DM0)

B6

D+ (DP0)

A8 SBU1 (NC)

B5 CC2 (CC2)

A9 VBUS (P5_2 / VBUSIN0)

B4 VBUS (P5_2 / VBUSIN0)

A10

RX2-(NC)

B3 TX2-(NC)

A11

RX2+(NC)

B2 TX2+(NC)

A12

GND (Vss)

B1 GND (Vss)

[Note] Red characters indicate functions in use.

C side top view

A1A12

B1

B12

CN3

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-6

2018.10.11

3.1.4 Power Source Connector (CN4)

RTK7921053C00000BE allows to mount the power source connector (CN4). Figure 3.1.5 shows the layout of power source connector pins. Table 3.1.5 shows the assignment of power source

connector pins.

If connector (CN4) is used, be careful for keeping the direction of number 1 pin.

Figure 3.1.5 Layout of Power Source Connector Pins

Table 3.1.5 Assignment of Power Source Connector (CN4) Pins

Signal Name

1 +5V 2 GND (Vss)

C side top view

1

2

CN4

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-7

2018.10.11

3.1.5 UDI Connector (CN5)

RTK7921053C00000BE contains a1.27 mm pitch CoreSight20 connector (CN5). Figure 3.1.6 illustrates the layout of UDI connector pins. Table 3.1.6 shows the assignment of UDI connector pins.

Figure 3.1.6 Layout of UDI Connector Pins

Table 3.1.6 Assignment of CoreSight 20 Connector (CN5) Pins

Signal name

1 +3.3V 2 TMS/SWDIO (JP_2 / TMS)

3 GND (Vss)

4 TCK/SWCLK (JP0_3 / TCK)

5 GND (Vss)

6 TDO/SWO (JP0_1 / TDO)

7 KEY (NC)

8 TDI (JP0_0 / TDI)

9 GND (Vss)

10

nSRST 11

NC 12

RTCK/TraceCLK (PJ_0 / TRACECLK)

13

NC 14

SWO/TraceD0 (PJ_2 / TRACEDATA0)

15

GND (Vss)

16

nTRST/TraceD1 (PJ_3 / TRACEDATA1)

17

GND (Vss)

18

DBGRQ/TraceD2 (PJ_4 / TRACEDATA2)

19

GND (Vss)

20

DBGACK/TaceD3 (PJ_5 / TRACEDATA3)

[Note] Red characters indicate functions in use.

1 2

19 20

C side top view

CN5

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-8

2018.10.11

3.1.6 SUB Board Connector (J2)

RTK7921053C00000BE can be connected to an external expansion board through the SUB board connecting

connector (J2).

Figure 3.1.7 illustrates the layout of SUB board connecting connector pins. Table 3.1.7 to Table 3.1.9 show the

assignment of SUB board connecting connector pins.

Figure 3.1.7 Layout of SUB Board Connecting Connector Pins

J2: SUB board connector

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-9

2018.10.11

Table 3.1.7 Assignment of SUB Board Connecting Connector (J2) Pins (1)

Signal Name

1 D5V 2 D5V 3 D5V 4 D5V 5 D5V 6 D5V 7 RES# 8 PC_5 / VBUSEN1

9 D3.3V 10 PC_3 / LCD0_TCON4

11 D3.3V 12 AVcc 13 D3.3V 14 P5_6 / AN006

15 P5_3 16 AVss 17 P5_5 / SD1_WP

18 P5_4 / SD1_CD

19 P5_7 / IRQ3

20 PC_4 / LCD0_TCON3

21 D3.3V 22 Vss 23 P6_7 / WE0/DQML / DRP03

24 SD1_CLK

25 P7_0 / WE1/DQMU / DRP04 / SCK1

26 Vss 27 D3.3V 28 SD1_CMD

29 SD1_DAT1

30 Vss 31 SD1_DAT2

32 SD1_DAT3

33 SD1_DAT0

34 Vss 35 Vss 36 P6_4 / DRP00 / AUDIO_CLK

37 P7_2 / DV0_CLK

38 Vss 39 Vss 40 PB_4 / DV0_DATA1 / LCD0_DATA22

41 P7_3 / RAS / DRP06 / TxD1

42 P9_3 / A11 / DRP13 / SSIRxD0

43 PG_2 / VIO_D10

44 P7_7 / DV0_HSYNC / LCD0_TCON0

45 P7_5 / CKE / DRP08 / CTS1 / OVRCUR1

46 Vss

47 Vss 48 PL_1 / MD_CLK / IRQ5

49 P9_6 / A14 / DRP10 / SSIBCK0

50 PL_0 / MD_CLKS / IRQ4

51 Vss 52 Vss 53 P7_6 / DV0_VSYNC / GTIOC3A

54 CKIO 55 P9_5 / A13 / DRP11 / SSIFS0

56 Vss 57 PB_5 / DV0_DATA0 / LCD0_DATA23

58 PD_7 / RIIC3SDA

59 P9_2 / A10 / DRP14

60 PD_6 / RIIC3SCL

61 PB_3 / DV0_DATA2 / LCD0_DATA21

62 Vss 63 PB_1 / DV0_DATA4 / LCD0_DATA19

64 PB_0 / DV0_DATA5 / LCD0_DATA18

65 Vss 66 PB_2 / DV0_DATA3 / LCD0_DATA20

67 PA_6 / DV0_DATA7 / LCD0_DATA16

68 PA_3 / DV0_DATA10 / LCD0_DATA13

69 PA_4 / DV0_DATA9 / LCD0_DATA14

70 Vss 71 PA_5 / DV0_DATA8 / LCD0_DATA15

72 PG_0 / VIO_D8

[Note] : 5V power source, : 3.3V power source, : GND

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-10

2018.10.11

Table 3.1.8 Assignment of SUB Board Connecting Connector (J2) Pins (2)

Signal Name

73 PE_1 / ET0_RXD0/RMII0_RXD0 / VIO_D7

74 PA_2 / DV0_DATA11 / LCD0_DATA12

75 Vss 76 PA_7 / DV0_DATA6 / LCD0_DATA17

77 PA_0 / DV0_DATA13 / LCD0_DATA10

78 PE_2 / ET0_RXD1/RMII0_RXD1 / VIO_D6

79 PE_3 / ET0_RXER/RMII0_RXER / VIO_D5

80 PA_1 / DV0_DATA12 / LCD0_DATA11

81 Vss 82 Vss 83 P9_1 / A9 / DRP15 / RxD4

84 P9_0 / A8 / DRP16 / TxD4

85 Vss 86 P8_0 / DV0_DATA14 / LCD0_DATA9

87 P8_7 / A7 / DRP17 / RSPCK0

88 PF_1 / DV0_DATA16 / LCD0_DATA7

89 Vss 90 PF_0 / DV0_DATA15 / LCD0_DATA8

91 PE_4 / ET0_CRS/RMII0_CRSDV / VIO_D4

92 P8_5 / A5 / DRP19 / MISO0

93 PF_2 / DV0_DATA17 / LCD0_DATA6

94 Vss 95 P8_6 / A6 / DRP18 / MOSI0

96 DP1 97 P8_3 / A3 / DRP21

98 DM1 99 Vss 100

Vss 101 P8_4 / A4 / DRP20 / SSL00

102

PE_0 / ET0_RXCLK/REF50CK0 / VIO_FLD

103 PE_5 / ET0_MDC / VIO_D3

104

Vss 105 PH_0 / VIO_D1

106

P6_2 / ET0_TXD0/RMII0_TXD0 / VIO_VD

107 PE_6 / ET0_MDIO / VIO_D2

108

PF_6 / DV0_DATA21 / LCD0_DATA2

109 Vss 110

PK_0 / ET1_TXEN/RMII1_TXDEN / NAF3

111 P6_3 / ET0_TXD1/RMII0_TXD1 / VIO_HD

112

P9_4 / A12 / DRP12 / SSITxD0

113 PF_4 / DV0_DATA19 / LCD0_DATA4

114

Vss 115 PF_5 / DV0_DATA20 / LCD0_DATA3

116

PG_1 / VIO_D9

117 Vss 118

P9_7 / A15 / DRP09

119 P6_1 / ET0_TXEN/RMII0_TXDEN / VIO_CLK

120

P7_4 / CAS / DRP07 / RTS1

121 Vss 122

Vss 123 P7_1 / RD/WR / DRP05 / RxD1

124

PF_3 / DV0_DATA18 / LCD0_DATA5

125 P6_0 126

PH_1 / VIO_D0

127 P6_6 / DRP02

128

P8_1 / A1 / DRP23

129 PG_3 / VIO_D11

130

Vss 131 Vss 132

PK_3 / ET1_RXCLK/REF50CK1 / NAF6

133 PK_2 / ET1_TXD1/RMII1_TXD1 / NAF5

134

Vss 135 P6_5 / CS3 / DRP01

136

PF_7 / DV0_DATA23 / LCD0_DATA0

137 PK_1 / ET1_TXD0/RMII1_TXD0 / NAF4

138

Vss 139 Vss 140

PJ_7 / NAF0 / LCD0_EXTCLK

141 P8_2 / A2 / DRP22

142

Vss 143 PH_2 / DV0_DATA22 / LCD0_DATA1

144

P0_0 / D0 / DRP24

145 Vss 146

P0_4 / D4 / DRP28

147 PJ_6 / FCE / LCD0_CLK

148

P0_3 / D3 / DRP27

149 Vss 150

P0_6 / D6 / DRP30

151 P0_1 / D1 / DRP25

152

Vss 153 P0_5 / D5 / DRP29

154

P3_2 / ET1_CRS/RMII1_CRSDV / FRE

155 P0_2 / D2 / DRP26

156

P3_5 / ET1_RXD1/RMII1_RXD1 / FCLE

[Note] : 5V power source, : 3.3V power source, : GND

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-11

2018.10.11

Table 3.1.9 Assignment of SUB Board Connecting Connector (J2) Pins (3)

Signal Name

157

Vss 158

Vss 159

PJ_1 / IRQ0

160

P1_0 / D7 / DRP31

161 PH_5 / NAF2 / ET1_EXOUT

162 Vss 163

PH_6 / ET1_WOL

164

PK_4 / ET1_RXD0/RMII1_RXD0 / NAF7

165

Vss 166

P3_1 / ET1_RXER/RMII1_RXER / FALE

167

PK_5 / NAF1

168

Vss 169

PG_4 / VIO_D15

170

P4_0 / TXOUT0P

171

PG_6 / VIO_D13

172

P4_1 / TXOUT0M

173

P1_4 / D11

174

Vss 175

Vss 176

P4_4 / TXOUT2P

177

P3_3 / ET1_MDC / FWE

178

P4_5 / TXOUT2M

179

P1_1 / D8

180

Vss 181

PG_7 / VIO_D12

182

P4_2 / TXOUT1P

183

PG_5 / VIO_D14

184

P4_3 / TXOUT1M

185

Vss 186

Vss 187

P3_4 / ET1_MDIO / FRB

188

P4_6 / TXCLKOUTP

189

P1_3 / D10

190

P4_7 / TXCLKOUTM

191

P3_0 / ET1_LINKSTA

192

Vss 193

P2_1 / D13

194

PC_0 / VBUSIN1

195

Vss 196

P1_2 / D9

197

PC_1 198

P2_2 / D14

199

P2_3 / D15

200

P2_0 / D12

201

Vss 202

PC_2

203

NMI 204

Vss

[Note] : 5V power source, : 3.3V power source, : GND

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-12

2018.10.11

3.2 Layout of Operation Components

Figure 3.2.1 illustrates the layout of operation components of RTK7921053C00000BE.

Figure 3.2.1 Layout of Operation Components of RTK7921053C00000BE

JP1: ROMVcc

selection jumper

JP2: RAMVcc

selection jumper

JP3: VBUS power

supply jumper

SW1: DIP switch for

system settings

SW2:

Reset switch

LED1: User LED

LED2:

Power LED

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-13

2018.10.11

3.2.1 Jumpers (JP1 - JP3)

RTK7921053C00000BE contains three system setting jumpers. Figure 3.2.2 illustrates the layout of these jumpers. Table 3.2.1 and Table 3.2.2 lists jumper settings.

Figure 3.2.2 Layout of Jumpers of RTK7921053C00000BE

Table 3.2.1 Setting for Power Source Selection Jumpers (JP1, JP2)

Jumper

Setting

Function

JP1

ROMVcc selection

1－2

Supplies 3.3 V to PVcc_SPI and serial flash memory of

RZ/A2M.

2－3

Supplies 1.8 V to PVcc_SPI and serial flash memory of

RZ/A2M

. (Setting prohibited)

JP2

RAMVcc selection

1－2

Supplies 3.3 V to PVcc_HO and HyperMCP of

RZ/A2M

. (Setting prohibited)

2－3

Supplies 1.8 V to PVcc_HO and HyperMCP of

RZ/A2M.

[Note] : Initial setting

Before changing jumper settings, be sure to turn off the board. If the jumper JP1 or JP2 are erroneously set, the memory may be damaged. Please confirm the pin number

closely when changing the settings.

Table 3.2.2 Settings for VBUS Power Supply Jumper (JP3)

Jumper

Setting

Function

JP3

For USB ch0

Short

Uses USB ch0 as host mode (with VBUS voltage supplied).

Open

Uses USB ch0 as function mode (with no VBUS voltage supplied).

[Note] : Initial setting.

Before changing jumper settings, be sure to turn off the board.

C side top view

JP3

2

1

3

JP2

3

1

JP1

1

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-14

2018.10.11

3.2.2 Functions of Switches and LEDs

RTK7921053C00000BE contains two switches and two LEDs. Figure 3.2.3 illustrates the layout of switches and LEDs. Table 3.2.3 lists mounted switches. Table 3.2.4 provides

functions of the DIP switch. Table 3.2.5 lists mounted LEDs.

Figure 3.2.3 Layout of Switches and LEDs Mounted on RTK7921053C00000BE

ON

1 2 3 4 5 6 7 8

SW1

C side top view

LED1

(Dual)

SW2

LED2

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-15

2018.10.11

Table 3.2.3 Switches Mounted on RTK7921053C00000BE

No.

Function

Note

SW1

System setting DIP switch

For details, see

Table 3.2.4.

SW2

Reset switch

For details, see section 2.8.

Table 3.2.4 Functions of System Setting DIP Switch (SW1)

No.

Setting

Function

SW1-1

MD_CLKS

OFF

MD_CLKS=”H”

Activates SSCG.

ON

MD_CLKS=”L”

Deactivates SSCG.

SW1-2

MD_CLK

OFF

MD_CLK=”H”

Sets the EXTAL input frequency to 20 to 24 MHz.

ON

MD_CLK=”L”

Sets the EXTAL input frequency to 10 to 12 MHz (Setting prohibited).

SW1-3

MD_BOOT2

OFF

MD_BOOT2=”H”

Boot Mode MD_BOOT[2:0]

Boot Device

0 (B'000)

Memory connected to the CS0 space (Bus width: 16 bits) (Setting prohibited)

1 (B'001)

eSD 2 (B'010)

eMMC (Setting prohibited)

3 (B'011)

Serial flash memory connected

to the SPIBSC

space (3.3V)

4 (B'100)

OctaFlash

connected to the

SPIBSC space

(1.8V)

5 (B'101)

HyperFlash

connected to the

SPIBSC space

(1.8V)

6 (B'110)

OctaFlash

connected to the

OctaFlash space

(1.8V)

7 (B'111)

HyperFlash

connected to the

HyperFlash space

(1.8V)

ON

MD_BOOT2=”L”

SW1-4

MD_BOOT1

OFF

MD_BOOT1=”H”

ON

MD_BOOT1=”L”

SW1-5

MD_BOOT0

OFF

MD_BOOT0=”H”

ON

MD_BOOT0=”L”

SW1-6

BSCANP

OFF

BSCANP=”H”

Boundary scan mode

ON

BSCANP=”L”

Normal operation (CoreSight debug mode)

SW1-7

Vss1

OFF

Vss1=”H”

3.3V applied (Setting prohibited)

ON

Vss1=”L”

GND connection

SW1-8

Vss2

OFF

Vss2=”H”

3.3V applied (Setting prohibited)

ON

Vss2=”L”

GND connection

[Note] : Initial setting

Before changing DIP switch settings, be sure to turn off the board.

Table 3.2.5 LEDs Mounted on RTK7921053C00000BE

No.

Color

Function

LED1

Red

User LED (Lit while P6_0 output is “H”)

Green

User LED (Lit while PC_1 output is “H”)

LED2

Blue

Power LED (Lit while 5V is supplied)

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

R20UT4397EJ0100 Rev.1.00 3-16

2018.10.11

3.3 Dimensions

Figure 3.3.1 shows the dimensions of RTK7921053C00000BE (C side top view).

＜C side top view＞ Unit: mm

Figure 3.3.1 Dimensions of RTK7921053C00000BE (C Side Top View)

RZ/A2M CPU Board RTK7921053C00000BE Appendix 1

R20UT4397EJ0100 Rev.1.00 Appendix 1-1

2018.10.11

Appendix 1 RTK7921053C00000BE Connection Diagram

RZ/A2M CPU Board RTK7921053C00000BE Appendix 1

R20UT4397EJ0100 Rev.1.00 Appendix 1-2

2018.10.11

1

2

3

4

5

RZ/A2M CPU board RTK7921053C00000BE SCHEMATICS (BGA324)

A A

TITLE

Index RZ/A2M(Dedicate), RAM, ROM, USB, MIPI,

PAGE

1 2

microSD, Clock, Dip-SW

B B

RZ/A2M(Multi purpose, Power) Mating Power POR, UDI

3 4 5 6

Note:

Digital GND (GND)

Analog GND (AVss)

USB GND (UVss)

Not mounted

D5V = Digital 5V (System Power) D3.3V = Digital 3.3V A3.3V = Analog 3.3V PVcc = 3.3V for RZ/A2M I/O Vcc = 1.2V for RZ/A2M Core AVcc = Analog 3.3V for RZ/A2M PLLVcc = Analog 1.2V for RZ/A2M PLL

C C

USBAPVcc = Analog 3.3V for RZ/A2M USB USBDPVcc = Digital 3.3V for RZ/A2M USB LVDSAPVcc = Analog 3.3V for RZ/A2M LVDS

R = Fixed Resistors RA = Resistor Array C = Ceramic Caps CE = Tantalum Electrolytic Caps CP = Decoupling Caps

D D

Renesas Electronics Corporation.

CHANGE

Renesas Electronics Corporation.

APPROVED

CHECKEDDRAWN

SCALE

DATE

18-10-11

1

2

3

CHECKEDDRAWN

DESIGNED

4

APPROVED

RZ/A2M CPU board

INDEX

R20UT4394EJ0100

5

(

/)

16

(

/)

16

(

/)

16

5

X1 CX1612DB24000D0PPSCC

Kyocera

R15 1MΩ

R17

X2

3300Ω

CX1612DB48000D0PPSC1

Kyocera

R23 1MΩ

4

C3

9pF

1 3

2

C4

10pF

_100Ω-1%

R40

R41

PD_2 PD_3

PD_4/SCL2

PD_4

PD_5/SDA2

PD_5

VBUS

PD_4/SCL2

PD_4

PD_5/SDA2

PD_5

R78 _10kΩ

R79 _10kΩ

ADDR NCHGPIO mode (I2C disable)

I2C 7-bit address is 0x67

L I2C 7-bit address is 0x47

D3.3V

12

B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1

8 7

5 3 11

12

CP7

0.1µF

JP3 HWP-2P-G

MAC8

R35 2.2kΩ

D3.3V

1 3

C2

9pF

PD_[7:2][3,4]

D3.3V

R36 2.2kΩ

R38 2.2kΩ

R37 2.2kΩ

+

CE1 150µF/10V

L1

_L600

CP13

0.1µF

2

_100Ω-1%

R39

D D

CN2

1-1734248-5 J1 _LL1013-04A-15

C C

B B

D3.3V

R77 22kΩ

PL_2/IRQ6 PL_3/IRQ7

A A

R76 22kΩ

IRQ6 IRQ7

TE

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

D5V

2

4 5

CP8

0.1µF

A1 A2 A3 A4 A5 A6 A7 A8

A9 A10 A11 A12

R75 909kΩ

4

1 2

9 6

10

30 29 28 27 26 25 24 23 22 21 20 19 18 17

U5 TPS2034

TI

IN1 IN23OUT2

EN OC#

CN3 DX07S024XJ1

JAE

GND TX1+ TX1VBUS CC1 D+ DSBU1 VBUS RX2RX2+ GND

A13

U7 TUSB320LI

TI

VBUS_DET

CC1 CC2

ID INT_N/OUT3

GND

OUT1

OUT3

GND

FG1

FG2

A14

B13

SDA/OUT1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 1516

6 7 8

1

GND RX1+

RX1VBUS SBU2

VBUS

TX2+

GND

FG3

FG4

B14

SCL/OUT2

ADDR

PORT EN_N

D-

D+

CC2

TX2-

VDD

R25 1000Ω

4

C5

NMI[4] RES#[4,6] TCK[6] TMS[6] TDI[6] TDO[6] TRST#[6]

CKIO[4]

DP1[4] DM1[4]

R62 1kΩ

D3.3V

4

X3 ST2012SB32768H5HPWAA

Kyocera

C6 22pF

10pF

D3.3V

R54 2.2kΩ

C9 4.7µF

R66 1.8kΩ

PORT NCHDRP (Dual Role Port)

L UFP (Device)

U1B RZ/A2M

AB18

EXTAL

AA18

XTAL

T1

R18

AUDIO_X1

T2

22kΩ

AUDIO_X2

AB10

USB_X1

AA10

USB_X2

AB20

RTC_X1

AA20

RTC_X2

C7 22pF

R32 22kΩ

Y10

NMI

AB9

RES#

E21

JP0_3 / TCK

F21

JP_2 / TMS

E22

JP0_0 / TDI

G19

JP0_1 / TDO

F20

JP0_4 / TRST#

W2

CSI_DATA0N

W1

CSI_DATA0P

Y2

CSI_DATA1N

Y1

CSI_DATA1P

V2

CSI_CLKN

V1

CSI_CLKP

A21

R46

CKIO

22Ω

AA15

DP1

AB15

DM1

AB13

R47

RREF1

2.2kΩ

D3.3V

PH_4 / HM_INT# / CTS2 / GTIOC6B / MTIOC2B / SD0_WP / IRQ2

PH_3 / HM_RSTO# / RTS2 / GTIOC6A / MTIOC2A / SD0_CD / IRQ3

R55 2.2kΩ

AA11

DP0

AB11

DM0

W19

P5_2 / AN002 / IRQ6 / VBUSIN0

Y18

PC_6 / VBUSEN0 / FWE / ET1_RXD2 / SD1_CD / LCD0_TCON1 / IRQ7

Y17

PC_7 / OVRCUR0 / FRB / ET1_RXD3 / SD1_WP / LCD0_TCON0 / IRQ6

AA13

R65

RREF0

2.2kΩ

Type-C port type

DFP (Host)

P5_1 / AN001 / IRQ5 / SD0_WP / SD1_WP

P5_0 / AN000 / IRQ4 / SD0_CD / SD1_CD

U1

HM_RESET#/OM_RESET#

SD0_CLK

SD0_CMD

SD0_DAT0 SD0_DAT1 SD0_DAT2 SD0_DAT3 SD0_DAT4 SD0_DAT5 SD0_DAT6 SD0_DAT7

SD0_RST#

SD1_DAT0 SD1_DAT1 SD1_DAT2 SD1_DAT3

SD1_CLK

SD1_CMD

QSPI0_IO0 QSPI0_IO1 QSPI0_IO2 QSPI0_IO3 QSPI1_IO0 QSPI1_IO1 QSPI1_IO2 QSPI1_IO3

QSPI0_SPCLK QSPI1_SPCLK

QSPI0_SSL QSPI1_SSL

RPC_RESET#

RPC_WP# RPC_INT#

HM_DQ0/OM_SIO0 HM_DQ1/OM_SIO1 HM_DQ2/OM_SIO2 HM_DQ3/OM_SIO3 HM_DQ4/OM_SIO4 HM_DQ5/OM_SIO5 HM_DQ6/OM_SIO6 HM_DQ7/OM_SIO7

HM_CK/OM_SCLK

HM_CK# HM_CS0#/OM_CS0# HM_CS1#/OM_CS1#

HM_RWDS/OM_DQS

PL_0 / MD_CLKS / IRQ4

PL_1 / MD_CLK / IRQ5 PL_2 / MD_BOOT2 / IRQ6 PL_3 / MD_BOOT1 / IRQ7 PL_4 / MD_BOOT0 / IRQ0

BSCANP

Vss_49 Vss_48

3

U22

R14 22Ω

U21

R16 22Ω

T19

R19 22Ω

T20

R20 22Ω

R19

R21 22Ω

T21

R22 22Ω

R21

R24 22Ω

R20

R26 22Ω

R22

R27 22Ω

P19

R28 22Ω

Y20 Y19 P20

TP1 SD_RST#

SD1_D0

U19

SD1_D1

V20

SD1_D2

U20

SD1_D3

V21

Y22

R31 22Ω

W21

ROM_D0

C7

ROM_D1

B6

ROM_D2

D7

ROM_D3

A5

ROM_D4

B4

ROM_D5

B3

ROM_D6

D5

ROM_D7

A2

B7

R44 22Ω

A3

R45 22Ω

C6 C4

B5 A4 C5

RAM_D0

H4

RAM_D1

G1

RAM_D2

H2

RAM_D3

H3

RAM_D4

H1

RAM_D5

J4

RAM_D6

J2

RAM_D7

J3

F3

R56 22Ω

G4

R57 22Ω

F2 G3 G2 J1

K3 E2

C12

PL0

B12

PL1

A11

PL2

B11

PL3

PL_4

C11

PL_5

D2

PL_6

C20

PL_7

B21

Open drain output System setting#/IRQ input

PD_0/IRQ#[3]

2

D3.3VSDVcc

microSD

CN1

R11 22kΩ

R10 22kΩ

R30 68kΩ

ROM_D0 ROM_D1 ROM_D2 ROM_D3 ROM_D4 ROM_D5 ROM_D6 ROM_D7

RAM_D0 RAM_D1 RAM_D2 RAM_D3 RAM_D4 RAM_D5 RAM_D6 RAM_D7

S1OE

5 3

7 8 1 2

10

9

C8 _18pF

D3 D2 C4 D4 D5

E3 E2 E1

B2 B1

C2

A3

A4

C3

A5 A2

D3 D2 C4 D4 D5

E3 E2 E1

B2 B1

C2

A3

A4

C3

A5 A2

MUX

GND

15

DM3AT-SF-PEJM5

HRS

CLK CMD

DAT0

VDD DAT1 DAT2 CD/DAT3

VSS

microSD (Standard)

PAD1 PAD2

Card_Detect

PAD3

COMMON

PAD4

HyperFlash

U2 HyperFlash

Cypress

PSC (RFU)

DQ0

PSC#(RFU)

DQ1 DQ2

NC

DQ3 DQ4

U2

DQ5 DQ6 DQ7

CK

VssQ

CK#

VssQ

CS#

Vss

RFU

RESET# (PU) RWDS

VccQ (I/O)

INT#

VccQ (I/O)

RSTO#

Vcc (Core)

HyperRAM

U3 HyperRAM

Cypress

PSC

DQ0

PSC# (RFU)

DQ1 DQ2

NC

DQ3 DQ4

U3

DQ5 DQ6 DQ7

CK

VssQ

CK# (RFU)

VssQ

RFU

Vss

CS#

RESET# (PU) RWDS

VccQ (I/O)

RFU

VccQ (I/O)

RFU

Vcc (Core)

2

IRQ4

1B1

3

1B2

5

IRQ5

2B1

6

2B2

11

IRQ6

3B1

10

3B2

14

IRQ7

4B1

13

4B2

8

4

6

11 12 13 14

B5 C5

A1

C1 E5 B3

D1 E4 B4

B5 C5

A1

C1 E5 B3

D1 E4 B4

PL_0

PL_1

PL_2

PL_3

D3.3V

CP1

0.1µF

R33 _22kΩ R34 _22kΩ

CP4

0.1µF

R48 _22kΩ R49 _22kΩ

CP9

0.1µF

CP5

0.1µF

CP10

0.1µF

PL_[7:0]

IRQ[7:4] [4]

PL_0 PL_1 PL_2 PL_3 PL_4 PL_5 PL_6 PL_7

CP6

0.1µF

CP11

0.1µF

ROMVcc

RAMVcc

Open drain output

PD_1/SDVcc_SEL[3]

ROMVcc

R132 _22kΩ

ROM_D2

CP69

4.7µF

CP70

4.7µF

D3.3V

R74 22kΩ

R70 22kΩ

R71 22kΩ

R73 22kΩ

R69 22kΩ

R72 22kΩ

R68 22kΩ

R67 22kΩ

SW1 A6H-8101

OMRON

1 2 3 4 5 12 6 7

R5 22kΩ

R8 22kΩ

R4 22kΩ

R6 22kΩ

R9 22kΩ

R2 22kΩ

R3 22kΩ

R7 22kΩ

R1 22kΩ

SD1_D[3:0] [4]

R29 68kΩ

SD1_CLK [4] SD1_CMD [4]

ROM_D[7:0]

ROMVcc

R43 22kΩ

R42 10kΩ

R129 22kΩ

R131 _22kΩ

RAM_D[7:0]

D3.3V

RAMVcc

R52 22kΩ

R53 22kΩ

R51 22kΩ

R50 22kΩ

R63 68kΩ

R64 68kΩ

D3.3V

PL[3:0]

R80 2.2kΩ

PL0

PL1

PL2

PL3

D3.3V

R130 _22kΩ

R58 _0Ω

R59 0Ω

R60 _0Ω R61 _0Ω

R133 200kΩ

U6 SN74CB3Q3257

Texas Instruments

4

1A

7

2A

9

3A

12

4A

16

Vcc

CP12

0.1µF

1

D3.3V

U4 FPF1320

D1.8V

ON Semiconductor

D3.3V

A2

VINA

C2

R12 2.2kΩ

R13 22kΩ

D1.8V

16 15 14 13

11 10 98

VINB

A1

EN

B1

SEL

SEL Vout 01VinA

CP2 0.1µF

CP3 0.1µF

ROMVccD3.3V

1

2

3

JP1 PSS-710103-02

Hirosugi-keiki

PL_0/MD_CLKS : 0=SSCG OFF, 1=ON PL_1/MD_CLK : 0=10~12MHz, 1=20~24MHz PL_2/MD_BOOT2 PL_3/MD_BOOT1 PL_4/MD_BOOT0 BSCANP : 0=Boundary scan OFF, 1=ON

Fixed to ON Fixed to ON

VOUT

VinB

GND

D3.3V

D1.8V

SDVcc

B2

C1

1µF

C1

1

2

3

JP2 PSS-710103-02

RAMVcc

CHANGE

Renesas Electronics Corporation.

2

APPROVED

DESIGNEDCHECKED

DRAWN

SCALE

DATE

18-10-11

5

4

18-10-11

3

DRAWN

DESIGNEDCHECKED

RZ/A2M CPU board

RZ/A2M(Dedicated)

R20UT4394EJ0100

1

( / )26

5

P0_[6:0][4]

D D

C C

B B

P1_[4:0][4]

P2_[3:0][4]

P3_[5:0][4]

P4_[7:0][4]

P5_[7:3][4]

P6_[7:0][4]

P7_[7:0][4]

P8_[7:0][4]

P9_[7:0][4]

U1A RZ/A2M

Renesas Renesas

P0_0

L3

P0_0 / D0 / DRP24 / DV0_DATA17 / MTIOC6B / GTIOC3B

P0_1

L2

P0_1 / D1 / DRP25 / DV0_DATA18 / MTIOC6C / GTIOC4A

P0_2

M1

P0_2 / D2 / DRP26 / DV0_DATA19 / MTIOC6D / GTIOC4B

P0_3

M4

P0_3 / D3 / DRP27 / DV0_DATA20 / MTIOC7A / GTIOC6A

P0_4

M3

P0_4 / D4 / DRP28 / DV0_DATA21 / MTIOC7B / GTIOC6B

P0_5

M2

P0_5 / D5 / DRP29 / DV0_DATA22 / MTIOC7C / GTIOC7A

P0_6

N3

P0_6 / D6 / DRP30 / DV0_DATA23 / MTIOC7D / GTIOC7B

P1_0

W5

P1_0 / D7 / DRP31 / IRQ0 / CAN_CLK / VBUSEN0

P1_1

AA3

P1_1 / D8 / MTIOC8A / IRQ1 / CAN0RX / OVRCUR0

P1_2

W6

P1_2 / D9 / MTIOC8B / IRQ2 / CAN0RX_DATARATE_EN / VBUSEN1

P1_3

AB4

P1_3 / D10 / MTIOC8C / IRQ3 / CAN0TX / OTG_ID1

P1_4

Y5

P1_4 / D11 / MTIOC8D / IRQ4 / CAN0TX_DATARATE_EN / VBUSIN0

P2_0

W7

P2_0 / D12 / GTIOC6A / IRQ5 / CAN1RX / OTG_EXICEN0

P2_1

AB5

P2_1 / D13 / GTIOC6B / IRQ6 / CAN1RX_DATARATE_EN / OTG_ID0

P2_2

Y7

P2_2 / D14 / GTIOC7A / IRQ7 / CAN1TX / VBUSIN1

P2_3

AB6

P2_3 / D15 / GTIOC7B / WDTOVF/PERROUT / CAN1TX_DATARATE_EN / OTG_EXICEN1

P3_0

AA5

P3_0 / OTG_EXICEN1 / NAF4 / ET1_LINKSTA / MTIC5W / IRQ3

P3_1

U3

P3_1 / ET1_RXER/RMII1_RXER / FALE / VBUSEN0 / CAN1RX / RSPCK2 / IRQ6

P3_2

T4

P3_2 / ET1_CRS/RMII1_CRSDV / FRE / CC1_RA1 / CAN1RX_DATARATE_EN / MOSI2

P3_3

Y4

P3_3 / ET1_MDC / FWE / OTG_EXICEN0 / CAN1TX / MISO2 / IRQ7

P3_4

AA4

P3_4 / ET1_MDIO / FRB / CC2_RA1 / CAN1TX_DATARATE_EN / SSL20

P3_5

T3

P3_5 / ET1_RXD1/RMII1_RXD1 / FCLE / CC2_RA0 / CAN0TX_DATARATE_EN / SSL00

P4_0

AA7

P4_0 / SCK0 / TXOUT0P / SCI_SCK1 / SSIBCK1 / MTIOC8A / IRQ0

P4_1

AB7

P4_1 / RXD0 / TXOUT0M / SCI_RXD1 / SSIRXD1 / MTIOC8B / IRQ1

P4_2

Y8

P4_2 / TXD0 / TXOUT1P / SCI_TXD1 / SSITXD1 / MTIOC8C / IRQ2

P4_3

W9

P4_3 / RTS0 / TXOUT1M / SCI_CTS1/RTS1 / SSIFS1 / MTIOC8D / IRQ3

P4_4

AA8

P4_4 / CTS0 / TXOUT2P / SCI_CTS0/RTS0 / WDTOVF/PERROUT / OTG_EXICEN0

P4_5

AB8

P4_5 / ET0_LINKSTA / TXOUT2M / SCI_RXD0 / RXD4 / DREQ0

P4_6

Y9

P4_6 / ET0_EXOUT / TXCLKOUTP / SCI_TXD0 / TXD4 / DACK0

P4_7

AA9

P4_7 / ET0_WOL / TXCLKOUTM / SCI_SCK0 / SCK4 / TEND0

P5_3

AA21

P5_3 / AN003 / IRQ7 / OTG_ID0

P5_4

V19

P5_4 / AN004 / IRQ0 / SD1_CD

P5_5

AA22

P5_5 / AN005 / IRQ1 / SD1_WP

P5_6

W20

P5_6 / AN006 / IRQ2

P5_7

Y21

P5_7 / AN007 / IRQ3

P6_0

M20

P6_0 / ADTRG0

P6_1

C8

P6_1 / ET0_TXEN/RMII0_TXDEN / VIO_CLK / SCK3 / MTIOC2A

P6_2

C9

P6_2 / ET0_TXD0/RMII0_TXD0 / VIO_VD / RXD3 / MTIOC2B / OTG_EXICEN1 / IRQ0

P6_3

B9

P6_3 / ET0_TXD1/RMII0_TXD1 / VIO_HD / TXD3 / POE0

P6_4

N21

P6_4 / CS5 / DRP00 / LCD0_TCON6 / AUDIO_CLK / SD1_CD

P6_5

N19

P6_5 / CS3 / DRP01 / LCD0_TCON5 / AUDIO_XOUT / CC1_RD0

P6_6

M19

P6_6 / CS2 / DRP02 / LCD0_TCON4 / DREQ0 / CC1_RA0

P6_7

P21

P6_7 / WE0/DQML / DRP03 / LCD0_TCON3 / DACK0 / CC2_RD0

P7_0

M21

P7_0 / WE1/DQMU / DRP04 / DV0_CLK / SCK1 / CC1_RD1

P7_1

L19

P7_1 / RD/WR / DRP05 / DV0_VSYNC / RXD1 / CC1_RA1

P7_2

L22

P7_2 / CS4 / DV0_CLK / LCD0_TCON2 / TEND0 / CC2_RA0

P7_3

L21

P7_3 / RAS / DRP06 / DV0_HSYNC / TXD1 / CC2_RD1

P7_4

L20

P7_4 / CAS / DRP07 / DV0_DATA0 / RTS1 / CC2_RA1

P7_5

K21

P7_5 / CKE / DRP08 / DV0_DATA1 / CTS1 / OVRCUR1

P7_6

J21

P7_6 / AH / DV0_VSYNC / LCD0_TCON1 / GTIOC3A / SCK0

P7_7

J20

P7_7 / RD / DV0_HSYNC / LCD0_TCON0 / GTIOC3B / RXD0

P8_0

D15

P8_0 / A0 / DV0_DATA14 / LCD0_DATA9 / SCI_CTS1/RTS1 / MTIOC8D

P8_1

D3

P8_1 / A1 / DRP23 / DV0_DATA16 / GTIOC5B / IRQ3

P8_2

C2

P8_2 / A2 / DRP22 / DV0_DATA15 / GTIOC5A / IRQ2

P8_3

B13

P8_3 / A3 / DRP21 / DV0_DATA14 / MTIOC6A / GTIOC3A

P8_4

A13

P8_4 / A4 / DRP20 / DV0_DATA13 / SSL00 / SSIRXD3

P8_5

C13

P8_5 / A5 / DRP19 / DV0_DATA12 / MISO0 / SSITXD3

P8_6

A14

P8_6 / A6 / DRP18 / DV0_DATA11 / MOSI0 / SSIFS3

P8_7

B15

P8_7 / A7 / DRP17 / DV0_DATA10 / RSPCK0 / SSIBCK3

P9_0

C15

P9_0 / A8 / DRP16 / DV0_DATA9 / TXD4 / SSIDATA2

P9_1

A16

P9_1 / A9 / DRP15 / DV0_DATA8 / RXD4 / SSIFS2

P9_2

G22

P9_2 / A10 / DRP14 / DV0_DATA7 / SCK4 / SSIBCK2

P9_3

H20

P9_3 / A11 / DRP13 / DV0_DATA6 / SSIRXD0

P9_4

J19

P9_4 / A12 / DRP12 / DV0_DATA5 / SSITXD0

P9_5

H22

P9_5 / A13 / DRP11 / DV0_DATA4 / SSIFS0

P9_6

J22

P9_6 / A14 / DRP10 / DV0_DATA3 / SSIBCK0

P9_7

K19

P9_7 / A15 / DRP09 / DV0_DATA2 / SD1_WP

4

PA_0 / A16 / DV0_DATA13 / LCD0_DATA10 / SCI_TXD1 / MTIOC8C

PA_1 / A17 / DV0_DATA12 / LCD0_DATA11 / SCI_RXD1 / MTIOC8B / IRQ6

PA_2 / A18 / DV0_DATA11 / LCD0_DATA12 / SCI_SCK1 / MTIOC8A

PA_3 / A19 / DV0_DATA10 / LCD0_DATA13 / SCI_CTS0/RTS0 / MTIOC0D

PA_4 / A20 / DV0_DATA9 / LCD0_DATA14 / SCI_TXD0 / MTIOC0C

PA_5 / A21 / DV0_DATA8 / LCD0_DATA15 / SCI_RXD0 / MTIOC0B / IRQ5

PA_6 / A22 / DV0_DATA7 / LCD0_DATA16 / SCI_SCK0 / MTIOC0A

PA_7 / A23 / DV0_DATA6 / LCD0_DATA17 / SSIRXD1 / POE10

PB_0 / A24 / DV0_DATA5 / LCD0_DATA18 / SSITXD1 / POE8

PB_1 / A25 / DV0_DATA4 / LCD0_DATA19 / SSIFS1 / POE4

PB_2 / BS / DV0_DATA3 / LCD0_DATA20 / SSIBCK1 / POE0

PB_3 / CS0 / DV0_DATA2 / LCD0_DATA21 / SSIDATA2 / CTS0

PB_4 / CS1 / DV0_DATA1 / LCD0_DATA22 / SSIFS2 / RTS0

PB_5 / WAIT / DV0_DATA0 / LCD0_DATA23 / SSIBCK2 / TXD0

PC_0 / VBUSIN1 / NAF5 / ET1_TXCLK / RSPCK2 / IRQ2

PC_1 / VBUSIN0 / NAF6 / ET1_TXD2 / MOSI2 / LCD0_TCON6

PC_2 / OTG_EXICEN0 / NAF7 / ET1_TXD3 / MISO2 / LCD0_TCON5

PC_3 / OTG_ID0 / FCLE / ET1_COL / SSL20 / LCD0_TCON4

PC_4 / OTG_ID1 / FALE / ET1_TXER / SPDIF_IN / LCD0_TCON3 / IRQ1

PC_5 / VBUSEN1 / FRE / ET1_RXDV / SPDIF_OUT / LCD0_TCON2 / IRQ0

PE_1 / ET0_RXD0/RMII0_RXD0 / VIO_D7 / RXD2 / POE8 / VBUSIN1 / IRQ1

PF_0 / SCK3 / DV0_DATA15 / LCD0_DATA8 / MTIOC7A / RSPCK1

PF_1 / RXD3 / DV0_DATA16 / LCD0_DATA7 / MTIOC7B / MOSI1 / IRQ4

PF_4 / RXD2 / DV0_DATA19 / LCD0_DATA4 / MTIOC6A / SSIBCK0 / IRQ1

PF_6 / RTS2 / DV0_DATA21 / LCD0_DATA2 / MTIOC6C / SSITXD0

PF_7 / GTETRGD / DV0_DATA23 / LCD0_DATA0 / MTCLKD / IRQ1

PG_2 / ET0_TXD3 / VIO_D10 / MISO0 / MTIOC3B / GTIOC0A / IRQ4

PG_6 / ET0_RXD2 / VIO_D13 / MISO1 / MTIOC4C / GTIOC2A / IRQ5

PH_0 / AUDIO_CLK / VIO_D1 / GTIOC4A / MTIOC1A / CC1_RD0 / IRQ3

PH_1 / AUDIO_XOUT / VIO_D0 / GTIOC4B / MTIOC1B / CC2_RD0 / IRQ2

PH_2 / CTS2 / DV0_DATA22 / LCD0_DATA1 / MTIOC6D / SSIRXD0

PJ_0 / TRACECLK / SPDIF_OUT / VRAMMON0 / SCK1 / SSIRXD3

PJ_1 / TRACECTL / SPDIF_IN / VRAMMON1 / RXD1 / VBUSIN0 / IRQ0

PJ_5 / TRACEDATA3 / NAF2 / OVRCUR0 / MTIOC1A / SSIFS2 / IRQ4

PK_0 / ET1_TXEN/RMII1_TXDEN / NAF3 / CC1_RD0 / MTIOC1B / SSIBCK2 PK_1 / ET1_TXD0/RMII1_TXD0 / NAF4 / CC1_RA0 / CAN_CLK / SSIDATA2

PK_2 / ET1_TXD1/RMII1_TXD1 / NAF5 / VBUSEN1 / CAN0RX / RSPCK0 / IRQ5

PK_3 / ET1_RXCLK/REF50CK1 / NAF6 / CC2_RD0 / CAN0RX_DATARATE_EN / MOSI0

PK_4 / ET1_RXD0/RMII1_RXD0 / NAF7 / OVRCUR1 / CAN0TX / MISO0 / IRQ6

PD_0 / RIIC0SCL / IRQ0 / MTCLKA / GTETRGA PD_1 / RIIC0SDA / IRQ1 / MTCLKB / GTETRGB

PD_2 / RIIC1SCL / IRQ2 / MTCLKC / GTETRGC

PD_3 / RIIC1SDA / IRQ3 / MTCLKD / GTETRGD

PE_0 / ET0_RXCLK/REF50CK0 / VIO_FLD / SCK2 / POE4

PE_2 / ET0_RXD1/RMII0_RXD1 / VIO_D6 / TXD2 / POE10

PE_3 / ET0_RXER/RMII0_RXER / VIO_D5 / SSIBCK0 / MTIOC0A

PE_4 / ET0_CRS/RMII0_CRSDV / VIO_D4 / SSIFS0 / MTIOC0B

PE_5 / ET0_MDC / VIO_D3 / SSITXD0 / MTIOC0C / CC1_RD1

PE_6 / ET0_MDIO / VIO_D2 / SSIRXD0 / MTIOC0D / CC2_RD1

PF_2 / TXD3 / DV0_DATA17 / LCD0_DATA6 / MTIOC7C / MISO1

PF_3 / SCK2 / DV0_DATA18 / LCD0_DATA5 / MTIOC7D / SSL10

PF_5 / TXD2 / DV0_DATA20 / LCD0_DATA3 / MTIOC6B / SSIFS0

PG_0 / ET0_TXCLK / VIO_D8 / RSPCK0 / MTIOC3A / HM_RSTO#

PG_1 / ET0_TXD2 / VIO_D9 / MOSI0 / MTIOC3C / HM_INT#

PG_3 / ET0_COL / VIO_D11 / SSL00 / MTIOC3D / GTIOC0B

PG_4 / ET0_TXER / VIO_D15 / RSPCK1 / MTIOC4A / GTIOC1A

PG_5 / ET0_RXDV / VIO_D14 / MOSI1 / MTIOC4B / GTIOC1B

PG_7 / ET0_RXD3 / VIO_D12 / SSL10 / MTIOC4D / GTIOC2B

PH_5 / HM_RSTO# / NAF2 / ET1_EXOUT / MTIC5U / IRQ5

PH_6 / HM_INT# / NAF3 / ET1_WOL / MTIC5V / IRQ4

PJ_2 / TRACEDATA0 / FCE / VRAMMON2 / TXD1 / SSITXD3 PJ_3 / TRACEDATA1 / NAF0 / VRAMMON3 / RTS1 / SSIFS3

PJ_4 / TRACEDATA2 / NAF1 / VRAMMON4 / CTS1 / SSIBCK3

PJ_6 / GTETRGC / FCE / LCD0_CLK / MTCLKC / IRQ0

PJ_7 / GTETRGB / NAF0 / LCD0_EXTCLK / MTCLKB

PK_5 / GTETRGA / NAF1 / WDTOVF/PERROUT / MTCLKA

PJ_1

P6_0

PC_1

R127 22kΩ

R85 1.8kΩ

R86 1.5kΩ

PD_4 / RIIC2SCL / IRQ4 PD_5 / RIIC2SDA / IRQ5 PD_6 / RIIC3SCL / IRQ6 PD_7 / RIIC3SDA / IRQ7

LED1 SML-522MU8W

ROHM

1

3

D3.3V

2

Red

4

Yellow green

3

PA_0

B17

PA_1

D16

PA_2

C17

PA_3

B18

PA_4

A20

PA_5

B19

PA_6

B20

PA_7

D17

PB_0

C19

PB_1

F22

PB_2

G20

PB_3

G21

PB_4

H19

PB_5

H21

PC_0

Y6

PC_1

AA6

PC_2

W8

PC_3

AB17

PC_4

AA19

PC_5

AA17

F19 D22

PD_2

E20

PD_3

C22

PD_4

D21

PD_5

E19

PD_6

D20

PD_7

C21

PE_0

D10

PE_1

A19

PE_2

C16

PE_3

B16

PE_4

A15

PE_5

A12

PE_6

A10

PF_0

D14

PF_1

C14

PF_2

B14

PF_3

D11

PF_4

A9

PF_5

B8

PF_6

D9

PF_7

F4

PG_0

C18

PG_1

K20

PG_2

K22

PG_3

N20

PG_4

V3

PG_5

AB2

PG_6

W4

PG_7

AB3

PH_0

B10

PH_1

C10

PH_2

C1

PH_5

P2

PH_6

P1

PJ_0

K4

PJ_1

N2

PJ_2

N4

PJ_3

N1

PJ_4

R2

PJ_5

R3

PJ_6

K2

PJ_7

L4

PK_0

D8

PK_1

B1

PK_2

E4

PK_3

E3

PK_4

U2

PK_5

P3

PJ_1/IRQ0(Dstby release)

PA_[7:0] [4]

PB_[5:0] [4]

PC_[5:0] [4]

PD_0/IRQ# [2] PD_1/SDVcc_SEL [2] PD_[7:2] [2,4]

PE_[6:0] [4]

PF_[7:0] [4]

PG_[7:0] [4]

PH_[2:0] [4]

PH_[6:5] [4]

PJ_[7:0] [4,6]

PK_[5:0] [4]

USBDPVcc

USBAPVcc

CP14

10µF

CP22

10µF

CP31

10µF

CP35

10µF

CP15

0.1µF

CP23

0.1µF

CP32

0.1µF

CP36

0.1µF

2

Multi power

RAMVcc

CP16

0.01µF

CP24

0.01µF

CP33

0.01µF

CP37

0.01µF

CP17

0.001µF

CP25

0.001µF

CP34

0.001µF

CP38

0.001µF

AA12

AB12

AA14 AB14

AB19

W13

W14

M10 M11 M12 M13

W11 W15 W17 W22

Y16

Y12 Y13 Y14 Y15

A18 A22

D13 D19

J10 J11 J12 J13

K10 K11 K12 K13 L10 L11 L12 L13

N10 N11 N12 N13 N22 P10 P11 P12 P13

T22

W3

Y11 AA2 AB1

A7

D6

E1

K1

R4

U1 V4

Y3

U1C RZ/A2M

USBDPVcc0

USBDPVcc1

USBAPVcc0

USBAPVcc1

USBVss_1 USBVss_2 USBVss_3 USBVss_4 USBVss_5 USBVss_6 USBVss_7

Vss_1 Vss_2 Vss_3 Vss_4 Vss_5 Vss_6 Vss_7 Vss_8 Vss_9 Vss_10 Vss_11 Vss_12 Vss_13 Vss_14 Vss_15 Vss_16 Vss_17 Vss_18 Vss_19 Vss_20 Vss_21 Vss_22 Vss_23 Vss_24 Vss_25 Vss_26 Vss_27 Vss_28 Vss_29 Vss_30 Vss_31 Vss_32 Vss_33 Vss_34 Vss_35 Vss_36 Vss_37 Vss_38 Vss_39 Vss_40 Vss_41 Vss_42 Vss_43 Vss_44 Vss_45 Vss_46 Vss_47

PVcc_HO

PVcc_SPI PVcc_SD0 PVcc_SD1

LVDSAPVcc

LVDSPLLVcc

PLLVcc MIPIAVcc18_1 MIPIAVcc18_2

Vcc_1 Vcc_2 Vcc_3 Vcc_4 Vcc_5 Vcc_6 Vcc_7 Vcc_8

Vcc_9 Vcc_10 Vcc_11 Vcc_12 Vcc_13 Vcc_14 Vcc_15 Vcc_16

PVcc_1 PVcc_2 PVcc_3 PVcc_4 PVcc_5 PVcc_6 PVcc_7 PVcc_8

PVcc_9 PVcc_10 PVcc_11 PVcc_12 PVcc_13

AVcc

AVss

F1 A6 P22 V22

LVDSAPVcc

W10 W12 W18 U4 AA1

AVcc

AB21

AB22

A1 B2 C3 D4 J9 J14 K9 K14 L9 L14 M9 M14 N9 N14 P9 P14

A8 A17 B22 D1 D12 D18 L1 M22 P4 R1 W16 AA16 AB16

R81 0Ω

CP18

0.1µF

LVDSPLLVcc

CP26

0.1µF

R128 0Ω

CP39

0.1µF

CP41 0.22µF/1005

CP40 0.22µF/1005

CP49 0.1µF/1005

CP48 0.1µF/1005

CP47 0.1µF/1005

ROMVcc

CP71 0.1µF/1005

CP42 0.33µF/1005

CP50 0.1µF/1005

CP51 0.1µF/1005

SDVcc

R82 0Ω

CP19

0.1µF

PLLVcc

CP27

0.1µF

CP72 0.1µF/1005

CP52 0.1µF/1005

CP53 0.1µF/1005

R83 0Ω

CP20

0.1µF

CP28

0.1µF

CP43 0.33µF/1005

CP73 0.1µF/1005

CP55 0.1µF/1005

CP56 0.1µF/1005

CP54 0.1µF/1005

1

D3.3V

CP21

0.1µF

CP29

0.1µF

CP74 0.1µF/1005

CP45 0.33µF/1005

CP44 0.33µF/1005

CP58 0.22µF/1005

CP57 0.1µF/1005

R84 0Ω

MIPIAVcc

CP46 4.7µF/1005

CP30

0.1µF

Vcc

22µF/10V

C34

C35

PVcc

CP59 4.7µF/1005

A A

Renesas Electronics Corporation.

CHANGE

Renesas Electronics Corporation.

2

APPROVED

DESIGNEDCHECKED

DRAWN

SCALE

DATE

18-10-11

5

4

18-10-11

3

DRAWN

DESIGNEDCHECKED

RZ/A2M CPU board

RZ/A2M(Multi purpose & Power)

R20UT4394EJ0100

( / )36

1

( / )36

5

P0_[6:0][3]

P1_[4:0][3]

D D

P2_[3:0][3]

P3_[5:0][3]

P4_[7:0][3]

P5_[7:3][3]

P6_[7:0][3]

C C

P7_[7:0][3]

P8_[7:0][3]

P9_[7:0][3]

IRQ[7:4][2]

B B

P0_0 P0_1 P0_2 P0_3 P0_4 P0_5 P0_6

P1_0 P1_1 P1_2 P1_3 P1_4

P2_0 P2_1 P2_2 P2_3

P3_0 P3_1 P3_2 P3_3 P3_4 P3_5

P4_0 P4_1 P4_2 P4_3 P4_4 P4_5 P4_6 P4_7

P5_3 P5_4 P5_5 P5_6 P5_7

P6_0 P6_1 P6_2 P6_3 P6_4 P6_5 P6_6 P6_7

P7_0 P7_1 P7_2 P7_3 P7_4 P7_5 P7_6 P7_7

P8_0 P8_1 P8_2 P8_3 P8_4 P8_5 P8_6 P8_7

P9_0 P9_1 P9_2 P9_3 P9_4 P9_5 P9_6 P9_7

IRQ5 IRQ4

RES#[2,6]

P5_3(SUB's SW6-9) P5_5/SD1_WP P5_7/IRQ3

P6_7/WE0/DQML/DRP03 P7_0/WE1/DQMU/DRP04/SCK1

P7_2/[DV0_CLK]

P7_3/RAS/DRP06/TxD1 PG_2/VIO_D10 P7_5/CKE/DRP08/CTS1/OVRCUR1

P9_6/A14/DRP10/[SSIBCK0]

P7_6/DV0_VSYNC/GTIOC3A P9_5/A13/DRP11/SSIFS0 PB_5/DV0_DATA0/LCD0_DATA23 P9_2/A10/DRP14 PB_3/DV0_DATA2/LCD0_DATA21 PB_1/DV0_DATA4/LCD0_DATA19

PA_6/DV0_DATA7/LCD0_DATA16/SCI_SCK0 PA_4/DV0_DATA9/LCD0_DATA14/SCI_TXD0 PA_5/DV0_DATA8/LCD0_DATA15/SCI_RXD0

PE_1/RMII0_RXD0/VIO_D7 PA_2/DV0_DATA11/LCD0_DATA12

PA_0/DV0_DATA13/LCD0_DATA10 PE_3/RMII0_RXER/VIO_D5 PA_1/DV0_DATA12/LCD0_DATA11

P9_1/A9/DRP15/RxD4

P8_7/A7/DRP17/[RSPCK0] PF_1/DV0_DATA16/LCD0_DATA7

PE_4/RMII0_CRSDV/VIO_D4 PF_2/DV0_DATA17/LCD0_DATA6 P8_6/A6/DRP18/MOSI0 P8_3/A3/DRP21

P8_4/A4/DRP20/SSL00 PE_5/ET0_MDC/VIO_D3 PH_0/VIO_D1 PE_6/ET0_MDIO/VIO_D2 PF_6/DV0_DATA21/LCD0_DATA2

P6_3/RMII0_TXD1/VIO_HD PF_4/DV0_DATA19/LCD0_DATA4 PF_5/DV0_DATA20/LCD0_DATA3

P6_1/RMII0_TXDEN/[VIO_CLK]

P7_1/RD/WR/DRP05/RxD1 PF_3/DV0_DATA18/LCD0_DATA5 P6_0(CPU's LED-R) P6_6/DRP02 PG_3/VIO_D11

PK_2/RMII1_TXD1/NAF5 P6_5/CS3/DRP01 PF_7/DV0_DATA23/LCD0_DATA0 PK_1/RMII1_TXD0/NAF4

P8_2/A2/DRP22 PH_2/DV0_DATA22/LCD0_DATA1

PJ_6/FCE/[LCD0_CLK]

P0_1/D1/DRP25 P0_5/D5/DRP29 P0_2/D2/DRP26

PJ_1/IRQ0 PH_5/NAF2/ET1_EXOUT PH_6/NAF3/ET1_WOL

PK_5/NAF1 PG_4/VIO_D15 PG_6/VIO_D13 P1_4/D11

P3_3/ET1_MDC/FWE P1_1/D8/CAN0RX PG_7/VIO_D12 PG_5/VIO_D14

P3_4/ET1_MDIO/FRB P1_3/D10/CAN0TX P3_0/ET1_LINKSTA P2_1/D13 PC_0/VBUSIN1

PC_1(CPU's LED-G)

P5_3 P5_5 P5_4 P5_7

P6_7 P7_0

SD1_D1 SD1_D2 SD1_D3 SD1_D0

P7_2

P7_3 P9_3 PG_2 P7_7 P7_5

P9_6

P7_6 P9_5 PB_5 PD_7 P9_2 PD_6 PB_3 PB_1

PA_6 PA_3 PA_4 PA_5

PE_1 PA_2

PA_0 PE_2 PE_3 PA_1

P9_1 P9_0

P8_7 PF_1

PE_4 P8_5 PF_2 P8_6 P8_3

P8_4 PE_0 PE_5 PH_0 P6_2 PE_6 PF_6

P6_3 P9_4 PF_4 PF_5 PG_1

P6_1 P7_4

P7_1 PF_3 P6_0 PH_1 P6_6 P8_1 PG_3

PK_2 P6_5 PF_7 PK_1

P8_2 PH_2 P0_0

PJ_6 P0_3

P0_1 P0_5 P0_2

PJ_1 P1_0 PH_5 PH_6 PK_4

PK_5 PG_4 P4_0 PG_6 P4_1 P1_4

P3_3 P4_5 P1_1 PG_7 P4_2

P3_4 P4_6

P3_0 P2_1 PC_0

PC_1 P2_2 P2_3 P2_0

NMI[2]

4

Front Back

D5VD3.3V D5V AVcc

J2 SODIMM-204

112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172

737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100

101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

141

142

143

144

145

146

147

148

149

150

151

152

153

154

155

156

157

158

159

160

161

162

163

164

165

166

167

168

169

170

171

172

173

174

175

176

177

178

179

180

181

182

183

184

185

186

187

188

189

190

191

192

193

194

195

196

197

198

199

200

201

202

203

204

3

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

PC_5 PC_3

P5_6

PC_4

P6_4

PB_4

IRQ5 IRQ4

PB_0 PB_2

PG_0

PA_7

P8_0

PF_0

PK_0

P9_7

PK_3

PJ_7

P0_4

P0_6

P3_2 P3_5

P3_1

P4_4

P4_3PG_5

P4_7P1_3

P1_2

PC_2

PC_5/VBUSEN1 PC_3/LCD0_TCON4

P5_6/AN006

P5_4/SD1_CD PC_4/LCD0_TCON3

SD1_CLK [2]

SD1_CMD [2]

P6_4/[AUDIO_CLK]/DRP00

PB_4/DV0_DATA1/LCD0_DATA22 P9_3/A11/DRP13/SSIRxD0 P7_7/LCD0_TCON0/DV0_HSYNC

PL_1/MD_CLK/IRQ5 PL_0/MD_CLKS/IRQ4

CKIO [2]

PD_7/RIIC3SDA PD_6/RIIC3SCL

PB_0/DV0_DATA5/LCD0_DATA18 PB_2/DV0_DATA3/LCD0_DATA20 PA_3/DV0_DATA10/LCD0_DATA13

PG_0/VIO_D8

PA_7/DV0_DATA6/LCD0_DATA17/(SCI_RST) PE_2/RMII0_RXD1/VIO_D6

P9_0/A8/DRP16/TxD4 P8_0/DV0_DATA14/LCD0_DATA9

PF_0/DV0_DATA15/LCD0_DATA8 P8_5/A5/DRP19/MISO0

DP1 [2] DM1 [2]

PE_0/[REF50CK0]/VIO_FLD

P6_2/RMII0_TXD0/VIO_VD

PK_0/RMII1_TXDEN/NAF3 P9_4/A12/DRP12/SSITxD0

PG_1/VIO_D9 P9_7/A15/DRP09 P7_4/CAS/DRP07/RTS1

PH_1/VIO_D0 P8_1/A1/DRP23

PK_3/[REF50CK1]/NAF6

PJ_7/NAF0/[LCD0_EXTCLK]

P0_0/D0/DRP24 P0_4/D4/DRP28 P0_3/D3/DRP27 P0_6/D6/DRP30

P3_2/RMII1_CRSDV/FRE P3_5/RMII1_RXD1/FCLE

P1_0/D7/[CAN_CLK]/DRP31

PK_4/RMII1_RXD0/NAF7 P3_1/RMII1_RXER/FALE

P4_0/TXOUT0P P4_1/TXOUT0M

P4_4/TXOUT2P P4_5/TXOUT2M

P4_2/TXOUT1P P4_3/TXOUT1M

P4_6/TXCLKOUTP P4_7/TXCLKOUTM

P1_2/D9 P2_2/D14/CAN1TX P2_0/D12/CAN1RXP2_3/D15 PC_2(SUB's SW6-10)

PA_0 PA_1 PA_2 PA_3 PA_4 PA_5 PA_6 PA_7

PB_0 PB_1 PB_2 PB_3 PB_4 PB_5

PC_0 PC_1 PC_2 PC_3 PC_4 PC_5

PD_6 PD_7

PE_0 PE_1 PE_2 PE_3 PE_4 PE_5 PE_6

PF_0 PF_1 PF_2 PF_3 PF_4 PF_5 PF_6 PF_7

PG_0 PG_1 PG_2 PG_3 PG_4 PG_5 PG_6 PG_7

PH_0 PH_1 PH_2

PH_5 PH_6

PJ_1

PJ_6 PJ_7

PK_0 PK_1 PK_2 PK_3 PK_4 PK_5

SD1_D0 SD1_D1 SD1_D2 SD1_D3

PA_[7:0] [3]

PB_[5:0] [3]

PC_[5:0] [3]

PD_[7:2] [2,3]

PE_[6:0] [3]

PF_[7:0] [3]

PG_[7:0] [3]

PH_[2:0] [3]

PH_[6:5] [3]

PJ_[7:0] [3,6]

PK_[5:0] [3]

SD1_D[3:0] [2]

2

1

A A

Renesas Electronics Corporation.

CHANGE

Renesas Electronics Corporation.

2

APPROVED

DESIGNEDCHECKED

DRAWN

SCALE

DATE

18-10-11

5

4

18-10-11

3

DRAWN

DESIGNEDCHECKED

RZ/A2M CPU board

SODIMM Connector

R20UT4394EJ0100

1

( / )46

1

2

3

4

5

+

CE2 47µF/10V

D5V

R87 1kΩ

LED2 VCDB1111C-5AY3B

STANLEY BLUE

TP2 5V

CN4 _A2-2PA-2.54DSA

HRS Toshiba

1 2

A A

VBUS

D1 CMS01

D2 CMS01

C10 22µF/10V

/* PVcc-300mA */

5V -> 3.3V

C30 _0.1µF

U8 ISL80030A

Intersil

1 2

3 4

VIN

3A

VIN

EN PG

PGND6PGND

7

D5V

R88 10kΩ

CP60 22µF/10V

B B

L2 SPM3015T-1R5M-LR

TDK

8

PHASE

5

FB

EPAD

9

C11 22µF/10V

L4 BLM21PG300SN1D

R90 100kΩ

R89 453kΩ

C15

0.1µF

D3.3V

A3.3VD3.3V

TP3 D3.3V

C12 22pF

TP4 A3.3V

D3.3V

/* AVcc-44mA */

A3.3V

PVcc PVcc

C13

4.7µF/1005

AVcc

C16

4.7µF/1005

AVcc

L3 BLM21PG300SN1D

L5 BLM21PG300SN1D

L6 BLM21PG300SN1D

/* MIPIAVcc18-6mA */

5V -> 1.8V

C31 _0.1µF

U9 ISL80020A

Intersil

1

2 4

VIN

2.0A

EN PG

SGND

NC6PGND

3

7

D5V

R91 10kΩ

CP61 22µF/10V

PHASE

EPAD

9

L7 TFM201610ALMA1R5MTAA

TDK

8

5

FB

C19 22µF/10V

R93 100kΩ

R92 200kΩ

D1.8V

TP5 D1.8V

C20 22pF

/* Vcc-1.6A */

Vcc1.8D1.8V MIPIAVccVcc1.8

C21

4.7µF/1005

L8 BLM21PG300SN1D

USBDPVcc

C14

0.1µF

LVDSAPVcc

C17

0.1µF

USBAPVcc

C18

0.1µF

C22

0.1µF

5V -> 1.2V

C32 _0.1µF

U10 ISL80020A

Intersil

1

2 4

L9 TFM201610ALMA1R5MTAA

2.0A

3

8

PHASE

5

FB

SGND

EPAD

7

9

C23 22µF/10V

VIN

EN PG

NC6PGND

D5V

C C

R94 10kΩ

CP62 22µF/10V

R96 100kΩ

R95 100kΩ

D1.2V

TP6 D1.2V

C24 22pF

D1.2V

Vcc

C25

4.7µF/1005

Vcc

L10 BLM21PG300SN1D

L11 BLM21PG300SN1D

LVDSPLLVcc

C26

0.1µF

PLLVcc

C27

0.1µF

Anti-resonant circuit

D5VSDVcc AVcc Vcc1.8 ROMVcc

RQ3

RQ2

RQ1

5.1Ω

CQ1

0.1µF

D D

Renesas Electronics Corporation.

4

APPROVED

CHANGE

DESIGNEDCHECKED

DRAWN

SCALE

DATE

18-10-11

1

2

18-10-11

3

DRAWN

DESIGNEDCHECKED

5.1Ω

CQ3

CQ2

0.1µF

RZ/A2M CPU board

Power

R20UT4394EJ0100

RQ4

5.1Ω

CQ4

0.1µF

RQ5

5.1Ω

CQ5

0.1µF

GND Connection

R97

R98

0Ω

( / )56

5

( / )56

5

D D

4

3

2

1

R118 10kΩ

PJ_[7:0][3,4]

TMS [2] TCK [2] TDO [2] TDI [2]

PJ_0 PJ_2 PJ_3 PJ_4 PJ_5

CP65

0.1µF

1

2

D3.3VD3.3V

3 5

U12 SN74LVC1G08

TI

4

PJ_0/TRACECLK PJ_2/TRACEDATA0 PJ_3/TRACEDATA1 PJ_4/TRACEDATA2 PJ_5/TRACEDATA3

TRST# [2]

D3.3V

C C

CoreSight 20

CP630.1µF

R125 0Ω

GND GND KEY GND NC NC GND GND GND

CP67

0.1µF

CN5 FTSH-110-01

Samtec

1 3 5 7

9 11 13 15 17 19

1

2

U14 SN74LVC1G08

TI

3 5

TMS/SWDIOVTref

2

TCK/SWCLK

4

TDO/SWO

6

TDI

8

nSRST

10

RTCK/TraceClk

12

SWO/TraceD0

14

nTRST/TraceD1

16

DBGRQ/TraceD2

18

DBGACK/TraceD3

20

4

R99 10kΩ

R100 10kΩ

R101 10kΩ

R103 10kΩ

R102 10kΩ

R105 10kΩ

R104 10kΩ

R116 _10kΩ

R117 _10kΩ

R114 _10kΩ

R115 _10kΩ

D3.3V

CP66

0.1µF U13 SN74LVC1G08

TI

1

4

2

3 5

RES# [2,4]

R106 _22Ω

R107 22Ω

R108 22Ω R109 22Ω R110 22Ω R111 22Ω R112 22Ω

R113 _0Ω

D3.3V

U11C

SN74LVC2G17

TI

CP64

0.1µF

2 5

U11A

SN74LVC2G17

TI

61

B B

R119 22kΩ

Reset SWITCH

C33 1000pF

21

D3.3V D3.3V

U11B

R120

SN74LVC2G17

TI

10kΩ

C28

2.2µF/1005

43

R121 220Ω

SW2 B3U-1000P

Power On Reset

R123

U15

130kΩ

TPS3808G01

R126 20kΩ

TI

5

SENSE

3

MR#

C29 4700pF

4

RESET#

CT

2

1

6

VDD

GND

D3.3VD3.3V

D3.3V

R122 0Ω

R124 22kΩ

CP68

0.1µF

A A

Renesas Electronics Corporation.

CHANGE

Renesas Electronics Corporation.

2

APPROVED

DESIGNEDCHECKED

DRAWN

SCALE

DATE

18-10-11

5

4

18-10-11

3

DRAWN

DESIGNEDCHECKED

RZ/A2M CPU board

POR, UDI

R20UT4394EJ0100

1

( / )66

RZ/A2M CPU Board RTK7921053C00000BE Appendix 2

R20UT4397EJ0100 Rev.1.00 Appendix 2-1

2018.10.11

Appendix 2 RTK7921053C00000BE Component Installation Diagram

RZ/A2M CPU Board RTK7921053C00000BE Appendix 2

R20UT4397EJ0100 Rev.1.00 Appendix 2-2

2018.10.11

11

CN1

RQ3

CQ3

1

RESET

1

CN5

RQ3

CQ3

CN1

microSD

TP1

SW2

LED2

TP2

R87

TP2

CN5

19

9

12

L3 R128

10

8

L3

TP1

C14

R83

R16

CP21

R16

PWR

LED2

R84

2

CP20

R83

CP20

20

CoreSight 20

2

CN4

2

JP3

C14

R31

R14

CP21

CP54

R14

CP54

CN4

B1

1

JP3

1

CP39

R31

A12

21

22

CN3

L1

R128 CP39

19

18

20

USB

RQ1 CQ1

17

CN3

R47

15

16

14

B12 A1

R65

13

12

CQ1

CN2

MIPI

CE1

R47

R65

U1

9

11

10

RQ1

1

CE1

RZ/A2M

735

4

826

R39R40R41

R40

R39

TP3

R32

TP3

AB

CP56

R18

CP18

A

1

U1

J1

R41

R18

CP18

CN2

CP7

LOGO-[R26]

TP6

CQ4

RQ4

CQ4

RQ4

R81

J1

15

1

TP6

TP4

15

JP2

E

R131

E

16

SW1

ON

SW1

12345678

1

TP5

3

JP1

3

U3

1

A

R61

5

R49

R48

R48R49

R131

R60

CP69

15A

U2U3

U2

R33 R34

JP1

1

R85

R86

R85

R86

8

CQ5

RQ5

LED1

CQ5

71 73 2031

J2

R67U4R68

R69

R70

R71

R72

C21

CP2

R12

R13

R12

BCA

CP2

U4

1 2

C1

CP3

C1

CP3

CP70

LOGO-[W8]

R73

C21

L7

C19

R13

C25

R53

R59 R52

CP4

R43

L4

C16

R74

C24

R95

R58

R59

CP11

R52

R129

CP6

C20

C24

L9

R42

L4

R35

R36

R37

R98

8

U9

R38

C31

R91

1

CP61

C12 R89

C12

CP61

L2

R90

R89

R90

C16

R92

R93

L7

C19

C15

U9

L2

R96

R95

8

C23

CP9

R133

R130

CP11

R129

CP4

R132

R42

R132

C32

54

U10

R94

CP62

1

CP9

L10

R133

CP10

L10

CP10

R130

R43

LOGO-[R54]

CP5

CP62

U10

L8

C26

R127

C13

L5

C17

CP27

C26

CP50

L8

CP27

R127

R50 R57 R56 R51

CP48

CP53

CP50

CP48

C35

C17

RZ/A2M CPU Board Rev.A

RTK7921053C01000BR

U8

5

U8

8

C11

C22

CP29

R63

R64

CP53

CP55

CP74

LOGO-[R60]

C30

4

CP60

R88

1

CP60

L6

X2

C5

L5

CP26

R25

CP29

CP30

CP59

C34

CP58

CP40

CP58

CP72

CP73

R45

R44

CP19

R79

R78

R75

L6

C18

R97

CP35 CP36

C4

X2

R23

CP37 CP38

CP15

CP16

CP14

CP46 CP44

CP45

CP42 CP40

CP72

LOGO-[C27]

R82

CP47

2

3

R75

R76

6

CP17

CP16

CP51

U7

12

CP13

1

U7

78

CP31

CP31 CP32 CP33

CP34

X1

CP25

CP24

CP17

CP23

CP22

CP71 CP45 CP43 CP41

CP51

CP52

D2

C33

R123

R126

D1

C29

D1

C29

R77

R54

C3

R17

CP57

CP8

X1

CP28

R27

CP49

C2

R15

R66

L11

R20

R46

X3

C9

R80

1

U5

C6

C7

R30

R29 R66 R62

L11

R27 R20

R28 R19

8

C6

R126

R123

R113

CP66

C27

R22

R24

R26

R21

CP12

U6

C33

R55

U12

CP67

U14 U13

C27

R21

16

CP68

R11

U12

U14

U13

R106

R107

R108 R109

R110 R116

9

U15

R10

U15

R118

CP65

R122

CP64

R106

R104

R111

R125

R124

R2R3R8

R9

R2

CP1

C28

U11

CP63

R100 R101 R102 R103

R99

R105

CE2

R1

R9

R120 R121

CP63

R114 R115

R117 R112

MADE IN JAPAN

7274204 2

R7

R8

R3

CQ2

C10

CE2

C10

R124

R5

R6

C8

R119

R120 R121 R119

RQ2

CQ2

R125

R4

H=1.2mmH=4.6mm

Revision History

RZ/A2M CPU Board RTK7921053C00000BE User's Manual

Rev.

Date of Issue

Revised content

Page

Point

1.00

Oct. 11, 2018

―

First version issued

RZ/A2M CPU Board RTK7921053C00000BE User’s Manual

Publication Date Oct. 11, 2018 Rev.1.00 Issue Renesas Electronics Corporation TOYOSU FORESIA, 3-2-24 Toyosu, Koto-ku, Tokyo 135-0061, Japan

SALES OFFICES

Refer to "http://www.renesas.com/" for the latest and detailed information.

Renesas Electronics America Inc.

1001 Murphy Ranch Road, Milpitas, CA 95035, U.S.A. Tel: +1-408-432-8888, Fax: +1-408-434-5351

Renesas Electronics Canada Limited

9251 Yonge Street, Suite 8309 Richmond Hill, Ontario Canada L4C 9T3 Tel: +1-905-237-2004

Renesas Electronics Europe Limited

Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K Tel: +44-1628-651-700

Renesas Electronics Europe GmbH

Arcadiastrasse 10, 40472 Düsseldorf, Germany Tel: +49-211-6503-0, Fax: +49-211-6503-1327

Renesas Electronics (China) Co., Ltd.

Room 1709 Quantum Plaza, No.27 ZhichunLu, Haidian District, Beijing, 100191 P. R. China Tel: +86-10-8235-1155, Fax: +86-10-8235-7679

Renesas Electronics (Shanghai) Co., Ltd.

Unit 301, Tower A, Central Towers, 555 Langao Road, Putuo District, Shanghai, 200333 P. R. China Tel: +86-21-2226-0888, Fax: +86-21-2226-0999

Renesas Electronics Hong Kong Limited

Unit 1601-1611, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong Tel: +852-2265-6688, Fax: +852 2886-9022

Renesas Electronics Taiwan Co., Ltd.

13F, No. 363, Fu Shing North Road, Taipei 10543, Taiwan Tel: +886-2-8175-9600, Fax: +886 2-8175-9670

Renesas Electronics Singapore Pte. Ltd.

80 Bendemeer Road, Unit #06-02 Hyflux Innovation Centre, Singapore 339949 Tel: +65-6213-0200, Fax: +65-6213-0300

Renesas Electronics Malaysia Sdn.Bhd.

Unit 1207, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: +60-3-7955-9390, Fax: +60-3-7955-9510

Renesas Electronics India Pvt. Ltd.

No.777C, 100 Feet Road, HAL 2nd Stage, Indiranagar, Bangalore 560 038, India Tel: +91-80-67208700, Fax: +91-80-67208777

Renesas Electronics Korea Co., Ltd.

17F, KAMCO Yangjae Tower, 262, Gangnam-daero, Gangnam-gu, Seoul, 06265 Korea Tel: +82-2-558-3737, Fax: +82-2-558-5338

http://www.renesas.com

Colophon 5.1

RZ/A2M CPU Board

RTK7921053C00000BE

User's Manual

R20UT4397EJ0100

Renesas RZ/A Series, RZ/A2M User Manual

Notice

General Preca ut ions in the Handling of Microprocessing Unit and Microcontroller Unit Products

WEEE Directive

How to use this manual

CONTENTS

RZ/A2M CPU Board RTK7921053C00000BE 1. Overview

1.1 Overview

1.2 Configuration

1.3 Features

1.4 Outside View

1.5 Block Diagram

1.6 Layout of Components

1.7 Memory Mapping

1.8 Absolute Maximum Ratings

1.9 Operating Conditions

2. Functional Specifications

2.1 Overview of Functions

2.2 CPU

2.2.1 Overview of RZ/A2M

2.2.2 List of RZ/A2M Pin Functions

2.3 Memory

2.3.1 RZ/A2M On-Chip RAM

2.3.2 Serial Flash Memory

2.3.3 HyperMCP

2.4 USB Interface

2.5 MIPI CSI-2 Interface

2.6 I/O Ports

2.7 Clock Configuration

2.8 Reset Control

2.9 Power Supply Configuration

2.10 Debug Interface

2.11 SD/MMC Host Interface (4 bits)

RZ/A2M CPU Board RTK7921053C00000BE 3. Operation specifications

3.1 Overview of Connectors

3.1.1 microSD Card Slot (CN1)

3.1.2 MIPI CSI-2 Connector (CN2, J1)

3.1.3 USB Connector (CN3)

3.1.4 Power Source Connector (CN4)

3.1.5 UDI Connector (CN5)

3.1.6 SUB Board Connector (J2)

3.2 Layout of Operation Components

3.2.1 Jumpers (JP1 - JP3)

3.2.2 Functions of Switches and LEDs

3.3 Dimensions

Appendix 1 RTK7921053C00000BE Connection Diagram

Appendix 2 RTK7921053C00000BE Component Installation Diagram

Revision History