Realtek RTL8111E-VL-CG Schematic [ru]

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RTL8111E-VL-CG
INTEGRATED GIGABIT ETHERNET CONTROLLER
FOR PCI EXPRESS APPLICATIONS
DATASHEET
(CONFIDENTIAL: Development Partners Only)
Rev. 1.1
Track ID: JATR-2265-11
Realtek Semiconductor Corp.
No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan Tel.: +886-3-578-0211. Fax: +886-3-577-6047 www.realtek.com
RTL8111E
COPYRIGHT
©2010 Realtek Semiconductor Corp. All rights reserved. No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by any means without the written permission of Realtek Semiconductor Corp.
DISCLAIMER
Realtek provides this document “as is”, without warranty of any kind. Realtek may make improvements and/or changes in this document or in the product described in this document at any time. This document could include technical inaccuracies or typographical errors.
TRADEMARKS
Realtek is a trademark of Realtek Semiconductor Corporation. Other names mentioned in this document are trademarks/registered trademarks of their respective owners.
LICENSE
This product is covered by one or more of the following patents: US5,307,459, US5,434,872, US5,732,094, US6,570,884, US6,115,776, and US6,327,625.
Datasheet
USING THIS DOCUMENT
This document is intended for the software engineer’s reference and provides detailed programming information.
Though every effort has been made to ensure that this document is current and accurate, more information may have become available subsequent to the production of this guide.
REVISION HISTORY
Revision Release Date Summary
1.0 2010/06/23 First release.
1.1 2010/10/07 Revised section 6.2.6 Customizable LED Configuration, page 12. Revised Table 18 Absolute Maximum Ratings, page 21. Revised Table 19 Recommended Operating Conditions, page 21.
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RTL8111E
Datasheet
Table of Contents
1. GENERAL DESCRIPTION..............................................................................................................................................1
2. FEATURES.........................................................................................................................................................................3
3. SYSTEM APPLICATIONS...............................................................................................................................................3
4. PIN ASSIGNMENTS .........................................................................................................................................................4
4.1. PACKAGE IDENTIFICATION...........................................................................................................................................4
5. PIN DESCRIPTIONS.........................................................................................................................................................5
5.1. POWER MANAGEMENT/ISOLATION ..............................................................................................................................5
5.2. PCI EXPRESS INTERFACE .............................................................................................................................................5
5.3. TRANSCEIVER INTERFACE............................................................................................................................................6
5.4. CLOCK .........................................................................................................................................................................6
5.5. REGULATOR AND REFERENCE......................................................................................................................................6
5.6. EEPROM ....................................................................................................................................................................7
5.7. LEDS ...........................................................................................................................................................................7
5.8. SMBUS ........................................................................................................................................................................7
5.9. POWER AND GROUND ..................................................................................................................................................8
5.10. GPO PIN ......................................................................................................................................................................8
6. FUNCTIONAL DESCRIPTION.......................................................................................................................................9
6.1. PCI EXPRESS BUS INTERFACE......................................................................................................................................9
6.1.1. PCI Express Transmitter ........................................................................................................................................9
6.1.2. PCI Express Receiver.............................................................................................................................................9
6.2. LED FUNCTIONS..........................................................................................................................................................9
6.2.1. Link Monitor...........................................................................................................................................................9
6.2.2. RX LED ................................................................................................................................................................10
6.2.3. TX LED.................................................................................................................................................................10
6.2.4. TX/RX LED...........................................................................................................................................................11
6.2.5. LINK/ACT LED ....................................................................................................................................................11
6.2.6. Customizable LED Configuration ........................................................................................................................12
6.3. PHY TRANSCEIVER ...................................................................................................................................................14
6.3.1. PHY Transmitter...................................................................................................................................................14
6.3.2. PHY Receiver .......................................................................................................................................................14
6.4. NEXT PAGE ................................................................................................................................................................15
6.5. EEPROM INTERFACE ................................................................................................................................................15
6.6. POWER MANAGEMENT...............................................................................................................................................16
6.7. VITAL PRODUCT DATA (VPD)...................................................................................................................................18
6.8. RECEIVE-SIDE SCALING (RSS) ..................................................................................................................................19
6.8.1. Receive-Side Scaling (RSS) Initialization.............................................................................................................19
6.8.2. Protocol Offload...................................................................................................................................................20
6.8.3. RSS Operation ......................................................................................................................................................20
6.9. ENERGY EFFICIENT ETHERNET (EEE)........................................................................................................................20
7. SWITCHING REGULATOR..........................................................................................................................................20
8. CHARACTERISTICS......................................................................................................................................................21
8.1. ABSOLUTE MAXIMUM RATINGS ................................................................................................................................21
8.2. RECOMMENDED OPERATING CONDITIONS .................................................................................................................21
8.3. CRYSTAL REQUIREMENTS..........................................................................................................................................22
8.4. OSCILLATOR REQUIREMENTS ....................................................................................................................................22
8.5. ENVIRONMENTAL CHARACTERISTICS ........................................................................................................................23
8.6. DC CHARACTERISTICS...............................................................................................................................................23
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RTL8111E
8.7. AC CHARACTERISTICS...............................................................................................................................................24
8.7.1. Serial EEPROM Interface Timing........................................................................................................................24
8.8. PCI EXPRESS BUS PARAMETERS................................................................................................................................25
8.8.1. Differential Transmitter Parameters....................................................................................................................25
8.8.2. Differential Receiver Parameters.........................................................................................................................26
8.8.3. REFCLK Parameters............................................................................................................................................26
8.8.4. Auxiliary Signal Timing Parameters ....................................................................................................................30
9. MECHANICAL DIMENSIONS......................................................................................................................................31
10. ORDERING INFORMATION...................................................................................................................................32
Datasheet
Integrated Gigabit Ethernet Controller for PCI Express iv Track ID: JATR-2265-11 Rev. 1.1
RTL8111E
Datasheet
List of Tables
TABLE 1. POWER MANAGEMENT/ISOLATION ...............................................................................................................................5
TABLE 2. PCI EXPRESS INTERFACE..............................................................................................................................................5
TABLE 3. TRANSCEIVER INTERFACE ............................................................................................................................................6
TABLE 4. CLOCK ..........................................................................................................................................................................6
TABLE 5. REGULATOR AND REFERENCE ......................................................................................................................................6
TABLE 6. EEPROM .....................................................................................................................................................................7
TABLE 7. LEDS............................................................................................................................................................................7
TABLE 8. SMBUS .........................................................................................................................................................................7
TABLE 9. POWER AND GROUND ...................................................................................................................................................8
TABLE 10. GPO PIN ......................................................................................................................................................................8
TABLE 11. LED SELECT (IO REGISTER OFFSET 18H~19H)..........................................................................................................12
TABLE 12. CUSTOMIZED LEDS ...................................................................................................................................................12
TABLE 13. FIXED LED MODE .....................................................................................................................................................12
TABLE 14. FEATURE CONTROL TABLE-1.....................................................................................................................................13
TABLE 15. FEATURE CONTROL TABLE-2.....................................................................................................................................13
TABLE 16. OPTION 1 & OPTION 2 LED TABLE ............................................................................................................................13
TABLE 17. EEPROM INTERFACE ................................................................................................................................................15
TABLE 18. ABSOLUTE MAXIMUM RATINGS ................................................................................................................................21
TABLE 19. RECOMMENDED OPERATING CONDITIONS .................................................................................................................21
TABLE 20. CRYSTAL REQUIREMENTS..........................................................................................................................................22
TABLE 21. OSCILLATOR REQUIREMENTS ....................................................................................................................................22
TABLE 22. ENVIRONMENTAL CHARACTERISTICS ........................................................................................................................23
TABLE 23. DC CHARACTERISTICS ...............................................................................................................................................23
TABLE 24. EEPROM ACCESS TIMING PARAMETERS ..................................................................................................................24
TABLE 25. DIFFERENTIAL TRANSMITTER PARAMETERS ..............................................................................................................25
TABLE 26. DIFFERENTIAL RECEIVER PARAMETERS.....................................................................................................................26
TABLE 27. REFCLK PARAMETERS .............................................................................................................................................26
TABLE 28. AUXILIARY SIGNAL TIMING PARAMETERS.................................................................................................................30
TABLE 29. ORDERING INFORMATION ..........................................................................................................................................32
List of Figures
FIGURE 1. PIN ASSIGNMENTS .......................................................................................................................................................4
FIGURE 2. RX LED ....................................................................................................................................................................10
FIGURE 3. TX LED ....................................................................................................................................................................10
FIGURE 4. TX/RX LED..............................................................................................................................................................11
FIGURE 5. LINK/ACT LED .......................................................................................................................................................11
FIGURE 6. SERIAL EEPROM INTERFACE TIMING ......................................................................................................................24
FIGURE 7. SINGLE-ENDED MEASUREMENT POINTS FOR ABSOLUTE CROSS POINT AND SWING ..................................................28
FIGURE 8. SINGLE-ENDED MEASUREMENT POINTS FOR DELTA CROSS POINT ...........................................................................28
FIGURE 9. SINGLE-ENDED MEASUREMENT POINTS FOR RISE AND FALL TIME MATCHING ........................................................28
FIGURE 10. DIFFERENTIAL MEASUREMENT POINTS FOR DUTY CYCLE AND PERIOD ...................................................................29
FIGURE 11. DIFFERENTIAL MEASUREMENT POINTS FOR RISE AND FALL TIME ...........................................................................29
FIGURE 12. DIFFERENTIAL MEASUREMENT POINTS FOR RINGBACK............................................................................................29
FIGURE 13. REFERENCE CLOCK SYSTEM MEASUREMENT POINT AND LOADING .........................................................................30
FIGURE 14. AUXILIARY SIGNAL TIMING......................................................................................................................................30
Integrated Gigabit Ethernet Controller for PCI Express v Track ID: JATR-2265-11 Rev. 1.1
RTL8111E
Datasheet
1. General Description
The Realtek RTL8111E-VL-CG Gigabit Ethernet controller combines a triple-speed IEEE 802.3 compliant Media Access Controller (MAC) with a triple-speed Ethernet transceiver, PCI Express bus controller, and embedded memory. With state-of-the-art DSP technology and mixed-mode signal technology, the RTL8111E offers high-speed transmission over CAT 5 UTP cable or CAT 3 UTP (10Mbps only) cable. Functions such as Crossover Detection and Auto-Correction, polarity correction, adaptive equalization, cross-talk cancellation, echo cancellation, timing recovery, and error correction are implemented to provide robust transmission and reception capability at high speeds.
The RTL8111E supports the PCI Express 1.1 bus interface for host communications with power management, and is compliant with the IEEE 802.3u specification for 10/100Mbps Ethernet and the IEEE
802.3ab specification for 1000Mbps Ethernet. It also supports an auxiliary power auto-detect function, and will auto-configure related bits of the PCI power management registers in PCI configuration space. The RTL8111E features embedded One-Time-Programmable (OTP) memory to replace the external EEPROM (93C46/93C56/93C66).
Advanced Configuration Power management Interface (ACPI)—power management for modern operating systems that are capable of Operating System-directed Power Management (OSPM)—is supported to achieve the most efficient power management possible. PCI MSI (Message Signaled Interrupt) and MSI-X are also supported.
In addition to the ACPI feature, remote wake-up (including AMD Magic Packet and Microsoft Wake-up frame) is supported in both ACPI and APM (Advanced Power Management) environments. To support WOL from a deep power down state (e.g., D3cold, i.e., main power is off and only auxiliary exists), the auxiliary power source must be able to provide the needed power for the RTL8111E.
The RTL8111E is fully compliant with Microsoft NDIS5, NDIS6 (IPv4, IPv6, TCP, UDP) Checksum and Segmentation Task-offload (Large send and Giant send) features, and supports IEEE 802 IP Layer 2 priority encoding and IEEE 802.1Q Virtual bridged Local Area Network (VLAN). The above features contribute to lowering CPU utilization, especially benefiting performance when in operation on a network server.
The RTL8111E supports Receive Side Scaling (RSS) to hash incoming TCP connections and load-balance received data processing across multiple CPUs. RSS improves the number of transactions per second and number of connections per second, for increased network throughput.
The RTL8111E supports Protocol offload. It offloads some of the most common protocols to NIC hardware in order to prevent spurious wake up and further reduce power consumption. The RTL8111E can offload ARP (IPv4) and NS (IPv6) protocols while in the D3 power saving state.
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RTL8111E
The RTL8111E supports IEEE 802.3az Draft 3.0, also known as Energy Efficient Ethernet (EEE). IEEE
802.3az operates with the IEEE 802.3 Media Access Control (MAC) Sublayer to support operation in Low Power Idle mode. When the Ethernet network is in low link utilization, EEE allows systems on both sides of the link to save power.
The device also features inter-connect PCI Express technology. PCI Express is a high-bandwidth, low-pin-count, serial, interconnect technology that offers significant improvements in performance over conventional PCI and also maintains software compatibility with existing PCI infrastructure.
The RTL8111E is suitable for multiple market segments and emerging applications, such as desktop, mobile, workstation, server, communications platforms, and embedded applications.
Datasheet
Integrated Gigabit Ethernet Controller for PCI Express 2 Track ID: JATR-2265-11 Rev. 1.1
2. Features
RTL8111E
Datasheet
Integrated 10/100/1000 transceiver
Auto-Negotiation with Next Page capability
Supports PCI Express 1.1
Supports pair swap/polarity/skew correction
Crossover Detection & Auto-Correction
Wake-on-LAN and remote wake-up support
Microsoft NDIS5, NDIS6 Checksum
Offload (IPv4, IPv6, TCP, UDP) and Segmentation Task-offload (Large send v1 and Large send v2) support
Supports Full Duplex flow control
(IEEE 802.3x)
Supports jumbo frame to 9K bytes
Fully compliant with IEEE 802.3,
IEEE 802.3u, IEEE 802.3ab
Supports IEEE 802.1P Layer 2 Priority
Encoding
Supports IEEE 802.1Q VLAN tagging
Embedded OTP memory can replace the
external EEPROM
Serial EEPROM
Transmit/Receive on-chip buffer support
Supports power down/link down power
saving
Built-in switching regulator
Supports PCI MSI (Message Signaled
Interrupt) and MSI-X
Supports quad core Receive-Side Scaling
(RSS)
Supports Protocol Offload (ARP & NS)
Supports Customized LEDs
Supports 1-Lane 2.5Gbps PCI Express Bus
Supports hardware ECC (Error Correction
Code) function
Supports hardware CRC (Cyclic
Redundancy Check) function
Supports IEEE 802.3az Draft 3.0 (EEE)
48-pin QFN ‘Green’ package
3. System Applications
PCI Express Gigabit Ethernet on Motherboard, Notebook, or Embedded systems
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4. Pin Assignments
RTL8111E
Datasheet
Figure 1. Pin Assignments
4.1. Package Identification
Green package is indicated by a ‘G’ in the location marked ‘T’ in Figure 1. The version is shown in the location marked ‘V’.
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5. Pin Descriptions
The signal type codes below are used in the following tables:
I: Input S/T/S: Sustained Tri-State
O: Output O/D: Open Drain
T/S: Tri-State bi-directional input/output pin P: Power
5.1. Power Management/Isolation
Table 1. Power Management/Isolation
Symbol Type Pin No Description
Power Management Event: Open drain, active low.
LANWAKEB O/D 28
ISOLATEB I 26
Used to reactivate the PCI Express slot’s main power rails and reference clocks. Refer to the reference schematic for strapping pin information. All strapping pins are power-on-latch pins.
Isolate Pin: Active low. Used to isolate the RTL8111E from the PCI Express bus. The RTL8111E will not
drive its PCI Express outputs (excluding LANWAKEB) and will not sample its PCI Express input as long as the Isolate pin is asserted.
RTL8111E
Datasheet
5.2. PCI Express Interface
Table 2. PCI Express Interface
Symbol Type Pin No Description
REFCLK_P I 19
REFCLK_N I 20
HSOP O 22
HSON O 23
HSIP I 17
HSIN I 18
PERSTB I 25
CLKREQB O/D 16
PCI Express Differential Reference Clock Source: 100MHz ± 300ppm.
PCI Express Transmit Differential Pair.
PCI Express Receive Differential Pair.
PCI Express Reset Signal: Active low. When the PERSTB is asserted at power-on state, the RTL8111E returns to a
pre-defined reset state and is ready for initialization and configuration after the de-assertion of the PERSTB.
Reference Clock Request Signal. This signal is used by the RTL8111E to request starting of the PCI Express
reference clock. Refer to the reference schematic for strapping pin information. All strapping pins are power-on-latch pins.
Integrated Gigabit Ethernet Controller for PCI Express 5 Track ID: JATR-2265-11 Rev. 1.1
5.3. Transceiver Interface
Table 3. Transceiver Interface
Symbol Type Pin No Description
MDIP0 IO 1
MDIN0 IO 2
MDIP1 IO 4
MDIN1 IO 5
MDIP2 IO 7
MDIN2 IO 8
MDIP3 IO 10
MDIN3 IO 11
In MDI mode, this is the first pair in 1000Base-T, i.e., the BI_DA+/- pair, and is the transmit pair in 10Base-T and 100Base-TX.
In MDI crossover mode, this pair acts as the BI_DB+/- pair, and is the receive pair in 10Base-T and 100Base-TX.
In MDI mode, this is the second pair in 1000Base-T, i.e., the BI_DB+/- pair, and is the receive pair in 10Base-T and 100Base-TX.
In MDI crossover mode, this pair acts as the BI_DA+/- pair, and is the transmit pair in 10Base-T and 100Base-TX.
In MDI mode, this is the third pair in 1000Base-T, i.e., the BI_DC+/- pair. In MDI crossover mode, this pair acts as the BI_DD+/- pair.
In MDI mode, this is the fourth pair in 1000Base-T, i.e., the BI_DD+/- pair. In MDI crossover mode, this pair acts as the BI_DC+/- pair.
RTL8111E
Datasheet
5.4. Clock
Table 4. Clock
Symbol Type Pin No Description
CKXTAL1 I 43 Input of 25MHz Clock Reference.
CKXTAL2 IO 44
Input of External Clock Source. Output of 25MHz Clock Reference.
5.5. Regulator and Reference
Table 5. Regulator and Reference
Symbol Type Pin No Description
REGOUT O 36 Switching Regulator 1.0V Output.
ENSWREG I 33
VDDREG P 34, 35 Digital 3.3V Power Supply for Switching Regulator.
RSET I 46 Reference. External resistor reference.
Note: See section 7, page 20 for switching regulator.
3.3V: Enable switching regulator. 0V: Disable switching regulator.
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5.6. EEPROM
Table 6. EEPROM
Symbol Type Pin No Description
EESK O 37 Serial Data Clock.
EEDI: Output to serial data input pin of EEPROM.
EEDI O/I 32
EEDO I 31 Input from Serial Data Output Pin of EEPROM.
30 EECS: EEPROM Chip Select.
EECS O
Refer to the reference schematic for strapping pin information. All strapping pins are power-on-latch pins.
Refer to the reference schematic for strapping pin information. All strapping pins are power-on-latch pins.
5.7. LEDs
Table 7. LEDs
Symbol Type Pin No Description
LED0 O
LED1 O
LED3 O 31
Note 1: During power down mode, the LED signals are logic high. Note 2: LEDS1-0’s initial value comes from the EEPROM. If there is no EEPROM, the default value of the
(LEDS1, LEDS0)=(1, 1).
40
37
See section 6.2.6 Customizable LED Configuration, page 12 for details.
RTL8111E
Datasheet
When implementing dual color LEDs and EEPROM at the same time:
Pin31 and Pin37 of the RTL8111E are shared pins. Follow the RTLRTL8111E reference design (version
1.00 or later) to select these 2 pins for a dual-color LED circuit. Otherwise, the RTLRTL8111E EEPROM may not function.
5.8. SMBus
Table 8. SMBus
Symbol Type Pin No Description
SMBus Clock.
SMBCLK O/D 14
SMBDATA O/D 15
SMBALERT O/D 38
Refer to the reference schematic for strapping pin information. All strapping pins are power-on-latch pins.
SMBus Data. Refer to the reference schematic for strapping pin information. All strapping pins are power-on-latch pins.
SMBus Alert. Refer to the reference schematic for strapping pin information. All strapping pins are power-on-latch pins.
Integrated Gigabit Ethernet Controller for PCI Express 7 Track ID: JATR-2265-11 Rev. 1.1
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