Rainbow Electronics W78C438C User Manual

W78C438C

8-BIT MICROCONTROLLER

GENERAL DESCRIPTION

The W78C438C is a high-performance single-chip CMOS 8-bit microcontroller that is a derivative of the W78C58 microcontroller family. The W78C438C is functionally compatible with the W78C32, except that it provides either a 64 KB program/1 MB data memory address or memory-mapped chip select logic, five general I/O ports, and four external interrupts.

In the W78C32, two I/O ports, Port 1 and Port 3, are available for general-purpose use (Port 3 also supports alternative functions), and Port 2 and Port 0 are used as the address bus and data bus, respectively. To enable Port 0 and Port 2 to also be used as general purpose I/O ports, the W78C438C provides two dedicated address ports (AP5 and AP6) that serve as address output for 64 KB of memory and one address/data port (DP4) that serves as ROM code input and external RAM data input/output. Unlike the W78C32, this product does not require an external latch device for multiplexing low byte addresses. The W78C438C also provides four pins (AP7.0−AP7.3) to support either 64 KB program/1 MB data memory space or memory-mapped chip select logic, one parallel I/O

port (Port 8) without bit addressing mode, and two additional external interrupts (

The W78C438C is programmed in a manner fully compatible with that used to program the W78C32, except that the external data RAM is accessed by the "MOVX @Ri" instruction. Address paging is performed by loading page addresses into the HB (high byte) register, which is not a standard register in the W78C32, before execution of the "MOVX @Ri" instruction.

INT2 , INT3 ) .

FEATURES

• 8-bit CMOS microcontroller

• Fully static design

• DC to 40 MHz operation

• ROM-less operation

• 256-byte on-chip scratchpad RAM

• Either 64 KB program/1 MB data memory address space or 4 memory-mapped chip select pins

• One 8-bit data/address port

• Two 8-bit and one 4-bit (optional) address ports

• Five 8-bit bidirectional I/O ports

− Four 8-bit bit-addressable I/O ports and one 8-bit parallel I/O port

• Eight-source, two-level interrupt capability

• Three 16-bit timer/counters

• Four external interrupts

• One full-duplex serial channel

• Built-in power management

− Idle mode

− Power-down mode

• Packages:

− 84-pin PLCC: W78C438CP-24/40

− 100-pin PQFP: W78C438CF-24/40

Publication Release Date: July 1998

- 1 - Revision A1

PIN CONFIGURATIONS

12

P1.5

13

P1.6

14

P1.7

P8.0

P8.1

P8.2

P8.3 P8.4

P8.5

P8.6

P8.7

INT3

INT2

VDD

15

16

17 18

19 20

21

22

23 24

25 26

27

28

29 30

31

32

RESET

RXD, P3.0

TXD, P3.1

INT0, P3.2

INT1, P3.3

T0, P3.4 T1, P3.5

P 1 . 4

1

333435363738394

1

4

1

.

N

.

. 3

0

C

7

0

1

2

8911

567

D P

P

D

P

4

.

5

6

4

3

P

4

.

3

4

12

N

.

1

0

C

2

8 4

3

D

W78C438CP

84-pin PLCC

4142434445464748495

0

W78C438C

P

0

V

.

D

0

D

8081828

9

P

0

.

1

2

3

4

7677787

7 5

74

P0.5

73

P0.6

72

P0.7

71

EA

70

AP5.0

69

AP5.1

68

AP5.2

67

AP5.3

66

AP5.4

65

AP5.5

64

AP5.6

63

AP5.7 62

61

60

59

58 57

56

55

525

54

3

5 1

0

DD

V

SS

V

ALE

PSEN

P2.7 P2.6

P2.5

P2.4

P2.3

P

X

P

3

T

3

.

A

.

7

L

6

,

2

,

/

R

W

D

R

A

X

V

N

T

S

P

C

A

S L 1

P

7

.

3

2

1

,

/

C

S

3

2

1

P

7

6

.

0

7

6

5 , / C S 0

A

P

6

.

4

3

2

1

P

A

P

2

P

2

.

6

.

2

.

0

1

0

- 2 -

Pin Configurations, continued

W78C438C

T 2

T

E

2

X

,

P

1

1 N C

.

3

2

1

4

D

P

1

4

.

0

6

7

4

5

D

P

4

V

.

D

0

2

3

1

D

P

0

0 . 0

N

.

C

3

1

2

NC

NC NC

P1.5

P1.6

P1.7

RESET

P8.0

P8.1

P8.2 P8.3

P8.4

P8.5 P8.6

P8.7

INT3

INT2

RXD, P3.0

VDD

TXD, P3.1 INT0, P3.2

INT1, P3.3

T0, P3.4

T1, P3.5

WR, P3.6

1 0

9

0

1

2

3 4

5 6

7 8 9

10 11

12

13

14 15

16

17 18

19 20

21 22

23 24

25 26

NC NC

NC

27

28

29 30

333

P

X

3 .

T

7 ,

A

/

L

R

2

1

D

333637833904

345

V S S

456786512

W78C438CF

100-pin PQFP

A

N

A

P

C

P

7

.

3

1

2

,

/

C

S

3

1

2

9

3

4

444444 445

123 45 6 78

A

P

6

7

.

5

6

7

0 , / C S 0

89012

7

A

P

6

6 .

6

.

0

.

3

4

2

1

888888888999999999

4

3

P 2 . 0

80

79

78

77 76

75

74

73

72 71

70

69

68

67 66

65

64

63

62 61

60 59

58

57 56

55

54

53

52

51

9

012

P

2

.

1

2

NC

NC NC

NC P0.4

P0.5

P0.6

P0.7

EA AP5.0

AP5.1

AP5.2

AP5.3

AP5.4

AP5.5

AP5.6

AP5.7

DD

V

SS

V

ALE

PSEN P2.7 P2.6

P2.5

P2.4

NC NC

NC

P2.3

Publication Release Date: July 1998

- 3 - Revision A1

W78C438C

PIN DESCRIPTION

P0.0−P0.7 I/O Port 0

These pins function the same as those in the W78C32, except that a multiplexed address/data bus is not provided during accesses to external memory.

P1.0−P1.7 I/O Port 1

Functions are the same as in the W78C32.

P2.0−P2.7 I/O Port 2

Functions are the same as in the W78C32, except that an upper address bus is not provided during accesses to external memory.

−

P3.7 I/O Port 3

P3.0

Functions are the same as in the W78C32.

DP4.0−DP4.7 Data/Address Bus

DP4 provides multiplexed low-byte address/data during access to external memory.

AP5.0−AP5.7 Address Bus

AP5 outputs the <7:0> address of the external ROM multiplexed with the <7:0> address of the external data RAM.

AP6.0−AP6.7 Address Bus

AP6 outputs the <15:8> address of the external ROM multiplexed with the <15:8> address of the external data RAM. During the execution of "MOVX @Ri," the output of AP6 comes from the HB register, which is the page register for the high byte address, and its address is 0A1H.

AP7.0−AP7.3 Address Bus/Chip Select Pins

Set bit 7 of the EPMA (Extended Program Memory Address) register to determine the functions of port 7. When this bit is "0" (default value), AP7 allows the external memory data to be accessed by outputting the <19:16> address of the external memory from bits<3:0> of the EPMA register during the execution of "MOVC A, @A+DPTR" or "MOVX dest, src." At all other times, AP7<3:0> will output 0H.

When this bit is "1," AP7<3:0> (CS3−0) are the chip select pins, which support memory-mapped peripheral device select, and only one pin is active low at any one time. These pins are decoded by AP6<7:6>. For details, see the table below.

AP6.7 AP6.6 DESCRIPTION

0 0 AP70: low; others: high

0 1 AP71: low; others: high

1 0 AP72: low; others: high

1 1 AP73: low; others: high

- 4 -

W78C438C

INT2

INT3

EA

PSEN

P8.0−P8.7 I/O Port

Functions are the same as those of Port 1 in the W78C31, except that they are mapped by the P8 register and not bit-addressable. The P8 register is not a standard register in the W78C32. Its address is at 0A6H.

,

External Interrupt, Input

Functions are similar to those of external INT0 , INT1 in the W78C32, except that the functions/status of these interrupts are determined/shown by the bits in the XICON (External Interrupt Control) register. The XICON register is bit-addressable but is not a standard register in the W78C32. Its address is at 0C0H. For details, see the Functional Description below.

External Address, Input

Functions same as W78C32.

RST, XTAL1, XTAL2,

Functions same as W78C32.

BLOCK DIAGRAM

SFR

RAM 256

Bytes

DP4

AP5

AP6

AP7

Alternate

, ALE

CPU

CORE

Data Bus

Interrupt

Timer2

Serial

Port

INT0

INT1

Timer0

Timer1

INT2

INT3

Port 8

Port 0

Port 1

Alternate

Port 2

Port 3

Alternate

Publication Release Date: July 1998

- 5 - Revision A1