• LIN Physical Layer According to LIN Specification 2.0, 2.1 and SAEJ2602-2
• Fully Compatible with 3.3V and 5V Devices
• TXD Dominant Timeout Timer
• Normal and Sleep Mode
• Wake-up Capability via LIN Bus (90µs Dominant)
• Very Low Standby Current During Sleep Mode (10µA)
• Bus Pin is Overtemperature and Short-circuit Protected Versus GND and Battery
• LIN Input Current < 2µA if VBAT Is Disconnected
• Overtemperature Protection
• High EMC Level
• Interference and Damage Protection According to ISO/CD 7637
• Fulfills the OEM Hardware Requirements for LIN in Automotive Applications Rev. 1.1
• Transceiver 2: Additional INH High Side Switch Output and High Voltage WAKE Input
Dual LIN
Transceiver
Atmel ATA6670
1.Description
The Atmel® ATA6670 is a fully integrated Dual-LIN transceiver complying with the LIN
specification 2.0, 2.1, and SAEJ2602-2. There are two completely independent and
separated LIN transceivers integrated in one package (only the GND pins GND1 and
GND2 are internally connected). Each of them interfaces with the LIN protocol handler
and the physical layer.
The two LIN transceivers are nearly identical, the only difference is an additional wake
input and an INH output at transceiver 2.
The device is designed to handle the low-speed data communication in vehicles, for
example, in convenience electronics. Improved slope control at the LIN bus ensures
secure data communication of up to 20Kbaud with an RC oscillator for protocol handling. Sleep mode guarantees minimal current consumption for each transceiver even
in the case of a floating bus line or a short-circuit on the LIN bus to GND. The Atmel
ATA6670 features advanced EMI and ESD performance.
Preliminary
9204C–AUTO–09/11
Figure 1-1.Block Diagram
Receiver
+
-
Wake up bus
timer
Slew rate control
Control unit
Filter
Short circuit
and over-
temperature
protection
TXD
Time-Out
Timer
Sleep mode
Receiver
4
RXD2
1
RXD1
TXD2
GND2WAKE2
EN2
7
Transceiver 2
Transceiver 1
V
S
V
S
+
-
Wake up bus
timer
Slew rate control
Control unit
Filter
Short circuit
and over-
temperature
protection
TXD
Time-Out
Timer
Wake-up
Timer
Sleep mode
TXD1
3
EN1
2
68
5
GND1
12
LIN2
9
LIN1
13
VS2
10
VS1
14
INH2
11
2
Atmel ATA6670 [Preliminary]
9204C–AUTO–09/11
2.Pin Configuration
Figure 2-1.Pinning DFN14
Atmel ATA6670 [Preliminary]
RXD1
EN1
TXD1
RXD2
EN2
WAKE2
TXD2
Atmel
ATA6670
VS1
LIN1
GND1
INH2
VS2
LIN2
GND2
Table 2-1.Pin Description
PinSymbolFunction
1RXD1Receives data output 1 (open drain)
2EN1Enables normal mode 1. When the input is open or low, transceiver 1 is in sleep mode.
3TXD1Transmits data input 1, active low output (strong pull-down) after a local wake-up request
4RXD2Receives data output 2 (open drain)
5EN2Enables normal mode 2. When the input is open or low, transceiver 2 is in sleep mode.
6WAKE2High voltage input for local wake-up request. If not needed, connect directly to VS2
7TXD2Transmits data input 2, active low output (strong pull-down) after a local wake-up request
8GND2Ground 2
9LIN2LIN bus line 2 input/output
10VS2Battery supply 2
11INH2VS2- related high-side switch output for controlling an external load, such as a voltage divider
12GND1Ground 1
13LIN1LIN bus line 1 input/output
14VS1Battery supply 1
9204C–AUTO–09/11
3
3.Functional Description
The functions described in the following text apply to each LIN transceiver. Therefore, if pin
LIN is stated, this applies to each of the two receivers (LIN1 and LIN2), which work completely
independently. The only internal connection is between GND1 and GND2. The functions only
available at transceiver 2 are marked accordingly.
3.1Physical Layer Compatibility
Since the LIN physical layer is independent of higher LIN layers (e.g., the LIN protocol layer),
all nodes with a LIN physical layer according to revision 2.x can be mixed with LIN physical
layer nodes, which are based on older versions (i.e., LIN 1.0, LIN 1.1, LIN 1.2, LIN 1.3) without
any restrictions.
3.2Supply Pin (VS)
Undervoltage detection is implemented to disable transmission if VS falls to a value below 5V
in order to avoid false bus messages. After switching on VS, the corresponding transceiver
switches to fail-safe mode. The supply current for each transceiver in sleep mode is typically
10µA.
3.3Ground Pin (GND)
The Atmel ATA6670 does not affect the LIN bus in case of GND disconnection. It is able to
handle a ground shift up to 11.5% of V
.
S
3.4Bus Pin (LIN)
A low-side driver with internal current limitation and thermal shutdown and an internal pull-up
resistor are implemented as specified for LIN 2.x. The voltage range is from –27V to +40V.
This pin exhibits no reverse current from the LIN bus to V
disconnection. The LIN receiver thresholds are compatible with the LIN protocol specification.
The fall time (from recessive to dominant) and the rise time (from dominant to recessive) are
slope-controlled. The output has a self-adapting short-circuit limitation; in other words, during
current limitation, the current decreases in proportion to an increase in chip temperature.
Note:The internal pull-up resistor is only active in normal and fail-safe mode.
3.5Input/ Pin (TXD)
In normal mode the TXD pin is the microcontroller interface to control the state of the LIN output. TXD must be at the low level in order to have a low LIN bus. If TXD is high, the LIN output
transistor is turned off and the bus is in recessive state. The TXD pin is compatible with both a
3.3V and 5V supply.
3.6TXD Dominant Time-out Function
The TXD input has an internal pull-down resistor. An internal timer prevents the bus line from
being driven permanently in dominant state. If TXD is forced to low longer than t
the LIN pin is switched off (recessive mode). To reset this mode, switch TXD to high (> 10µs)
before switching LIN to dominant again.
, even in case of a GND shift or V
S
> 40ms,
DOM
Batt
4
Atmel ATA6670 [Preliminary]
9204C–AUTO–09/11
Atmel ATA6670 [Preliminary]
3.7Output Pin (RXD)
This pin reports the state of the LIN bus to the microcontroller. LIN high (recessive) is reported
by a high level at RXD, LIN low (dominant) is reported by a low voltage at RXD. The output is
an open drain, therefore it is compatible with a 3.3V or 5V power supply. The AC characteristics are defined with a pull-up resistor of 5kΩ to 5V and a load capacitor of 20pF. The output
is short current protected. In unpowered mode (V
tion a Zener diode is integrated with V
=6.1V.
Z
3.8Enable Input Pin (EN)
This pin controls the operation mode of the LIN transceiver. If EN = 1, the LIN transceiver is in
normal mode, with the transmission path from TXD to LIN and from LIN to RXD both active. At
a falling edge on EN, while TXD is already set to high, the device is switched to sleep mode
and no transmission is possible. In sleep mode, the LIN bus pin is connected to V
weak pull-up current source. The device can transmit only after being woken up. During sleep
mode the device is still supplied from the battery voltage. The supply current is typically 10µA.
The pin EN provides a pull-down resistor in order to force the transceiver into sleep mode in
case the pin is disconnected.
3.9WAKE-up Input Pin (WAKE2, Only Available at Transceiver 2)
This pin is a high-voltage input used to wake up the transceiver 2 from sleep mode. It is usually connected to an external transistor or a switch to generate a local wake-up. A pull-up
current source with typically –10µA is implemented as well as a debounce timer with a typical
debounce time of 70µs.
= 0V) RXD is switched off. For ESD protec-
S
with a
S
Even if the WAKE2 pin is pulled to GND, it is possible to switch the transceiver 2 into sleep
mode.
If a local wake-up is not needed in the application, pin WAKE2 can be connected directly to pin
VS2.
3.10INH Output Pin (INH2, only available at Transceiver 2)
This pin is used to control an external load or to switch the LIN master pull-up resistor on/off at
pin LIN2. The inhibit pin provides an internal switch towards VS2 which is protected by temperature monitoring. If transceiver 2 is in normal or fail-safe mode, the inhibit high-side switch
is turned on. When the transceiver 2 is in sleep mode, the inhibit switch is turned off, thus disabling the connected external devices.
A wake-up event on LIN2 or at pin WAKE2 puts the transceiver 2 into fail-safe mode and as a
result the INH2 switches to the VS2 level. After a system power-up (VS2 rises from zero), the
pin INH2 switches automatically to the VS2 level.
9204C–AUTO–09/11
5
3.11Operation Modes
a: Power-up (VS > 3V)
b: V
S
< 5V
c: Bus wake-up event
(only Transceiver 2)
d: Wake-up from wake switch
EN = 1
and not b
c or d
bb
a
EN = 0
EN = 1
Fail-Safe Mode
Power-up
Communication: OFF
RXD: see table of Modes
Tr ansceiver 2: INH2 switch ON if VS2 > 5V
Sleep Mode
Communication: OFF
Tr ansceiver 2: INH2 switch OFF
Normal Mode
Communication: ON
Tr ansceiver 2: INH2 switch ON
Local wake-up event
Go to sleep command
1. Normal mode
This is the normal transmitting and receiving mode. All features are available.
2. Sleep mode
In this mode the transmission path is disabled and the device is in low power mode.
Supply current from V
is typically 10µA. A wake-up signal (either from the LIN bus
Batt
or the WAKE2 input) is detected and switches the corresponding transceiver to
fail-safe mode. If EN then switches to high, normal mode is activated. Input debounce
timers at pin WAKE2 (t
WAKE
), LIN (t
) and EN (t
BUS
sleep,tnom
) prevent undesirable
wake-up events due to automotive transients or EMI. The internal termination between pin LIN and pin VS is disabled. Only a weak pull-up current (typical 10µA)
between pin LIN and pin VS is present. Sleep mode can be activated independently
of the current level on pin LIN.
3. Fail-safe mode
At system power-up or after a wake-up event, the transceiver automatically switches
to fail-safe mode. When VS2 exceeds 5V, the transceiver 2 switches the INH2 pin to
the VS2 level. LIN communication is switched off. The microcontroller of the application then confirms normal mode by setting the EN pin to high.
Figure 3-1.Operating Modes
6
Atmel ATA6670 [Preliminary]
Table 3-1.Table of Modes
Operating ModeTransceiverRXDLIN
Fail-safeOff
NormalOnLIN-dependingTXD-depending
SleepOffHigh-ohmicRecessive
High, except after
wake-up
Recessive
9204C–AUTO–09/11
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