Rainbow Electronics ATA6664 User Manual

Features

Operating Range from 5V to 27V
Baud Rate up to 20Kbaud
Improved Slew Rate Control According to LIN Specification 2.0, 2.1 and SAEJ2602-2
Fully Compatible with 3.3V and 5V Devices
Atmel ATA6663: TXD Time-out Timer, Atmel ATA6664: No TXD Time-out Timer
Normal and Sleep Mode
Wake-up Capability via LIN Bus (90µs Dominant)
INH Output to Control an External Voltage Regulator or to Switch the Master Pull-up
Very Low Standby Current During Sleep Mode (10µA)
Wake-up Source Recognition
Bus Pin Short-circuit Protected versus GND and Battery
LIN Input Current < 2µA if V
Overtemperature Protection
High EMC Level
Interference and Damage Protection According to ISO/CD 7637
Fulfills the OEM “Hardware Requirements for LIN in Automotive Applications Rev.1.1”
Packages: SO8, DFN8
Is Disconnected
BAT

1. Description

The Atmel ATA6663 is a fully integrated LIN transceiver complying with the LIN specification 2.0, 2.1 and SAEJ2602-2. The Atmel ATA6664 is an identical version, the only difference is that the TXD-dominant Time-out function is disabled so the device is able to send a static low signal to the LIN bus. It interfaces the LIN protocol handler and the physical layer. The device is designed to handle the low-speed data communication in vehicles, for example, in convenience electronics. Improved slope control at the LIN bus ensures secure data communication at up to 20Kbaud with an RC oscillator for protocol handling. Sleep Mode guarantees minimal current consump­tion even in the case of a floating bus line or a short circuit on the LIN bus to GND. The ATA6663/ATA6664 feature advanced EMI and ESD performance.
LIN Transceiver
Atmel ATA6663 Atmel ATA6664
9146E–AUTO–03/11
Figure 1-1. Block Diagram
1
RXD
Receiver
Filter
7
VS
6
LIN
TXD
4
VS
WAKE
3

2. Pin Configuration

Figure 2-1. Pinning SO8, DFN8
WAKE
RXD
EN
TXD
TXD
time-out
timer
(only ATA6663)
Wake-up
timer
1 2
SO8
3
4
8
7 6 5
Wake-up bus timer
Slew rate control
Control unit
Sleep mode
2 8
EN
INH VS LIN GND
RXD
EN
WAKE
TXD
Short-circuit and over­temperature protection
VS
INH
DFN8
3 x 3
INH VS LIN GND
5
GND
Table 2-1. Pin Description
Pin Symbol Function
1 RXD Receive data output (open drain) 2 EN Enables normal mode; when the input is open or low, the device is in sleep mode 3 WAKE High voltage input for local wake-up request. If not needed, connect directly to VS 4 TXD Transmit data input; active low output (strong pull-down) after a local wake-up request 5 GND Ground, heat sink 6 LIN LIN bus line input/output 7 VS Battery supply
8INH
2
Atmel ATA6663/ATA6664
Battery-related inhibit output for controlling an external voltage regulator or to switch-off the LIN master pull-up resistor; active high after a wake-up request
9146E–AUTO–03/11

3. Functional Description

3.1 Physical Layer Compatibility

Since the LIN physical layer is independent from higher LIN layers (e.g., the LIN protocol layer), all nodes with a LIN physical layer according to LIN2.x can be used along with LIN physical layer nodes, which are according to older versions (i.e., LIN1.0, LIN1.1, LIN1.2, LIN1.3), without any restrictions.

3.2 Supply Pin (VS)

Undervoltage detection is implemented to disable transmission if VS falls to a value below 5V in order to avoid false bus messages. After switching on V and INHIBIT is switched on. The supply current in sleep mode is typically 10µA.

3.3 Ground Pin (GND)

The Atmel ATA6663/ATA6664 does not affect the LIN Bus in the case of a GND disconnec­tion. It is able to handle a ground shift up to 11.5% of V

3.4 Bus Pin (LIN)

A low-side driver with internal current limitation and thermal shutdown, and an internal pull-up resistor are implemented as specified by LIN2.x. The voltage range is from –27V to +40V. This pin exhibits no reverse current from the LIN bus to V disconnection. The LIN receiver thresholds are compatible to the LIN protocol specifica­tion.The fall time (from recessive to dominant) and the rise time (from dominant to recessive) are slope controlled. The output has a self-adapting short-circuit limitation: During current limi­tation, as the chip temperature increases, the current is reduced.
Atmel ATA6663/ATA6664
, the IC switches to fail-safe mode
S
.
S
, even in the case of a GND shift or V
S
Batt
Note: The internal pull-up resistor is only active in normal and fail-safe mode.

3.5 Input/Output Pin (TXD)

In Normal Mode the TXD pin is the microcontroller interface to control the state of the LIN out­put. TXD must be at Low- level in order to have a low LIN Bus. If TXD is high, the LIN output transistor is turned off and the Bus is in recessive state. The TXD pin is compatible to both a
3.3V or 5V supply. During fail-safe Mode, this pin is used as output and is signalling the wake­up source (see Section 3.14 “Wake-up Source Recognition” on page 8). It is current limited to <8mA.

3.6 TXD Dominant Time-out Function (only Atmel ATA6663)

The TXD input has an internal pull-down resistor. An internal timer prevents the bus line from being driven permanently in dominant state. If TXD is forced to low longer than t the pin LIN will be switched off (recessive mode). To reset this mode, TXD needs to be switched to high (> 10µs) before switching LIN to dominant again.
Note: The ATA6664 does not provide this functionality.
DOM
> 40ms,
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3

3.7 Output Pin (RXD)

This pin forwards information on the state of the LIN bus to the microcontroller. LIN high (recessive) is indicated by a high level at RXD, LIN low (dominant) is reported by a low voltage at RXD. The output is an open drain, therefore, it is compatible to a 3.3V or 5V power supply. The AC characteristics are defined by a pull-up resistor of 5kΩ to 5V and a load capacitor of 20pF. The output is short-current protected. In unpowered mode (V off. For ESD protection a Zener diode with V

3.8 Enable Input Pin (EN)

This pin controls the operation mode of the device. If EN = 1, the device is in normal mode, with the transmission path from TXD to LIN and from LIN to RXD both active. At a falling edge on EN, while TXD is already set to high, the device switches to sleep mode and transmission is not possible. In sleep mode, the LIN bus pin is connected to V source. The device can transmit only after being woken up (see Section 3.9, “Inhibit Output
Pin (INH)” ).
During sleep mode the device is still supplied from the battery voltage. The supply current is typically 10µA. The pin EN provides a pull-down resistor in order to force the transceiver into sleep mode in case the pin is disconnected.

3.9 Inhibit Output Pin (INH)

This pin is used to control an external voltage regulator or to switch on/off the LIN Master pull-up resistor in case the device is used in a Master node. The inhibit pin provides an internal switch towards pin V or fail-safe mode, the inhibit high-side switch is turned on. When the device is in sleep mode, the inhibit switch is turned off, thus disabling the voltage regulator or other connected external devices.
= 0V), RXD is switched
S
= 6.1V is integrated.
Z
with a weak pull-up current
S
which is protected by temperature monitoring. If the device is in normal
S
A wake-up event on the LIN bus or at pin WAKE will switch the INH pin to the V system power-up (V

3.10 Wake-up Input Pin (WAKE)

This pin is a high-voltage input used to wake-up the device from sleep mode. It is usually connected to an external switch in the application to generate a local wake-up. A pull-up cur­rent source with typically –10µA is implemented. The voltage threshold for a wake-up signal is 3V below the VS voltage with an output current of typically –3µA.
If a local wake-up is not needed in the application, pin WAKE can directly be connected to pin VS.

3.11 Operation Modes

1. Normal Mode This is the normal transmitting and receiving mode. All features are available.
2. Sleep Mode In this mode the transmission path is disabled and the device is in low-power mode. Supply current from V pin WAKE will be detected and will switch the device to fail-safe mode. If EN then switches to high, normal mode is activated. Input debounce timers at pin WAKE (t
), LIN (t
WAKE
motive transients or EMI. In sleep mode the INH pin remains floating.
level. After a
S
rises from zero), the pin INH switches automatically to the VS level.
S
is typically 10µA. A wake-up signal from the LIN bus or via
Batt
) and EN (t
BUS
sleep,tnom
) prevent unwanted wake-up events due to auto-
4
Atmel ATA6663/ATA6664
9146E–AUTO–03/11
3. Fail-safe Mode
Figure 3-1. Modes of Operation
Atmel ATA6663/ATA6664
The internal termination between pin LIN and pin VS is disabled. Only a weak pull-up current (typical 10 µA) between pin LIN and pin V activated independently from the actual level on pin LIN or WAKE.
At system power-up or after a wake-up event, the device automatically switches to fail-safe mode. It switches the INH pin to a high state, to the V exceeds 5V. LIN communication is switched off. The microcontroller of the application will then confirm normal mode by setting the EN pin to high.
is present. Sleep mode can be
S
level when VS
S
b
EN = 1
& NOT b
Normal Mode
INH: high (INH HS switch ON)
Communication: ON
Table 3-1. Table of Operation Modes
Mode of Operation Transceiver INH RXD LIN
Power-up
a
Fail-safe Mode
Communication: OFF
RXD: see table of Modes
INH: high (INH HS switch ON) if VS > 5V
EN = 0
EN = 1
Go to sleep command
Local wake-up event
Fail-safe Off
On, except
VS < 5V
a: Power-up (VS > 3V)
< 5V
b: V
S
c: Bus wake-up event d: Wake-up from wake switch
b
c or d
INH: high impedance (INH HS switch OFF)
Sleep Mode
Communication: OFF
High, except after
wake-up
Recessive
Normal On On LIN depending TXD depending
Sleep Off Off High ohmic Recessive
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Wake-up events from sleep mode:
•LIN bus
•EN pin
• WAKE pin
• VS undervoltage
Figure 3-1 on page 5, Figure 3-2 on page 6 and Figure 3-5 on page 8 show the details of
wake-up operations.
5

3.12 Remote Wake-up via Dominant Bus State

A voltage lower than the LIN pre-wake detection V receiver and starts the wake-up detection timer.
at pin LIN activates the internal LIN
LINL
A falling edge at pin LIN, followed by a dominant bus level V time period (> t
) and a rising edge at pin LIN results in a remote wake-up request. The
BUS
device switches to fail-safe mode. Pin INH is activated (switches to V
maintained for a certain
BUSdom
) and the internal termi-
S
nation resistor is switched on. The remote wake-up request is indicated by a low level at pin RXD to interrupt the microcontroller (see Figure 3-2).
Figure 3-2. LIN Wake-up Waveform Diagram
Bus wake-up filtering time
LIN bus
INH
RXD
External
voltage
regulator
EN
(t
)
BUS
Low or floating
High or floating
Off state
Node in sleep state
High
Low
Regulator wake-up time delay
Normal
Mode
EN High
Microcontroller start-up
delay time
In sleep mode the device has a very low current consumption, even during short-circuits or floating conditions on the bus. A floating bus can arise if the Master pull-up resistor is missing, e.g., in case it is switched off when the LIN Master is in sleep mode or if the power supply of the Master node is switched off.
To minimize the current consumption I pre-wake threshold, the receiver is activated only for a specific time t the voltage at the bus is lower than pre-wake detection low (V
during voltage levels at the LIN-pin below the LIN
VS
. If t
mon
) and higher than the LIN
LINL
elapses while
mon
dominant level, the receiver is switched off again and the circuit reverts to sleep mode. The current consumption is then the result of I
VSsleep
plus I
. If a dominant state is reached on
LINwake
the bus no wake-up will occur. Even if the voltage exceeds the pre-wake detection high (V
), the IC will remain in sleep mode (see Figure 3-3 on page 7).
LINH
This means the LIN bus must be above the Pre-wake detection threshold V
for a few
LINH
microseconds before a new LIN wake-up is possible.
6
Atmel ATA6663/ATA6664
9146E–AUTO–03/11
Atmel ATA6663/ATA6664
I
VSsleep
I
VSsleep
I
VSfail
+ I
LINwake
I
VSsleep
V
BUSdom
V
LINL
I
VS
t
mon
LIN Pre-wake
LIN dominant state
LIN BUS
Mode of
operation
Int. Pull-up
Resistor
RLIN
Wake-up Detection Phase
off (disabled)
Sleep Mode Sleep Mode
Sleep Mode
I
VSsleep
I
VSfail
+ I
LINwake
I
VSsleep
V
BUSdom
V
LINL
LIN Pre-wake
LIN dominant state
LIN BUS
I
VS
Mode of
operation
Int. Pull-up
Resistor
RLIN
off (disabled) on (enabled)
Wake-up Detection PhaseSleep Mode Fail-Safe Mode
t
mon
t
mon
Figure 3-3. Floating LIN Bus During Sleep Mode
®
If the Atmel nant state (V
ATA6663/ATA6664 is in sleep mode and the voltage level at the LIN is in domi-
LIN
< V
) for a time period exceeding t
BUSdom
(during a short circuit at LIN, for
mon
example), the IC switches back to sleep mode. The VS current consumption then consists of I
VSsleep
plus I
LINWAKE
. After a positive edge at pin LIN the IC switches directly to fail-safe mode
(see Figure 3-4).
Figure 3-4. Short Circuit to GND on the LIN Bus During Sleep Mode
9146E–AUTO–03/11
7

3.13 Local Wake-up via Pin WAKE

Microcontroller start-up
delay time
Wake filtering time
t
WAKE
Off state
Node in sleep state
High or floating
TXD weak pull-down resistor
Low or floating
State change
TXD strong pull-down
Node in
operation
Weak
pull-down
EN High
HighLow
On state
High
Regulator wake-up time delay
Wake pin
INH
EN
TXD
RXD
Voltage
regulator
A falling edge at pin WAKE, followed by a low level maintained for a certain time period (> t that no transient creates a wake-up. The device then switches to fail-safe mode. Pin INH is activated (switches to V wake-up request is indicated both by a low level at pin RXD to interrupt the microcontroller and by a strong pull-down at pin TXD (see Figure 3-5). The voltage threshold for a wake-up signal is 3V below the VS voltage with an output current of typically –3µA. Even in case of a continu­ous low at pin WAKE it is possible to switch the IC into sleep mode via a low level at pin EN. The IC will remain in sleep mode for an unlimited time. To generate a new wake-up at pin WAKE, a high signal > 6µs is required. A negative edge then starts the wake-up filtering time again.
Figure 3-5. Wake-up from Wake-up Switch
), results in a local wake-up request. According to ISO7637, the wake-up time ensures
WAKE
) and the internal termination resistor is switched on. The local
S

3.14 Wake-up Source Recognition

The device can distinguish between a local wake-up request (pin WAKE) and a remote wake-up request (LIN bus). The wake-up source can be read at pin TXD in fail-safe mode. If an external pull-up resistor (typically 5kΩ) has been added on pin TXD to the power supply of the microcontroller, a high level indicates a remote wake-up request (weak pull-down at pin TXD), a low level indicates a local wake-up request (strong pull-down at pin TXD).
The wake-up request flag (indicated at pin RXD) as well as the wake-up source flag (indicated at pin TXD) are reset immediately if the microcontroller sets pin EN to high (see Figure 3-2 on
page 6 and Figure 3-5 on page 8).
8
Atmel ATA6663/ATA6664
9146E–AUTO–03/11

3.15 Fail-safe Features

Atmel ATA6663/ATA6664
• During a short-circuit at LIN to V
to the power dissipation, the chip temperature exceeds T off. The chip cools down, and after a hysteresis of T
• During a short-circuit from LIN to GND the IC can be switched to sleep mode, and even in
this case the current consumption is lower than 45µA. When the short-circuit has elapsed, the IC starts with a remote wake-up.
•If the Atmel
®
ATA6663/ATA6664 is in sleep mode and a floating condition occurs on the bus, the IC switches back to sleep mode automatically. The current consumption is lower than 45µA in this case.
• The reverse current is < 2µA at pin LIN during loss of V systems where some slave nodes are supplied from battery or ignition.
• Pin EN provides a pull-down resistor to force the transceiver into sleep mode if EN is disconnected
• Pin RXD is set floating if V
BAT
• Pin TXD provides a pull-down resistor to provide a static low if TXD is disconnected
• After switching the IC into Normal Mode the TXD pin must be pulled to high longer than 10µs in order to activate the LIN driver. This feature prevents the bus from being driven into dominant state when the IC is switched into Normal Mode and TXD is low.
• The INH output transistor is protected by temperature monitoring
, the output limits the output current to IBUS_LIM. Due
BAT
, and the LIN output is switched
off
, it switches the output on again.
hys
. This is the best behavior for bus
BAT
is disconnected
9146E–AUTO–03/11
9

4. Absolute Maximum Ratings

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameters Symbol Min. Typ. Max. Unit
V
S
- Continuous supply voltage
Wake DC and transient voltage (with 2.7kΩ serial resistor)
- Transient voltage according to ISO7637 (coupling 1nF) Logic pins (RXD, TXD, EN) –0.3 +5.5 V LIN
- DC voltage
- Transient voltage according to ISO7637 (coupling 1nF) INH
- DC voltage –0.3 V ESD according to IBEE LIN EMC
Test specification 1.0 according to IEC 61000-4-2
- Pin VS, LIN to GND
- Pin WAKE (2.7kΩ serial resistor) ESD HBM according to STM5.1
with 1.5kΩ / 100pF
- Pin VS, LIN, WAKE, INH to GND HBM ESD
ANSI/ESD-STM5.1 JESD22-A114 AEC-Q100 (002)
CDM ESD STM 5.3.1 ±750 V Machine Model ESD AEC-Q100-Rev.F (003) ±200 V Junction temperature T Storage temperature T
j
stg
–0.3 +40 V
–3
–150
–27
–150
+40
+100
+40
+100
+ 0.3 V
S
±8 ±6
±6 KV
±3 KV
–40 +150 °C –55 +150 °C
V V
V V
KV KV

5. Thermal Characteristics

Parameters Symbol Min. Typ. Max. Unit
Thermal resistance junction ambient R Special heat sink at GND (pin 5) on PCB (fused lead
frame to pin 5) Thermal shutdown T Thermal shutdown hysteresis T
10
Atmel ATA6663/ATA6664
thJA
R
thJA
off
hys
150 165 180 °C
5 102C
80 K/W
145 K/W
9146E–AUTO–03/11
Atmel ATA6663/ATA6664

6. Electrical Characteristics

5V < VS < 27V, Tj = –40°C to +150°C
No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
1V
1.1 DC voltage range nominal 7 V
1.2 Supply current in sleep mode
1.3
1.4
1.5 Supply current in fail-safe mode
1.6 V
1.7 V
1.8
2 RXD Output Pin (Open Drain)
2.1 Low-level output sink current
2.2 RXD saturation voltage 5-kΩ pull-up resistor to 5V 1 Vsat
2.3 High-level leakage current
2.4 ESD Zener diode I
3 TXD Input Pin
3.1 Low-level voltage input 4 V
3.2 High-level voltage input 4 V
3.3 Pull-down resistor V
3.4 Low-level leakage current V
3.5 Low-level output sink current
4EN Input Pin
4.1 Low-level voltage input 2 V
4.2 High-level voltage input 2 V
4.3 Pull-down resistor V
4.4 Low-level input current V
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Pin
S
Sleep mode
> VS – 0.5V
V
LIN
7I
VS < 14V Sleep mode,
bus shorted to GND
= 0V
V
LIN
7I
VS < 14V
Supply current in normal mode
Bus recessive V
< 14V
S
Bus dominant V
< 14V
S
7I
7I
Total bus load > 500Ω Bus recessive
< 14V
V
S
undervoltage threshold on 7 V
S
undervoltage threshold off 7 V
S
undervoltage threshold
V
S
hysteresis
Normal mode V
LIN
= 0V, V
RXD
= 0.4V
Normal mode
= V
, V
V
LIN
BAT
= 100µA 1 VZ
RXD
= 5V 4 R
TXD
= 0V 4 I
TXD
RXD
= 5V
7I
7V
1I
1I
Fail-safe mode, local wake-up
= 0.4V
V
TXD
V
= V
LIN
BAT
= 5V 2 R
EN
= 0V 2 I
EN
4I
S
VSsleep
VSsleep_sc
VSrec
VSdom
VSfail
Sth
Sth
Sth_hys
RXDL
RXD
RXDH
RXD
TXDL
TXDH
TXD
TXD_leak
TXD
ENL
ENH
EN
EN
5 13.5 27 V A
10 20 µA A
23 45 µA A
0.9 1.3 mA A
1.2 2 mA A
0.5 1.1 mA A
44.95VA
4.05 5 V A
50 500 mV A
1.3 2.5 8 mA A
0.4 V A
–3 +3 µA A
5.8 8.6 V A
–0.3 +0.8 V A
27VA
125 250 600 kΩ A
–3 +3 µA A
1.3 2.5 8 mA A
–0.3 +0.8 V A
27VA
125 250 600 kΩ A
–3 +3 µA A
9146E–AUTO–03/11
11
6. Electrical Characteristics (Continued)
5V < VS < 27V, Tj = –40°C to +150°C
No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
5 INH Output Pin
5.1 High-level voltage
Switch-on resistance between
5.2 VS and INH
5.3 Leakage current
Normal or fail-safe mode I
= –15mA
INH
8V
Normal or fail-safe mode 8 R
Sleep mode
= 0V/27V, VS = 27V
V
INH
8I
INHH
INH
INHL
6 WAKE Pin
6.1 High-level input voltage 3 V
6.2 Low-level input voltage I
6.3 Wake pull-up current V
6.4 High-level leakage current V
= typically –3µA 3 V
WAKE
< 27V 3 I
S
= 27V, V
S
= 27V 3 I
WAKE
WAKEH
WAKEL
WAKE
WAKE
7 LIN Bus Driver
7.1 Driver recessive output voltage R
Driver dominant voltage
7.2 V
BUSdom_DRV_LoSUP
Driver dominant voltage
7.3 V
BUSdom_DRV_HiSUP
Driver dominant voltage
7.4 V
BUSdom_DRV_LoSUP
Driver dominant voltage
7.5 V
BUSdom_DRV_HiSUP
7.6 Pull-up resistor to V
S
7.7 Voltage drop at the serial diodes
LIN current limitation
7.8 V
= V
BUS
BAT_max
Input leakage current at the
7.9
receiver, including pull-up resistor as specified
= 500Ω /1kΩ 6V
LOAD
V
VS
V
VS
V
VS
V
VS
= 7V, R
= 18V, R
= 7V, R
= 18V, R
= 500Ω 6V
load
= 500Ω 6V
load
= 1000Ω 6V
load
= 1000Ω 6V
load
_LoSUP_1k
_HiSUP_1k_
The serial diode is mandatory 6 R In pull-up path with R
I
= 10mA
SerDiode
slave
6V
6I
SerDiode
BUS_LIM
Input leakage current Driver off
= 0V, VS = 12V
V
BUS
6I
BUS_PAS_dom
BUSrec
_LoSUP
_HiSUP
LIN
Driver off
V
BAT BUS
< 18V
< 18V
BAT
6I
BUS_PAS_rec
7.10 Leakage current LIN recessive
8V < V 8V < V V
BUS
Leakage current at ground loss; control unit disconnected from
7.11
ground; loss of local ground must not affect communication in the
GND V
=12V
BAT
0V < V
Device
BUS
= V
< 18V
S
6I
BUS_NO_Gnd
residual network
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
VS –
0.75
V
S
VA
30 50 Ω A
–3 +3 µA A
VS –
1V
–1V
VS +
0.3V –
V
S
3.3V
VA
VA
–30 –10 µA A
–5 +5 µA A
0.9 ×
V
S
V
S
VA
1.2 V A
2VA
0.6 V A
0.8 V A
20 30 47 kΩ A
0.4 1.0 V D
40 120 200 mA A
–1 mA A
10 20 µA A
–10 +0.5 +10 µA A
12
Atmel ATA6663/ATA6664
9146E–AUTO–03/11
Atmel ATA6663/ATA6664
6. Electrical Characteristics (Continued)
5V < VS < 27V, Tj = –40°C to +150°C
No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
Leakage current at loss of battery; node has to substain the
7.12
current that can flow under this condition; bus must remain operational under this condition
7.13 Capacitance on pin LIN to GND 6 C
8 LIN Bus Receiver
8.1 Center of receiver threshold
8.2 Receiver dominant state V
8.3 Receiver recessive state V
8.4 Receiver input hysteresis V
Pre-wake detection LIN
8.5 High-level input voltage
Pre-wake detection LIN
8.6 Low-level input voltage
8.7 LIN Pre-wake pull-up current
9 Internal Timers
Dominant time for wake-up via
9.1 LIN bus
Time of low pulse for wake-up
9.2 via pin WAKE
Time delay for mode change
9.3
from fail-safe mode to normal mode via pin EN
Time delay for mode change
9.4
from normal mode into sleep mode via pin EN
Atmel ATA6663:
9.5 TXD dominant time out time
Power-up delay between V
9.6 until INH switches to high
Monitoring time for wake-up via
9.7 LIN bus
S
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
V
disconnected
BAT
V
SUP_Device
0V < V
V
BUS_CNT
(V
th_dom
EN
EN
HYS
= GND
< 18V
BUS
=
+ V
th_rec
)/2
= 5V 6 V
= 5V 6 V
= V
th_rec
– V
th_dom
Switches the LIN receiver on 6 V
< 27V
V
S
V
= 0V
LIN
V
= 0V 6 t
LIN
V
= 0V 3 t
WAKE
VEN = 5V 2 t
= 0V 2 t
V
EN
V
= 0V 4 t
TXD
=5V
V
= 5V 7, 8 t
VS
6I
BUS_NO_Bat
LIN
6V
6V
6V
6I
6t
BUS_CNT
BUSdom
BUSrec
BUShys
LINH
LINL
LINWAKE
BUS
WAKE
norm
sleep
dom
VS
mon
0.1 2 µA A
20 pF D
0.475 ×
–27
0.6 ×
0.028 ×
VS –
2V
–27V
0.5 ×
V
S
V
S
0.1 ×
V
S
0.525
V
× V
S
0.4 ×
V
S
S
VA
VA
40 V A
0.175
V
× V
S
VS +
0.3V V
S
3.3V
S
VA
VA
VA
–30 –10 µA A
30 90 150 µs A
7355sA
2 7 15 µs A
7152sA
40 60 85 ms A
200 µs A
61015msA
9146E–AUTO–03/11
13
6. Electrical Characteristics (Continued)
5V < VS < 27V, Tj = –40°C to +150°C
No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
LIN Bus Driver AC Parameter with Different Bus Loads
Load 1 (small): 1nF, 1kΩ ; Load 2 (large): 10nF, 500Ω ; R
10
Load 3 (medium): 6.8nF, 660Ω characterized on samples; 10.1 and 10.2 specifies the timing parameters for proper operation at 20Kbit/s, 10.3 and 10.4 at 10.4Kbit/s.
TH TH
10.1 Duty cycle 1
VS = 7.0V to 18V t
Bit
D1 = t TH
TH
10.2 Duty cycle 2
VS = 7.0V to 18V t
Bit
D2 = t TH
TH
10.3 Duty cycle 3
VS = 7.0V to 18V t
Bit
D3 = t TH
TH
10.4 Duty cycle 4
VS = 7.0V to 18V t
Bit
D4 = t
Receiver Electrical AC Parameters of the LIN Physical Layer
11
LIN receiver, RXD load conditions: C Propagation delay of receiver
11.1 (see Figure 6-1 on page 15)
Symmetry of receiver
11.2
propagation delay rising edge minus falling edge
t
rec_pd
VS = 7.0V to 18V
t
rx_sym
VS = 7.0V to 18V
Rec(max) Dom(max)
= 50µs
bus_rec(min)
Rec(min) Dom(min)
= 50µs
bus_rec(max)
Rec(max) Dom(max)
= 96µs
bus_rec(min)
Rec(min) Dom(min)
= 96µs
bus_rec(max)
= 20pF, R
RXD
= max(t
= t
= 0.744 × V
= 0.581 × V
/(2 × t
= 0.422 × V
= 0.284 × V
/(2 × t
= 0.778 × V
= 0.616 × V
/(2 × t
= 0.389 × V
= 0.251 × V
/(2 × t
pull-up
rx_pdr
– t
rx_pdr
rx_pdf
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
= 5kΩ
, t
rx_pdf
= 5kΩ; C
RXD
S
S
)
Bit
S
S
)
Bit
S
S
)
Bit
S
S
)
Bit
)
= 20pF;
RXD
6D10.396 A
6 D2 0.581 A
6D30.417 A
6 D4 0.590 A
1t
1t
rx_pd
rx_sym
–2 +2 µs A
sA
14
Atmel ATA6663/ATA6664
9146E–AUTO–03/11
Figure 6-1. Definition of Bus Timing Parameter
VS (Transceiver supply of transmitting node)
TXD (Input to transmitting node)
RXD (Output of receiving node 1)
LIN Bus Signal
t
Bit
t
Bus_dom(max)
t
Bus_dom(min)
t
Bus_rec(min)
t
Bus_rec(max)
RXD (Output of receiving node 2)
THRec(max)
THDom(max)
THDom(min)
THRec(min)
Thresholds of
receiving node 1
Thresholds of
receiving node 2
t
rx_pdf(1)
t
rx_pdr(1)
t
rx_pdr(2)
t
rx_pdf(2)
t
Bit
t
Bit
Atmel ATA6663/ATA6664
9146E–AUTO–03/11
15
Figure 6-2. Application Circuit
V
S
V
S
INH
8
EN
2
RXD
12V
5V
V
BAT
5 kΩ
1k
100 nF
Atmel ATA6663/ATA6664
2.7 kΩ
10 kΩ
1
Short-circuit and overtemperature
protection
Control unit
Slew rate control
Wake-up bus timer
Filter
Master node
pull-up
Wake-up
timer
TXD
Time-out
timer
Sleep mode
Receiver
WAKE
3
TXD
Microcontroller
IO
VDD
External
switch
4
5
GND
6
7
VS
LIN
LIN sub bus
220 pF
22 µF
GND
(only ATA6663)
16
Atmel ATA6663/ATA6664
9146E–AUTO–03/11
Atmel ATA6663/ATA6664
Package: SO 8
Dimensions in mm
specifications
according to DIN
technical drawings
Issue: 1; 15.08.06
Drawing-No.: 6.541-5031.01-4
14
85
0.2
5±0.2
3.8±0.1
6±0.2
3.7±0.1
4.9±0.1
3.81
0.4
1.27
0.1
+0.15
1.4

7. Ordering Information

Extended Type Number Package Remarks
ATA6663-FAQW DFN8 LIN transceiver, Pb-free, 8k, taped and reeled ATA6663-TAQY SO8 LIN transceiver, Pb-free, 4k, taped and reeled ATA6664-TAQY SO8 LIN transceiver, Pb-free, 4k, taped and reeled

8. Package Information

Figure 8-1. SO8
9146E–AUTO–03/11
17
Figure 8-2. DFN8
TITLE
DRAWING NO.
REV.
Package Drawing Contact: packagedrawings@atmel.com
6.543-5165.02-4
COMMON DIMENSIONS
(Unit of Measure = mm)
MIN NOM NOTEMAXSymbol
1
Exposed pad 2.4x1.6
Package: VQFN_3x3_8L
03/03/10
Dimensions in mm
specifications
according to DIN
technical drawings
0.02 0.050.0A1
33.12.9E
0.28 0.350.25b
0.65 BSCe
0.4 0.450.35L
1.6 1.651.55E2
2.4 2.452.35D2
33.12.9D
0.2 0.250.15A3
0.9 10.8A
D
1
8
PIN 1 ID
Partially Plated Surface
E
A
A3
A1
b
L
Z 10:1
Top View
Side View
Bottom View
e
D2
14
8 5
E2
Z
18
Atmel ATA6663/ATA6664
9146E–AUTO–03/11

9. Revision History

Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document.
Revision No. History
9146E-AUTO-03/11
9146D-AUTO-09/10
9146C-AUTO-07/10
9146B-AUTO-05/10
Figure 1-1 “Block Diagram” on page 2 changed
Section 3.15 “Fail-safe Features” on page 9 changed
Section 7 “Ordering Information” on page 17 changed
Section 8 “Package Information” on pages 17 to 18 changed
Section 6 “Electrical Characteristics” numbers 9.4 and 9.5 on page 13
changed
Features changed
Headings 3.6 and 3.10: text changed
Abs.Max.Ratings table: row “ESD HBM acc. to STM5.1” changed
Atmel ATA6663/ATA6664
9146E–AUTO–03/11
19
Atmel Corporation
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Fax: (+852) 2722-1369
© 2011 Atmel Corporation. All rights reserved. / Rev.: 9146E–AUTO–03/11
®
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