Rainbow Electronics ATA6286 User Manual

Features

• Programmable AVR

• Frequency: 315 MHz (ATA6285) and 433 MHz (ATA6286)

• Support ASK/FSK Modulation with Integrated FSK Switch

• 6 dBm Output Power with Typically 8.5 mA Active Current Consumption in

Transmission Mode

• Low-power Microcontroller Requires Typically 0.6 µA Sleep Current with Active Interval

Timer

• Interfaces for Simple Capacitive Sensors (2 pF to 6 pF)

• One Interface Can Be Configured for Motion Wake-up (3 pF to 5 pF)

• Typically 25 mbar ADC Resolution for Pressure Measurement with Dedicated Sensor

Type

• Low-power Measurement Mode for Directly Connected Capacitive Sensors Typically

200 µA at 1 MHz System Clock

• Programmable 125 kHz Wake-up Receiver Channel with Typically 1.7 µA Current

Consumption in Listing Mode

• 2V to 3.6V Operation Voltage for Single Li-cell Power Supply

• –40°C to +125°C Operation Temperature and –40°C to +150°C Storage Temperature

• Less then 10 External Passive Components

• QFN32 (5 mm × 5 mm) Package

8-bit Flash Microcontroller Transmitter IC

TPMS Control and Transmitter IC

ATA6285 ATA6286

1. Description

ATA6285 and ATA6286 are highly integrated smart RF micro transmitter ICs for 315 MHz and 433 MHz, suited for ASK and FSK with typically 20 Kbits/s data rate in Manchester mode. The devices combine the functionality of the RF transmitter ICs ATA5756/ATA5757 with the programmable low-power AVR 8-bit Flash microcontroller in a single QFN32 package (5 mm × 5 mm). The ATA6285 and ATA6286 include a dedicated ADC interface for simple capacitive sensors as well as an on-chip temperature sensor. Three sensor interfaces are available for a capacitive range of 2 pF to 16 pF, where one channel can be configured as motion wake-up in the range of 3 pF to 5 pF. The ICs are suited for use in tire pressure monitoring (TPMS) sensor gauges in combination with external sensor devices.

The programmable AVR 8-bit Flash microcontroller includes 8 Kbytes of in-system self-programmable Flash memory and an 320-Bytes EEPROM, thus allowing the system integrator to install field-programmable firmware to enable system flexibility on different platforms. ATA6285 and ATA6286 can be configured to guarantee extremely low power consumption in sleep mode and measurement mode. They also include a programmable 125 kHz wake-up receiver channel for extremely low current consumption in listening mode. The ICs are designed for use in applications with typically less then 10 passive components: one external crystal for the sensor gauge, several capacitors, a single LiMnO2 battery coin cell, a single-ended antenna for the data transmission and an LF ferrite coil for the wake-up channel. ATA6285 and ATA6286 support TPMS-specific low-current modes even with an active brown-out detection and an interval timer.

Summary

Preliminary

NOTE: This is a summary document.

The complete document is available under NDA. For more information, please contact your local Atmel sales office.

4958AS–AUTO–09/06

2. Overview

2.1 Application

Figure 2-1. Tire Pressure Monitoring System (TPMS)

VDD

Battery

XZ Motion sensor

Pressure

sensor

16 15 14 13

17 18 19 20 21 22 23 24

25 26 27 28 29 30 31 32

12 11 10 9

ATA6285/

ATA6286

ISP:

8 7 6 5 4 3 2 1

ISP interface

In-System-Programmable Flash interface

Crystal Frequency 13.56 MHz for 433 MHz application

Crystal Frequency 13.125 MHz for 315 MHz application

loop antenna

ATA6285/ATA6286 [Preliminary]

4958AS–AUTO–09/06

2.2 Block Diagram

Figure 2-2. ATA6285/ATA6286 Block Diagram (MCP)

ATA6285/ATA6286 [Preliminary]

LF1 LF2

S0 S1 S2

PC2 PC1 PC0

LF Receiver

125 kHz

Voltage monitor

Timer block

Sensor

interface/

input

multiplexer

Temperature

sensor

PB7 (NSS)

PB5 (SCK)

PB4 (MISO)

PB3 (MOSI)

SPI

EEPROM

SRAM

IO Ports debugWIRE

VCC

Oscillator

AVR Core

Flash

ECIN1

Clock

management

and

monitoring

Watchdog

oscillator

Watchdog

timer

Power Supervision POR/ BOD/

TSD and

RESET

CLOCK

ASK

FSK

VSRF

XTO

PLL

Transmitter

VCO

Power

amplifier

XTO1 XTO2

ANT1 ANT2

PB1 (T3O)

PB0 (T3ICP)

2.3 Inter-die Bonding

The ATA6285/ATA6286 are Smart RF Micro Transmitter ICs in MCP (Multi Chip Package) technology. Table 2-1 shows the internal assembly of the MCP.

Table 2-1. Inter-die Connection Description of the MCP

AVR – Pin ATA5756/ATA5757 – Pin

PD3 (INT1) – External interrupt input 1 EN – Enable input PD4 (ECIN1) – External clock input 1 CLK – Clock output signal PD5 (T2O1) – Timer2 modulator output 1 ASK – Input signal PD6 (T2O2) – Timer2 modulator output 2 FSK – Input signal

PB6

PB2 (T2I)

PD1 (T3I)

PD2 (INTO)

PD0 (T2ICP)

PD7 (SDIN)

GND

NRESET

GNDRF

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2.4 Pin Configuration

Figure 2-3. Pinning QFN32

GND

LF1 LF2

VCC

PC2 PC1 PC0

Table 2-2. Pin Description

Alternate

Pin Number Pin Name

1 PB4 MISO PCINT4 SPI Port B4 2 PB5 SCK PCINT5 SPI Port B5

3ANT2– –

4ANT1– –

5 PB1 T3O PCINT1 Timer3 output Port B1 6 PB6 – PCINT6 Port B6 7 PB7 NSS PCINT7 SPI Port B7 8 XT02 – – Switch for FSK modulation RF pin

9 PB2 T2I PCINT2 Timer2 external input clock Port B2 10 XT01 – – Connection for crystal RF pin 11 VS_RF – – Power supply voltage for RF RF pin 12 GND – – Power supply ground for RF RF pin 13 NRESET debugWIRE – Reset input/debugWIRE interface 14 GND – – Power supply ground

15 S0 – –

16 S1 – –

17 S2 – –

18 GND – – Power supply ground

Note: 1. Internal inter-die connection of the MCP

Function 1

NRESET

GND

15 14 13

17 18 19 20

ATA62857

21 22 23 24

ATA6286

25 26 27 28 29 30 31 32

PD1 (T3I)

PB0 (T3ICP)

PD0 (T2ICP)

VSRF

12 11 10 9

GND

PD7 (SDIN)

Alternate

Function 2 Function Comment

PB2 (T2I)

XTO1

XTO2

PB7 (NSS)

PB6

PB1 (T3O)

ANT1

ANT2

PB5 (SCK)

PB4 (MISO)

PD2 (INTO)

PB3 (MOSI)

RF-antenna 2. Emitter of antenna

output stage

RF-antenna 1. Open collector

antenna output

Sensor input 0 – Pressure Sensor

(Cap.)

Sensor input 1 – X – Motion Sensor

(Cap.)

Sensor input 2 – Z - Motion Sensor

(Cap.)

RF pin

ATA6285/ATA6286 [Preliminary]

4958AS–AUTO–09/06

Table 2-2. Pin Description (Continued)

Alternate

Pin Number Pin Name

19 LF1 – – LF-receiver input 1 20 LF2 – – LF-receiver input 2 21 V 22 PC2 – PCINT10 - Port C2 23 PC1 CLKO PCINT9 System clock output Port C1 24 PC0 ECIN0 PCINT8 External Clock input 0 Port C1 25 PD0 T2ICP PCINT16 Timer2 external input capture Port D0 26 PD1 T3I PCINT17 Timer3 external input clock Port D1 27 PB0 T3ICP PCINT0 Timer3 external input capture Port B0 28 GND – – Power supply ground 29 GND – – Power supply ground

Inter-die

Note: 1. Internal inter-die connection of the MCP

(1)

30 PD7 SDIN PCINT23 SSI –Serial Data Input Port D7 31 PD2 INT0 PCINT18 External interrupt input 0 Port D2 32 PB3 MOSI PCINT3 SPI Port B3

PD3 INT1 PCINT19

PD4 ECIN1 PCINT20

PD5 T2O1 PCINT21

PD6 T2O2 PCINT22

Function 1

– – Power supply voltage (VCC + AVCC)

ATA6285/ATA6286 [Preliminary]

Alternate

Function 2 Function Comment

External Interrupt 1

connection

External Clock input 1

connection

Timer2 Modulator output 1

Inter-die connection

Timer2 Modulator output 2

Inter-die connection

→Inter-die

→

Por t D2

Por t D4

Por t D5

Por t D6

2.5 Pin Names

2.5.1 VCC

2.5.2 GND

2.5.3 Port B (PB7..0)

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Supply voltage

Ground

Port B is a 5(8)-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The PB7, PB6 and PB2 ports are only used as internal I/O ports for inter-die connections. The Port B output buffers have symmetrical drive characteristics with both high sink and source current capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running.

Port B also serves the functions of various special features of the ATmegaT.

2.5.4 Port C (PC2..0)

2.5.5 Port D (PD7..0)

2.5.6 NRESET

2.5.7 LF (2..1)

Port C is a 3-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C output buffers have symmetrical drive characteristics with both high sink and source current capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset condition becomes active, even if the clock is not running.

Port D is a 7(1)-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The PD(6..3) pins are used as internal inter-die connection I/O ports. The Port D output buffers have symmetrical drive characteristics with both high sink and source current capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running.

Port D also serves the functions of various special features of the ATmegaT.

Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running. Shorter pulses then defined minimum pulse length are not guaranteed to generate a reset.

Input coil pins for the LF-Receiver.

2.5.8 S (2..0)

2.5.9 ANT(2, 1)

2.5.10 XTO(0, 1)

Measuring input pins for external capacitance sensor elements.

RF-Antenna pins.

External crystal for the internal RF transmitter IC.

ATA6285/ATA6286 [Preliminary]

4958AS–AUTO–09/06

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