• High Output Power (6 dBm) at 8.1 mA (315 MHz) and 8.5 mA (433 MHz) Typical Values
• Divide by 24 (ATA5756) and 32 (ATA5757) Blocks for 13 MHz Crystal Frequencies and
for Low XTO Start-up Times
• Modulation Scheme ASK/FSK with Internal FSK Switch
• Up to 20 kBaud Manchester Coding, Up to 40 kBaud NRZ Coding
• Power-down Idle and Power-up Modes to Adjust Corresponding Current Consumption
through ASK/FSK/Enable Input Pins
• ENABLE Input for Parallel Usage of Controlling Pins in a 3-wire Bus System
• CLK Output Switches ON if the Crystal Current Amplitude has Reached 35% to 80% of
its Final Value
• Crystal Oscillator Time Until CLK Output is Activated, Typically 0.6 ms
• Supply Voltage 2.0 V to 3.6 V in Operation Temperature Range of -40° C to 125° C
• ESD Protection at all Pins (4 kV HBM)
• Small Package MSOP10
Benefits
• Low Parasitic FSK Switch Integrated
• Very Short and Reproducable Time to Transmit Typically <0.85 ms
• 13.125 MHz/13.56 MHz Crystals Give Opportunity for Small Package Sizes
UHF ASK/FSK
Transmitter
ATA5756
ATA5757
Description
The ATA5756/ATA5757 is a PLL transmitter IC which has been developed for the
demands of RF low-cost transmission systems at data rates up to 20 kBaud Manchester coding and 40 kBaud NRZ coding. The transmitting frequency range is 313 MHz to
317 MHz (ATA5756) and 432 MHz to 448 MHz (ATA5757), repectively. It can be used
in both FSK and ASK systems. Due to its shorten crystal oscillator settling time it is
well suited for Tire Pressure Monitoring (TPM) and for Passive Entry Go applications.
Figure 1. System Block Diagram
UHF ASK/FSK
1 Li cell
Keys
Encoder
ATARx9x
TPM and Remote control
transmitter
ATA5756/
ATA5757
PLL
XTO
VCO
Power
amp.
Antenna Antenna
U3741B/
U3745B/
T5743/
T5744/
LNAVCO
UHF ASK/FSK
Remote control receiver
Demod.
IF Amp
PLLXTO
Control
1...3
µC
Preliminary
Rev. 4702D–RKE–02/04
Pin Configuration
Figure 2. Pinning MSOP10
CLK
ASK
FSK
ANT2
1
2
3
4
5ANT1
ATA5756
ATA5757
10
9
8
7
6
ENABLE
GND
VS
XTO1
XTO2
Pin Description
PinSymbolFunctionConfiguration
Clock output signal for the
microcontroller.
The clock output frequency is set by the
crystal to f
1CLK
The CLK output stays Low in powerdown mode and after enabling of the
PLL.
The CLK output switches on if the
oscillation amplitude of the crystal has
reached a certain level.
XTAL
/8.
VS
100
100
CLK
200k
2ASK
3FSK
2
ATA5756/ATA5757 [Preliminary]
Switches on the power amplifier for
ASK modulation and enables the PLL
and XTO if the ENABLE pin is open
Switches off the FSK switch (switch has
high Z if signal at pin FSK is High) and
enables the PLL and the XTO if the
ENABLE pin is open
ASK
FSK
200k
200k
50k
200k
20 µA
V
= 1.1V
Ref
V
= 1.1V
Ref
5 µA
4702D–RKE–02/04
ATA5756/ATA5757 [Preliminary]
Pin Description
PinSymbolFunctionConfiguration
4ANT2Emitter of antenna output stage
5ANT1Open collector antenna output
ANT1
ANT2
210 µA
VS
1.2k
6XTO2Diode switch, used for FSK modulation
7XTO1Connection for crystal
(FSK < 0.25V)
AND
(ENABLE > 1.7V)
XTO2
VS
1.5k
XTO1
182 µA
8VSSupply voltageSee ESD protection circuitry (see Figure 12)
9GNDGroundSee ESD protection circuitry (see Figure 12)
VS
ENABLE input
30 µA
10ENABLE
4702D–RKE–02/04
If ENABLE is connected to GND and
the ASK or FSK pin is High, the device
stays in idle mode.
In normal operation ENABLE is left
open and ASK or FSK is used to enable
the device.
ENABLE
(FSK >1.7 V ) OR
(ASK > 1.7 V)
150k
250k
3
Figure 3. Block Diagram
ATA5756 /
ATA5757
CLK
1
ASK
2
f
Power up/down
EN
8
f
24/
32
ENABLE
10
GND
9
OR
FSK
3
ANT2
4
EN
ANT1
56
PA
PLL
PFD
CP
LF
VCO
XTO
VS
8
Ampl. OK
XTO1
7
XTO2
General DescriptionThis fully integrated PLL transmitter allows the design of simple, low-cost RF miniature
transmitters for TPM and RKE applications. The VCO is locked to 24 × f
for ATA5756/ATA5757. Thus, a 13.125 MHz/13.56 MHz crystal is needed for a
315 MHz/433.92 MHz transmitter. All other PLL and VCO peripheral elements are
integrated.
XTAL
/32 × f
XTAL
The XTO is a series resonance (current mode) oscillator. Only one capacitor and a
crystal connected in series to GND are needed as external elements in an ASK system.
The internal FSK switch, together with a second capacitor, can be used for FSK
modulation.
The crystal oscillator needs typically 0.6 ms until the CLK output is activated if a crystal
as defined in the electrical characteristics is used (e.g., TPM crystal). For most crystals
used in RKE systems, a shorter time will result.
The CLK output is switched on if the amplitude of the current flowing through the crystal
has reached 35% to 80% of its final value. This is synchronized with the 1.64/1.69 MHz
CLK output. As a result, the first period of the CLK output is always a full period. The
PLL is then locked <250 µs after CLK output activation. This means an additional wait
time of ≥250 µs is necessary before the PA can be switched on and the data transmission can start. This results in a significantly lower time of about 0.85 ms between
enabling the ATA5756/ATA5757 and the beginning of the data transmission which saves
battery power especially in tire pressure monitoring systems.
4
ATA5756/ATA5757 [Preliminary]
4702D–RKE–02/04
ATA5756/ATA5757 [Preliminary]
The power amplifier is an open-collector output delivering a current pulse which is nearly
independent from the load impedance and can therefore be controlled via the connected
load impedance.
This output configuration enables a simple matching to any kind of antenna or to 50 Ω. A
high power efficiency for the power amplifier results if an optimized load impedance of
Z
Load, opt
=380Ω + j340 Ω (ATA5756) at 315 MHz and Z
(ATA5757) at 433.92 MHz is used at the 3-V supply voltage.
Load, opt
=280Ω +j310Ω
Functional
Description
If ASK = Low, FSK = Low and ENABLE = open or Low, the circuit is in power-down
mode consuming only a very small amount of current so that a lithium cell used as
power supply can work for many years.
If the ENABLE pin is left open, ENABLE is the logical OR operation of the ASK and FSK
input pins. This means, the IC can be switched on by either the FSK of the ASK input.
If the ENABLE pin is Low and ASK or FSK are High, the IC is in idle mode where the
PLL, XTO and power amplifier are off and the microcontroller ports controlling the ASK
and FSK inputs can be used to control other devices. This can help to save ports on the
microcontroller in systems where other devices with 3-wire interface are used.
With FSK = High and ASK = Low and ENABLE = open or High, the PLL and the XTO
are switched on and the power amplifier is off. When the amplitude of the current
through the crystal has reached 35% to 80% of its final amplitude, the CLK driver is
automatically activated. The CLK output stays Low until the CLK driver has been activated. The driver is activated synchronously with the CLK output frequency, hence, the
first pulse on the CLK output is a complete period. The PLL is then locked within
<250 µs after the CLK driver has been activated, and the transmitter is then ready for
data transmission.
With ASK = High the power amplifier is switched on. This is used to perform the ASK
modulation. During ASK modulation the IC is enabled with the FSK or the ENABLE pin.
With FSK = Low the switch at pin XTO2 is closed, with FSK = High the switch is open.
To achieve a faster start-up of the crystal oscillator, the FSK pin should be High during
start-up of the XTO because the series resistance of the resonator seen from pin XTO1
is lower if the switch is off.
4702D–RKE–02/04
The different modes of the ATA5756/ATA5757 are listed in Table 1, the corresponding
current consumption values can be found in the table “Electrical Characteristics” on
page 15.
Table 1. ATA5756/ATA5757 Modes
ASK PinFSK PinENABLE PinMode
LowLowLow/openPower-down mode, FSK switch High Z
LowLowHighPower-up, PA off, FSK switch Low Z
LowHighHigh/openPower-up, PA off, FSK switch High Z
HighLowHigh/openPower-up, PA on, FSK switch Low Z
HighHighHigh/openPower-up, PA on, FSK switch High Z
Low/HighHighLowIdle mode, FSK switch High Z
HighLow/HighLowIdle mode, FSK switch High Z
5
Transmission with
ENABLE = open
ASK ModeThe ATA5756/ATA5757 is activated by ENABLE = open, FSK = High, ASK = Low. The
microcontroller is then switched to external clocking. After typically 0.6 ms, the CLK
driver is activated automatically (i.e., the microcontroller waits until the XTO and CLK
are ready). After another time period of
The output power can then be modulated by means of pin ASK. After transmission, ASK
is switched to Low and the microcontroller returns back to internal clocking. Then, the
ATA5756/ATA5757 is switched to power-down mode with FSK = Low.
Figure 4. Timing ASK Mode with ENABLE not Connected to the Microcontroller
≤250 µs, the PLL is locked and ready to transmit.
FSK
ASK
CLK
Power-down
∆T
XTO
Power-up,
PA off
> 250 µs
Power-up,
PA on
(High)
Power-up,
PA off
(Low)
Power-down
FSK ModeThe ATA5756/ATA5757 is activated by FSK = High, ASK = Low. The microcontroller is
then switched to external clocking. After typically 0.6 ms, the CLK driver is activated
automatically (i.e., the microcontroller waits until the XTO and CLK are ready. After
another time period of
≤250 µs, the PLL is locked and ready to transmit. The power
amplifier is switched on with ASK = H. The ATA5756/ATA5757 is then ready for FSK
modulation. The microcontroller starts to switch on and off the capacitor between the
crystal load capacitor and GND by means of pin FSK, thus, changing the reference frequency of the PLL. IF FSK = L the output frequency is lower, if FSK = H output
frequency is higher. After transmission, FSK stays High and ASK is switched to Low and
the microcontroller returns back to internal clocking. Then, the ATA5756/ATA5757 is
switched to power-down mode with FSK = Low.
Figure 5. Timing FSK Mode with ENABLE not Connected to the Microcontroller
∆T
XTO
FSK
ASK
CLK
Power-down
6
ATA5756/ATA5757 [Preliminary]
Power-up,
PA off
> 250 µs
Power-up,
PA on
(f
= High)
RF
Power-up,
PA off
(f
= Low)
RF
Power-down
4702D–RKE–02/04
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