Rainbow Electronics AT90SO4 User Manual

Features

General

• High-performance, Low-power secureAVR

• Low Power Idle and Power-Down Modes

• Bond Pad Locations Conforming to ISO 7816-2

• ESD Protection up to ± 4000V

• Operating Range: 2.7V to 5.5V

• Operating Temperature: -25°C to +85°C

• Internal Variable Frequency Oscillator up to 30 Mhz

• Available in Wafers, Modules and standard ROHS packages: SOIC8 or DFN8

Enhanced RISC Architecture

Memory

• 96K bytes of ROM Program Memory

• 4K bytes of EEPROM including 128 OTP bytes and 384 bytes of Bit-addressable Area

– 1 to 64-byte Program/Erase – 2 ms Program / 2 ms Erase – Typically More than 500,000 Write/Erase Cycles at a Temperature of 25°C – 10 Years Data Retention

• 2K bytes of RAM Memory

Peripherals

• ISO 7816 Controller

– Up to 625 kbps at 5 MHz – Compliant with T = 0 and T = 1 Protocols

• High Speed Master/Slave SPI Serial Interface

– Supports clock up to 20MHz in Slave and Master Mode in typical conditions – Double Buffering for high performance (16x2 bytes DPRAM buffers) – DMA Controller for fast transfers between internal DPRAM to RAM

• Hardware Communication Interface Detection

• Two I/O Ports (supporting ISO 7816)

• Programmable Internal Oscillator (Up to 30 MHz for CPU)

• Two 16-bit Timers

• Random Number Generator (RNG)

• 2-level Interrupt Controller

• Hardware DES and Triple DES Engine DPA/DEMA Resistant

• Checksum Accelerator

• Code Signature Module

• CRC 16 & 32 Engine (Compliant with ISO/IEC 3309)

Secure Microcontroller for Security Modules

AT90SO4 Summary

Security

• Dedicated Hardware for Protection Against SPA/DPA/SEMA/DEMA Attacks

• Advanced Protection Against Physical Attack, Including Active Shield

• Environmental Protection Systems (Voltage, Frequency, Temperature, Light

monitors...)

• Secure Memory Management/Access Protection (Supervisor Mode)

Development Tools

• Voyager Emulation Platform (ATV4 Plus) to Support Software Development

• IAR Systems EWAVR

• Software Libraries and Application Notes

V5.11B Debugger or Above

Note: This is a summary document. A complete document will be available under NDA. For more information, please contact your local Atmel sales office.

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Part Number

AT90SO4-xxx-P

AT: Atmel 90 : AVR Core SO : Smart Object 4 : EEPROM Size xxx : Chip Personalization Number* P = Z : DFN8 Package

R : SOIC8 Package

* For more details about the Chip Personalization Number, please contact your local ATMEL sales office.

Description

Targeted for low cost security applications, the AT90SO4 is based on the secureAVR architecture that allows the linear addressing of up to 8M bytes of code and up to 16M bytes of data as well as a number of new functional and security features. It is a low-power, high-performance, 8/16-bit microcontroller with ROM program memory, EEPROM data memory based on the secureAVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the AT90SO4 achieves throughputs close to 1 MIPS per MHz. Its Harvard architecture includes 32 general purpose working registers directly connected to the ALU, allowing two independent registers to be accessed in one single instruction executed in one clock cycle.

The ability to map the EEPROM in the code space allows parts of the program memory to be reprogrammed in-system. This technology combined with the versatile 8/16-bit CPU on a monolithic chip provides a highly flexible and cost-effective solution to many embedded security applications.

Additional security features include power and frequency protection logic, logical scrambling on program data and addresses, Power Analysis countermeasures and memory accesses controlled by a supervisor mode. A block diagram of the AT90SO4 is shown in Figure 1 hereafter.

High-Speed SPI Controller

The AT90SO4 hosts a High Speed SPI interface for full-duplex and synchronous data transfer. When configured as a master, the controller provides clock up to 20MHz thanks to the dedicated internal VFO clock system.

A specific DMA contoller allows fast tranfers between DPRAM banks to CPU RAM. The internal DPRAM memory provides 4 DPRAM buffers of 16 bytes each: 2 for Reception and 2 for Transmission.

The SPI controller features three sources of interrupt (Byte Transmitted, Time-out and Reception Overflow) and a programmable clock and inter-bytes (guardtime) delays.

AT90SO4

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Figure 1. AT90SO4 secureAVR Enhanced RISC Architecture

Instruction

Decoder

Program

Memory

Instruction

Access Control

General

Purpose

Registers

Y Z

Status

RAM

Data Memory

Interrupt

Unit

ISO 7816 I/O Port 0

Control

Lines

ALU

EEPROM

User Memory

OTP

Secure Control

VCC

GND

Access Control

IN/OUT0

Data Bus

8-bit

RNG

DES

DPA Counter

measures

Reset

Circuit

RST

ISO 7816 Controller

CRC and

Checksum

Accelerator

Timer 1

Timer 0

ISO7816

I/O Port 1

SPI

Controller

SPI_MISO

SPICLK / ISOCLK

SPI_MOSI

IN/OUT1 /

AT90SO4

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Pinout and Package Information

SPI_MISO

VCC

RST

SPI_CLK / ISO_CLK

SPI_MOSI

GND

SPI_SS / IO1

IO0

AT90SO4

DFN8

INDEX CORNER

AT90SO4

SOIC8

INDEX CORNER

SPI_MOSI

GND

I01 / SPI_SS

IO0

SPI_MISO

VCC

RST

ISO_CLK / SPI_SCK

Figure 2. Pinout AT90SO4 - Package DFN8

Figure 3. Pinout AT90SO4 - Package SOIC8

AT90SO4

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