Features
General
• High-performance, Low-power secureAVR® Core Enhanced RISC Architecture
– 135 Powerful Instructions (Most Executed in a Single Clock Cycle)
• Low-power IDLE and LPW Modes
• Bond Pad Locations Conforming to ISO 7816-2
• ESD Protection to ± 6000V on ISO pins, ± 4000V on RF pins
• Operating Ranges: from 2.70V to 5.50V
• Compliant with EMV 2000 Specifications
• Compliant with ICAO ePassport Specifications (BAC, AA) and new European
ePassport Specification (EAC)
• Available in
Packages
• Compatible with Printed Antennas (losses from 10 to 20 Ohms)
Memory
• 288K Bytes of ROM Program Memory Including 32K Bytes with Specific Access
• 80K Bytes of EEPROM, Including 128 OTP Bytes and 384 Bit-addressable Bytes
– 1 to 128-byte Program/Erase
– 1.5ms Program, 1.5ms Erase
– Fast Personalization Mode (1.5ms)
– Endurance: 500,000 Write/Erase Cycles at 2 5°C (Please refer to “Atmel
SMS Reliability Manual”)
– 10 Years Data Retention
• 8K Bytes of RAM Memory
Wafers, Modules, Contactless Modules or Inlays, and Industry-standard
Secure
Microcontroller
for Smart Cards
AT90SC28880RCFV
Peripherals
• One I/O Port
• One ISO 7816 Controller
– Up to 625 kbps at 5 MHz
– Compliant with T = 0 and T = 1 Protocols
• Programmable Internal Oscillator
(Up to 30 MHz for AdvX™ and internal CPU Clock)
• Three 16-bit Timers
(One in contact, One in contactless, One shared for contact/contactless)
• Random Number Generator (RNG)
• 2-level Interrupt Controller
• Hardware DES and Triple DES, 4 Keys, DPA/DEMA R esistant
• Hardware AES
NOTE: This is a summary document.
The complete document is available
under NDA. For more information,
please contact your local Atmel sales
office.
6577CS–SMS–06/10
• Checksum Accelerator
• Code Signature Module
• CRC16 & 32 Engine (Compliant with ISO/IEC 3309)
• 32-Bit Cryptographic Accelerator (AdvX for Public Key Operations): RSA, DSA, ECC, Diffie-Hellman
Contactless
• Contactless Interface Controller (CIC) with Full Support for ISO/IEC 14443 Type B Protocol
• Extended Specifications for Strong Interoperability Features
• On-chip Tuning Capacitance: 76pF
• 13.56 MHz Clock Extraction - 6.78 MHz Internal Bus Frequency
• Baud Rates:106Kbps, 212Kbps, 424Kbps and 848Kbps
• DMA capability
Security
• Dedicated Hardware for Protection Against SPA/DPA/DEMA/SEMA Attacks
• Advanced Protection Against Physical Attack, Including Active Shield
• Environmental Protection Systems
• Voltage Monitor
• Frequency Monitor
• Temperature Monitor
• Light Protection
• Secure Memory Management/Access Protection (Supervisor Mode)
• Start on Internal Oscillator
• No External Clock for Contactless Mode
Targeted Certifications
• Common Criteria EAL5+
•ZKA
•EMVCo
• FIPS 140-2
Development Tools
• Voyager Emulation Platform (ATV4Plus) to Support Software Development
• IAR Embedded Workbench® V4.30 Debugger or Atmel’s AVR Studio® Version 4.07 or Above
• Software Libraries and Application Notes
2
AT90SC28880RCFV
6577CS–SMS–06/10
AT90SC28880RCFV
Description
The AT90SC28880RCFV is a low-power, high-performance, 8/16-bit microcontroller with ROM program memory, EEPROM
data memory and a crypto-accelerator, based on the secureAVR enhanced RISC architecture. By executing powerful
instructions in a single clock cycle, the AT90SC28880RCFV achieves throughputs close to 1 MIPS per MHz. Its Harvard
architecture inclu des 3 2 g ene ra l purpo se wor k in g registers directly c onn ec ted to the A LU, all owi ng two in dep end ent r egi sters to be accessed in one single instruction executed in one clock cycle.
In addition to the 288K bytes of embedded ROM, the AT90SC28880RCFV includes 80K of Atmel’s high density EEPROM.
The ability to map the EEPROM in the code space allows parts of the program memory to be reprogrammed in-system.
This technology combin ed with the ve rsitile 8 /16-bit CPU on a monol ithic chi p provide s a highly fle xible and cost-ef fectiv e
solution to many smart card applications.
The AT90SC28880RCFV uses the secureAVR® that allows the linear addressing of code and data as well as a number of
new functional and security features.
The crypto engin e featu red i n the AT90SC seri es is the Ad vX, a 32-b it ac celera tor de dicat ed to p erform fast e ncryp tion or
authentication functions.
Additional security features include power, frequency and temperatur e pr ot e ct i on logic, logical scramblin g on program data
and addresses, Power Analysis countermeasures and memory accesses controlled by a supervisor mode.
Figure 1 on next page shows a block diagram of the AT90SC28880RCFV
6577CS–SMS–06/10
3
Figure 1. The AT90SC28880RCFV secureAVR Enhanced RISC Architecture
Instruction
Decoder
Program
Memory
Instruction
Register
Access
Control
General
Purpose
Registers
X
Y
Z
Status
Register
AdvX
Crypto-
Coprocessor
RAM
Data Memory
Interrupt
Unit
ISO 7816
I/O Port 0
Timer
Control
Lines
ALU
EEPROM
User Memory
OTP
PC
Secure
Control
V
CC
GND
CLK
Access
Control
IN/OUT0
Data Bus
8-bit
RNG
16
16
16
8
88
DES
DPA Counter
measures
Reset
Circuit
RST
ISO 7816
Controller
CRC and
Cheksum
CRYPTO
ROM
ISO 14443
Controller
DMA
RF
Front-End
RF1
RF2
AES
CSM
Secure
Control
4
AT90SC28880RCFV
6577CS–SMS–06/10
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6577CS–SMS–06/10
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