Military 5.0V pASIC 1 Family
Military 5.0V pASIC 1 Family - Very-High-Speed CMOS FPGA
Military 5.0V pASIC 1 Family
DEVICE HIGHLIGHTS
Device Highlights
Very High Speed
■ViaLink“ metal-to-metal programmable technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns at 5V, and over 80 MHz at 3.3V operation.
High Usable Density
■Up to a 24-by-32 array of 768 logic cells provides 22,000 usable PLD gates in 208-pin PQFP and 208-pin CQFP packages.
PCI-Output Drive
■Fully PCI 2.1 compliant input/output capability. (including drive current)
FEATURES
Features
■Total of 180 I/O pins
■-172 Bidirectional Input/Output pins
■-6 Dedicated Input/High-Drive pins
■-2 Clock/Dedicated input pins with fanoutindependent, low-skew clock networks
■-PCI 2.1 Compliant I/Os
■Input + logic cell + output delays under 6 ns
■Chip-to-chip operating frequencies up to 110 MHz
■Internal state machine frequencies up to 150 MHz
■Clock skew < 0.5 ns
■Input hysteresis provides high noise immunity
■Built-in scan path permits 100% factory testing of logic and I/O cells and functional testing with Automatic Test Vector Generation (ATVG) software after programming
■208 pin PQFP pin for pin compatible with the
208 CQFP
■0.65µ CMOS process with ViaLink programming technology
Device |
ASIC |
PLD |
Package |
Max |
Qualification |
SMD |
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Gates |
Gates |
I/O |
Level |
5962- |
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QL8x12B |
1,000 |
2,000 |
68CPGA |
64 |
M |
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QL12x16B |
2,000 |
4,000 |
84CPGA |
76 |
M, /883 |
96836 |
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QL16x24B |
4,000 |
7,000 |
144CPGA |
122 |
M, /883 |
95599 |
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160 CQFP |
122 |
M, /883 |
95599 |
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QL24x32B |
8,000 |
14,000 |
208CQFP |
180 |
M, /883 |
96837 |
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208PQFP |
180 |
M |
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M = Military Temperature (-55 to +125 degrees C) /883 = MIL-STD-883 qualified
TABLE 1: Selector Table
Rev B |
8-7 |
Military 5.0V pASIC 1 Family
PRODUCT SUMMARY
Product Summary
The pASIC 1 Family is a very-high-speed CMOS user-programmable ASIC devices. The 768 logic cell field-programmable gate array (FPGA) features 22,000 usable PLD gates of high-performance gen- eral-purpose logic in a 208-pin PQFP and CQFP package.
Low-impedance, metal-to-metal, ViaLink interconnect technology provides nonvolatile custom logic capable of operating above 150 MHz. Logic cell delays under 2 ns, combined with input delays of under 1.5 ns and output delays under 3 ns, permit
high-density programmable devices to be used with today’s fastest microprocessors and DSPs.
Designs can be entered using QuickLogic’s QuickWorks Toolkit or most popular third-party CAE tools. QuickWorks combines Verilog/VHDL design entry and simulation tools with device-specific place & route and programming software. Ample on-chip routing channels allow fast, fully automatic place and route of designs using up to 100% of the logic and I/ O cells, while maintaining fixed pin-outs.
PINOUT DIAGRAM 68-PIN CPGA
Pinout Diagram 68-Pin CPGA
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PIN |
FUNC |
PIN |
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FUNC |
PIN |
FUNC |
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PIN |
FUNC |
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B10 |
IO |
B2 |
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IO |
K2 |
IO |
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K10 |
IO |
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A10 |
IO |
B1 |
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IO |
L2 |
IO |
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K11 |
IO |
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B9 |
IO |
C2 |
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IO |
K3 |
IO |
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J10 |
IO |
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A9 |
IO |
C1 |
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IO |
L3 |
IO |
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J11 |
IO |
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B8 |
IO |
D2 |
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IO |
K4 |
IO |
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H10 |
IO |
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A8 |
IO |
D1 |
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IO |
L4 |
IO |
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H11 |
IO |
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B7 |
I/(SCLK) |
E2 |
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IO |
K5 |
I/(SI) |
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G10 |
IO |
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A7 |
I/CLK/(SM) |
E1 |
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IO |
L5 |
I/CLK |
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G11 |
IO |
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B6 |
VCC |
F2 |
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GND |
K6 |
VCC |
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F10 |
GND |
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A6 |
I |
F1 |
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IO |
L6 |
I |
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F11 |
IO |
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B5 |
I |
G2 |
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IO |
K7 |
I/(SO) |
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E10 |
IO |
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A5 |
IO |
G1 |
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IO |
L7 |
IO |
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E11 |
IO |
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B4 |
IO |
H2 |
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IO |
K8 |
IO |
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D10 |
IO |
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A4 |
IO |
H1 |
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IO |
L8 |
IO |
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D11 |
IO |
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B3 |
IO |
J2 |
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IO |
K9 |
IO |
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C10 |
IO |
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A3 |
IO |
J1 |
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IO |
L9 |
IO |
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C11 |
IO |
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A2 |
IO |
K1 |
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IO |
L10 |
IO |
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B11 |
IO |
TABLE 2: CPGA 68 Function/Connector Pin Table
8-8
8
Preliminary
Military 5.0V pASIC 1 Family
PINOUT DIAGRAM 84-PIN CPGA
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PIN |
FUNC |
PIN |
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FUNC |
PIN |
FUNC |
PIN |
FUNC |
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B10 |
IO |
B2 |
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IO |
K2 |
IO |
K10 |
IO |
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B9 |
IO |
C2 |
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IO |
K3 |
IO |
J10 |
IO |
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A10 |
IO |
B1 |
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IO |
L2 |
IO |
K11 |
IO |
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A9 |
IO |
C1 |
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IO |
L3 |
IO |
J11 |
IO |
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B8 |
IO |
D2 |
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IO |
K4 |
IO |
H10 |
IO |
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A8 |
IO |
D1 |
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IO |
L4 |
IO |
H11 |
IO |
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A7 |
IO |
E1 |
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IO |
L5 |
IO |
G11 |
IO |
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C7 |
GND |
E3 |
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GND |
J5 |
GND |
G9 |
GND |
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A6 |
IO |
E2 |
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IO |
L6 |
IO |
G10 |
IO |
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B7 |
I/(SCLK) |
F1 |
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IO |
K5 |
I/(SI) |
F11 |
IO |
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C6 |
I/CLK/(SM) |
F2 |
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IO |
J6 |
I/CLK |
F10 |
IO |
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B6 |
I(P) |
F3 |
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IO |
K6 |
I |
F9 |
IO |
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B5 |
I |
G1 |
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IO |
K7 |
I/(SO) |
E11 |
IO |
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C5 |
VCC |
G3 |
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VCC |
J7 |
VCC |
E9 |
VCC |
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A5 |
IO |
G2 |
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IO |
L7 |
IO |
E10 |
IO |
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A4 |
IO |
H1 |
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IO |
L8 |
IO |
D11 |
IO |
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B4 |
IO |
H2 |
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IO |
K8 |
IO |
D10 |
IO |
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A3 |
IO |
J1 |
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IO |
L9 |
IO |
C11 |
IO |
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A2 |
IO |
K1 |
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IO |
L10 |
IO |
B11 |
IO |
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B3 |
IO |
J2 |
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IO |
K9 |
IO |
C10 |
IO |
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A1 |
IO |
L1 |
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IO |
L11 |
IO |
A11 |
IO |
TABLE 3: CPGA 84 Function/Connector Pin Table
8-9
Military 5.0V pASIC 1 Family
PINOUT DIAGRAM 144-PIN CPGA
Pinout Diagram 144-pin CPGA
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PIN |
FUNC |
PIN |
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FUNC |
PIN |
FUNC |
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PIN |
FUNC |
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A2 |
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IO |
B15 |
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IO |
R14 |
IO |
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P1 |
IO |
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B3 |
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IO |
C14 |
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IO |
P13 |
IO |
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N2 |
IO |
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C4 |
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IO |
D13 |
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IO |
N12 |
IO |
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M3 |
IO |
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A3 |
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IO |
C15 |
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IO |
R13 |
IO |
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N1 |
IO |
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B4 |
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IO |
D14 |
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IO |
P12 |
IO |
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M2 |
IO |
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A4 |
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IO |
E13 |
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VCC |
R12 |
IO |
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L3 |
VCC |
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C3 |
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VCC |
D15 |
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IO |
N13 |
VCC |
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M1 |
IO |
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B5 |
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IO |
E14 |
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IO |
P11 |
IO |
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L2 |
IO |
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A5 |
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IO |
E15 |
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IO |
R11 |
IO |
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L1 |
IO |
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C6 |
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IO |
F13 |
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IO |
N10 |
IO |
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K3 |
IO |
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B6 |
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IO |
F14 |
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IO |
P10 |
IO |
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K2 |
IO |
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A6 |
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IO |
F15 |
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IO |
R10 |
IO |
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K1 |
IO |
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A7 |
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IO |
G15 |
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IO |
R9 |
IO |
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J1 |
IO |
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B7 |
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IO |
C13 |
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GND |
P9 |
IO |
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N3 |
GND |
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C5 |
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GND |
G14 |
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IO |
N11 |
GND |
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J2 |
IO |
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A8 |
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IO |
H15 |
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IO |
R8 |
IO |
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H1 |
IO |
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B8 |
I/(SCLK) |
H14 |
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IO |
P8 |
I/(SI) |
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H2 |
IO |
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C8 |
I/CLK/(SM) |
G13 |
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GND |
N8 |
I/CLK |
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J3 |
GND |
|||
C7 |
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VCC |
H13 |
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IO |
N9 |
VCC |
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H3 |
IO |
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A9 |
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I/(P) |
J15 |
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IO |
R7 |
I |
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G1 |
IO |
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B9 |
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I |
J14 |
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IO |
P7 |
I/(SO) |
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G2 |
IO |
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C11 |
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VCC |
J13 |
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VCC |
N5 |
VCC |
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G3 |
VCC |
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A10 |
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IO |
K15 |
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IO |
R6 |
IO |
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F1 |
IO |
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A11 |
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IO |
L15 |
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IO |
R5 |
IO |
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E1 |
IO |
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B10 |
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IO |
K14 |
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IO |
P6 |
IO |
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F2 |
IO |
TABLE 4: CPGA 144 Function/Connector Table
(Cont’d on next page)
8-10
10 |
Preliminary |
Military 5.0V pASIC 1 Family
CPGA 144 Function/Connector Table (Cont’d)
A12 |
IO |
M15 |
IO |
R4 |
IO |
D1 |
IO |
B11 |
IO |
L14 |
IO |
P5 |
IO |
E2 |
IO |
C10 |
IO |
K13 |
IO |
N6 |
IO |
F3 |
IO |
A13 |
IO |
N15 |
IO |
R3 |
IO |
C1 |
IO |
C9 |
GND |
L13 |
GND |
N7 |
GND |
E3 |
GND |
B12 |
IO |
M14 |
IO |
P4 |
IO |
D2 |
IO |
A14 |
IO |
P15 |
IO |
R2 |
IO |
B1 |
IO |
B13 |
IO |
N14 |
IO |
P3 |
IO |
C2 |
IO |
C12 |
IO |
M13 |
IO |
N4 |
IO |
D3 |
IO |
A15 |
IO |
R15 |
IO |
R1 |
IO |
A1 |
IO |
B14 |
IO |
P14 |
nc |
P2 |
IO |
B2 |
nc |
PINOUT DIAGRAM 160-PIN CPGA
QL16x24B-1CF160M
8-11